xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-cmp-select.ll (revision eac2638ec169a5d6987ac4fbbcd430bee4489348)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-linux-unknown -mattr=+sve -o - < %s | FileCheck %s
3
4define <vscale x 16 x i8> @vselect_cmp_ne(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {
5; CHECK-LABEL: vselect_cmp_ne:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    ptrue p0.b
8; CHECK-NEXT:    cmpne p0.b, p0/z, z0.b, z1.b
9; CHECK-NEXT:    sel z0.b, p0, z1.b, z2.b
10; CHECK-NEXT:    ret
11  %cmp = icmp ne <vscale x 16 x i8> %a, %b
12  %d = select <vscale x 16 x i1> %cmp, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c
13  ret <vscale x 16 x i8> %d
14}
15
16define <vscale x 16 x i8> @vselect_cmp_sgt(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {
17; CHECK-LABEL: vselect_cmp_sgt:
18; CHECK:       // %bb.0:
19; CHECK-NEXT:    ptrue p0.b
20; CHECK-NEXT:    cmpgt p0.b, p0/z, z0.b, z1.b
21; CHECK-NEXT:    sel z0.b, p0, z1.b, z2.b
22; CHECK-NEXT:    ret
23  %cmp = icmp sgt <vscale x 16 x i8> %a, %b
24  %d = select <vscale x 16 x i1> %cmp, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c
25  ret <vscale x 16 x i8> %d
26}
27
28define <vscale x 16 x i8> @vselect_cmp_ugt(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {
29; CHECK-LABEL: vselect_cmp_ugt:
30; CHECK:       // %bb.0:
31; CHECK-NEXT:    ptrue p0.b
32; CHECK-NEXT:    cmphi p0.b, p0/z, z0.b, z1.b
33; CHECK-NEXT:    sel z0.b, p0, z1.b, z2.b
34; CHECK-NEXT:    ret
35  %cmp = icmp ugt <vscale x 16 x i8> %a, %b
36  %d = select <vscale x 16 x i1> %cmp, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c
37  ret <vscale x 16 x i8> %d
38}
39
40; Some folds to remove a redundant icmp if the original input was a predicate vector.
41
42define <vscale x 4 x i1> @fold_away_icmp_ptrue_all(<vscale x 4 x i1> %p) {
43; CHECK-LABEL: fold_away_icmp_ptrue_all:
44; CHECK:       // %bb.0:
45; CHECK-NEXT:    ret
46  %t0 = sext <vscale x 4 x i1> %p to <vscale x 4 x i32>
47  %t1 = icmp ne <vscale x 4 x i32> %t0, zeroinitializer
48  ret <vscale x 4 x i1> %t1
49}
50
51define <vscale x 4 x i1> @fold_away_icmp_ptrue_vl16(<vscale x 4 x i1> %p) vscale_range(4, 4) {
52; CHECK-LABEL: fold_away_icmp_ptrue_vl16:
53; CHECK:       // %bb.0:
54; CHECK-NEXT:    ret
55  %t0 = call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 9) ;  VL16 is encoded as 9.
56  %t1 = sext <vscale x 4 x i1> %p to <vscale x 4 x i32>
57  %t2 = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.nxv4i32(<vscale x 4 x i1> %t0, <vscale x 4 x i32> %t1, <vscale x 4 x i32> zeroinitializer)
58  ret <vscale x 4 x i1> %t2
59}
60
61
62declare <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32)
63declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>)
64