xref: /llvm-project/llvm/test/CodeGen/AArch64/speculation-hardening-sls.mir (revision 1ee315ae7964c8433b772e0b5d667834994ba753)
1# RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu \
2# RUN:     -start-before aarch64-sls-hardening -o - %s \
3# RUN:     -mattr=+pauth,+harden-sls-retbr \
4# RUN:   | FileCheck %s --check-prefixes=CHECK,ISBDSB
5# RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu \
6# RUN:     -start-before aarch64-sls-hardening -o - %s \
7# RUN:     -mattr=+pauth,+harden-sls-retbr -mattr=+sb \
8# RUN:   | FileCheck %s --check-prefixes=CHECK,SB
9
10# Check that the SLS hardening pass also protects BRA* indirect branches that
11# llvm currently does not generate.
12--- |
13  @ptr_aa = private unnamed_addr constant [2 x ptr] [ptr blockaddress(@br_aa, %return), ptr blockaddress(@br_aa, %l2)], align 8
14  @ptr_aaz = private unnamed_addr constant [2 x ptr] [ptr blockaddress(@br_aaz, %return), ptr blockaddress(@br_aaz, %l2)], align 8
15  @ptr_ab = private unnamed_addr constant [2 x ptr] [ptr blockaddress(@br_ab, %return), ptr blockaddress(@br_ab, %l2)], align 8
16  @ptr_abz = private unnamed_addr constant [2 x ptr] [ptr blockaddress(@br_abz, %return), ptr blockaddress(@br_abz, %l2)], align 8
17
18  define dso_local i32 @br_aa(i32 %a, i32 %b, i32 %i) {
19  entry:
20    br label %l2
21  l2:
22    br label %return
23  return:
24    ret i32 undef
25  }
26  define dso_local i32 @br_aaz(i32 %a, i32 %b, i32 %i) {
27  entry:
28    br label %l2
29  l2:
30    br label %return
31  return:
32    ret i32 undef
33  }
34  define dso_local i32 @br_ab(i32 %a, i32 %b, i32 %i) {
35  entry:
36    br label %l2
37  l2:
38    br label %return
39  return:
40    ret i32 undef
41  }
42  define dso_local i32 @br_abz(i32 %a, i32 %b, i32 %i) {
43  entry:
44    br label %l2
45  l2:
46    br label %return
47  return:
48    ret i32 undef
49  }
50...
51---
52name:            br_aa
53tracksRegLiveness: true
54body:             |
55  ; CHECK-LABEL: br_aa:
56  bb.0.entry:
57    successors: %bb.2, %bb.1
58    liveins: $w2
59    $x8 = ADRP target-flags(aarch64-page) @ptr_aa
60    renamable $x8 = ADDXri $x8, target-flags(aarch64-pageoff, aarch64-nc) @ptr_aa, 0
61    renamable $x8 = LDRXroW killed renamable $x8, killed renamable $w2, 1, 1
62    BRAA killed renamable $x8, $sp
63  ; CHECK:       braa x8, sp
64  ; ISBDSB-NEXT: dsb sy
65  ; ISBDSB-NEXT: isb
66  ; SB-NEXT:     {{ sb$}}
67
68  bb.1.l2 (ir-block-address-taken %ir-block.l2):
69    renamable $w0 = MOVZWi 1, 0
70    RET undef $lr, implicit $w0
71
72  bb.2.return (ir-block-address-taken %ir-block.return):
73    $w0 = ORRWrs $wzr, $wzr, 0
74    RET undef $lr, implicit $w0
75...
76---
77name:            br_aaz
78tracksRegLiveness: true
79body:             |
80  ; CHECK-LABEL: br_aaz:
81  bb.0.entry:
82    successors: %bb.2, %bb.1
83    liveins: $w2
84    $x8 = ADRP target-flags(aarch64-page) @ptr_aaz
85    renamable $x8 = ADDXri $x8, target-flags(aarch64-pageoff, aarch64-nc) @ptr_aaz, 0
86    renamable $x8 = LDRXroW killed renamable $x8, killed renamable $w2, 1, 1
87    BRAAZ killed renamable $x8
88  ; CHECK:       braaz x8
89  ; ISBDSB-NEXT: dsb sy
90  ; ISBDSB-NEXT: isb
91  ; SB-NEXT:     {{ sb$}}
92
93  bb.1.l2 (ir-block-address-taken %ir-block.l2):
94    renamable $w0 = MOVZWi 1, 0
95    RET undef $lr, implicit $w0
96
97  bb.2.return (ir-block-address-taken %ir-block.return):
98    $w0 = ORRWrs $wzr, $wzr, 0
99    RET undef $lr, implicit $w0
100...
101---
102name:            br_ab
103tracksRegLiveness: true
104body:             |
105  ; CHECK-LABEL: br_ab:
106  bb.0.entry:
107    successors: %bb.2, %bb.1
108    liveins: $w2
109    $x8 = ADRP target-flags(aarch64-page) @ptr_ab
110    renamable $x8 = ADDXri $x8, target-flags(aarch64-pageoff, aarch64-nc) @ptr_ab, 0
111    renamable $x8 = LDRXroW killed renamable $x8, killed renamable $w2, 1, 1
112    BRAA killed renamable $x8, $sp
113  ; CHECK:       braa x8, sp
114  ; ISBDSB-NEXT: dsb sy
115  ; ISBDSB-NEXT: isb
116  ; SB-NEXT:     {{ sb$}}
117
118  bb.1.l2 (ir-block-address-taken %ir-block.l2):
119    renamable $w0 = MOVZWi 1, 0
120    RET undef $lr, implicit $w0
121
122  bb.2.return (ir-block-address-taken %ir-block.return):
123    $w0 = ORRWrs $wzr, $wzr, 0
124    RET undef $lr, implicit $w0
125...
126---
127name:            br_abz
128tracksRegLiveness: true
129body:             |
130  ; CHECK-LABEL: br_abz:
131  bb.0.entry:
132    successors: %bb.2, %bb.1
133    liveins: $w2
134    $x8 = ADRP target-flags(aarch64-page) @ptr_abz
135    renamable $x8 = ADDXri $x8, target-flags(aarch64-pageoff, aarch64-nc) @ptr_abz, 0
136    renamable $x8 = LDRXroW killed renamable $x8, killed renamable $w2, 1, 1
137    BRAAZ killed renamable $x8
138  ; CHECK:       braaz x8
139  ; ISBDSB-NEXT: dsb sy
140  ; ISBDSB-NEXT: isb
141  ; SB-NEXT:     {{ sb$}}
142
143  bb.1.l2 (ir-block-address-taken %ir-block.l2):
144    renamable $w0 = MOVZWi 1, 0
145    RET undef $lr, implicit $w0
146
147  bb.2.return (ir-block-address-taken %ir-block.return):
148    $w0 = ORRWrs $wzr, $wzr, 0
149    RET undef $lr, implicit $w0
150...
151