xref: /llvm-project/llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll (revision 3acaf04033a5128ea6e5dbfee9827e2af709b013)
1; RUN: sed -e 's/SLHATTR/speculative_load_hardening/' %s | llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu 2>&1 | FileCheck %s --check-prefixes=CHECK,SLH
2; RUN: sed -e 's/SLHATTR//' %s | llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu 2>&1 | FileCheck %s --check-prefixes=CHECK,NOSLH
3
4; As SLH is falling back to a technique that doesn't use X16, we shouldn't see any warnings about clobbers.
5; (this would come from f_clobbered_reg_w16, but warnings are first in the output)
6; CHECK-NOT: warning: inline asm clobber list contains reserved registers: W16
7; CHECK-NOT: warning: inline asm clobber list contains reserved registers: X16
8
9declare i64 @g(i64, i64) local_unnamed_addr
10define i64 @f_using_reserved_reg_x16(i64 %a, i64 %b) local_unnamed_addr SLHATTR {
11; CHECK-LABEL: f_using_reserved_reg_x16
12; SLH: dsb sy
13; SLH: isb
14; NOSLH-NOT: dsb sy
15; NOSLH-NOT: isb
16entry:
17  %cmp = icmp ugt i64 %a, %b
18  br i1 %cmp, label %if.then, label %cleanup
19
20; CHECK: b.ls
21; SLH: dsb sy
22; SLH: isb
23; NOSLH-NOT: dsb sy
24; NOSLH-NOT: isb
25if.then:
26  %0 = tail call i64 asm "hint #12", "={x17},{x16},0"(i64 %b, i64 %a)
27; CHECK: bl g
28; SLH: dsb sy
29; SLH: isb
30; NOSLH-NOT: dsb sy
31; NOSLH-NOT: isb
32; CHECK: ret
33  %call = tail call i64 @g(i64 %a, i64 %b) #3
34  %add = add i64 %call, %0
35  br label %cleanup
36
37cleanup:
38; SLH: dsb sy
39; SLH: isb
40; NOSLH-NOT: dsb sy
41; NOSLH-NOT: isb
42; SLH: ret
43  %retval.0 = phi i64 [ %add, %if.then ], [ %b, %entry ]
44  ret i64 %retval.0
45}
46
47define i32 @f_clobbered_reg_w16(i32 %a, i32 %b) local_unnamed_addr SLHATTR {
48; CHECK-LABEL: f_clobbered_reg_w16
49entry:
50; SLH: dsb sy
51; SLH: isb
52; NOSLH-NOT: dsb sy
53; NOSLH-NOT: isb
54  %cmp = icmp sgt i32 %a, %b
55  br i1 %cmp, label %if.then, label %if.end
56; CHECK: b.le
57
58if.then:
59; SLH: dsb sy
60; SLH: isb
61; NOSLH-NOT: dsb sy
62; NOSLH-NOT: isb
63; CHECK: mov w16, w0
64  tail call void asm sideeffect "mov w16, ${0:w}", "r,~{w16}"(i32 %a)
65  br label %if.end
66; SLH: ret
67
68if.end:
69  %add = add nsw i32 %b, %a
70  ret i32 %add
71; SLH: dsb sy
72; SLH: isb
73; NOSLH-NOT: dsb sy
74; NOSLH-NOT: isb
75; SLH: ret
76}
77