xref: /llvm-project/llvm/test/CodeGen/AArch64/sms-unacceptable-loop2.mir (revision 374a600df7207fbe2002e754a799c7595a0e4833)
1# RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -pipeliner-enable-copytophi=0 -debug-only=pipeliner 2>&1 | FileCheck %s
2# REQUIRES: asserts
3
4# An unacceptable loop by pipeliner: The operand of the compare and branch is not defined in the loop
5# CHECK: Unable to analyzeLoop, can NOT pipeline Loop
6
7--- |
8  define dso_local void @func(ptr noalias nocapture noundef writeonly %a, ptr nocapture noundef readonly %b, i32 noundef %n) local_unnamed_addr #0 {
9  entry:
10    %or.cond = icmp ult i32 %n, 2
11    br i1 %or.cond, label %for.end, label %for.body.preheader
12
13  for.body.preheader:                               ; preds = %entry
14    %i.07 = add i32 %n, -1
15    %0 = sext i32 %i.07 to i64
16    br label %for.body
17
18  for.body:                                         ; preds = %for.body.preheader, %for.body
19    %indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
20    %1 = shl nsw i64 %indvars.iv, 2
21    %scevgep = getelementptr i8, ptr %b, i64 %1
22    %2 = load float, ptr %scevgep, align 4
23    %add = fadd float %2, 1.000000e+00
24    %3 = shl nsw i64 %indvars.iv, 2
25    %scevgep11 = getelementptr i8, ptr %a, i64 %3
26    store float %add, ptr %scevgep11, align 4
27    %indvars.iv.next = add nsw i64 %indvars.iv, -1
28    %4 = add i64 %indvars.iv, -1
29    %5 = and i64 %4, 4294967295
30    %tobool.not = icmp eq i64 %5, 0
31    br i1 %tobool.not, label %for.end, label %for.body
32
33  for.end:                                          ; preds = %for.body, %entry
34    ret void
35  }
36
37...
38---
39name:            func
40tracksRegLiveness: true
41liveins:
42  - { reg: '$x0', virtual-reg: '%3' }
43  - { reg: '$x1', virtual-reg: '%4' }
44  - { reg: '$w2', virtual-reg: '%5' }
45body:             |
46  bb.0.entry:
47    liveins: $x0, $x1, $w2
48
49    %5:gpr32common = COPY $w2
50    %4:gpr64common = COPY $x1
51    %3:gpr64common = COPY $x0
52    dead $wzr = SUBSWri %5, 2, 0, implicit-def $nzcv
53    Bcc 3, %bb.3, implicit $nzcv
54    B %bb.1
55
56  bb.1.for.body.preheader:
57    %7:gpr32common = SUBWri %5, 1, 0
58    %9:gpr64all = IMPLICIT_DEF
59    %8:gpr64 = SUBREG_TO_REG 0, killed %7, %subreg.sub_32
60    %10:gpr64 = SBFMXri killed %8, 0, 31
61    %0:gpr64all = COPY %10
62    %12:fpr32 = FMOVSi 112
63    %16:gpr32 = COPY %10.sub_32
64
65  bb.2.for.body:
66    successors: %bb.3(0x04000000), %bb.2(0x7c000000)
67
68    %1:gpr64common = PHI %0, %bb.1, %2, %bb.2
69    %11:fpr32 = LDRSroX %4, %1, 0, 1 :: (load (s32) from %ir.scevgep)
70    %13:fpr32 = nofpexcept FADDSrr killed %11, %12, implicit $fpcr
71    STRSroX killed %13, %3, %1, 0, 1 :: (store (s32) into %ir.scevgep11)
72    %14:gpr64common = SUBXri %1, 1, 0
73    %2:gpr64all = COPY %14
74    %15:gpr32 = COPY %14.sub_32
75    CBZW %16, %bb.3
76    B %bb.2
77
78  bb.3.for.end:
79    RET_ReallyLR
80
81...
82