xref: /llvm-project/llvm/test/CodeGen/AArch64/sms-mve4.mir (revision 0c5319e546321d7a766999e49e0ccf801ff2b3dc)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
2# RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -pipeliner-mve-cg -pipeliner-force-ii=3 -mcpu=neoverse-n1 2>&1 | FileCheck %s
3
4# test pipeliner code genearation by MVE algorithm
5# no dedicated exit
6
7...
8---
9name:            func
10tracksRegLiveness: true
11body:             |
12  ; CHECK-LABEL: name: func
13  ; CHECK: bb.0.entry:
14  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
15  ; CHECK-NEXT:   liveins: $x0, $x1
16  ; CHECK-NEXT: {{  $}}
17  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr64 = COPY $x0
18  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
19  ; CHECK-NEXT:   [[FMOVDi:%[0-9]+]]:fpr64 = FMOVDi 1
20  ; CHECK-NEXT:   dead [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY]], [[COPY1]], implicit-def $nzcv
21  ; CHECK-NEXT:   Bcc 0, %bb.3, implicit $nzcv
22  ; CHECK-NEXT: {{  $}}
23  ; CHECK-NEXT: bb.1:
24  ; CHECK-NEXT:   successors: %bb.4(0x80000000)
25  ; CHECK-NEXT: {{  $}}
26  ; CHECK-NEXT:   B %bb.4
27  ; CHECK-NEXT: {{  $}}
28  ; CHECK-NEXT: bb.4:
29  ; CHECK-NEXT:   successors: %bb.5(0x40000000), %bb.8(0x40000000)
30  ; CHECK-NEXT: {{  $}}
31  ; CHECK-NEXT:   [[ADDXrr:%[0-9]+]]:gpr64 = ADDXrr [[COPY1]], [[COPY1]]
32  ; CHECK-NEXT:   dead $xzr = SUBSXrr [[COPY]], [[ADDXrr]], implicit-def $nzcv
33  ; CHECK-NEXT:   [[CSINCXr:%[0-9]+]]:gpr64common = CSINCXr $xzr, $xzr, 1, implicit $nzcv
34  ; CHECK-NEXT:   [[ADDXrr1:%[0-9]+]]:gpr64 = ADDXrr [[ADDXrr]], [[COPY1]]
35  ; CHECK-NEXT:   dead $xzr = SUBSXrr [[COPY]], [[ADDXrr1]], implicit-def $nzcv
36  ; CHECK-NEXT:   [[CSINCXr1:%[0-9]+]]:gpr64common = CSINCXr [[CSINCXr]], [[CSINCXr]], 1, implicit $nzcv
37  ; CHECK-NEXT:   dead $xzr = SUBSXri [[CSINCXr1]], 0, 0, implicit-def $nzcv
38  ; CHECK-NEXT:   Bcc 0, %bb.5, implicit $nzcv
39  ; CHECK-NEXT:   B %bb.8
40  ; CHECK-NEXT: {{  $}}
41  ; CHECK-NEXT: bb.5:
42  ; CHECK-NEXT:   successors: %bb.6(0x80000000)
43  ; CHECK-NEXT: {{  $}}
44  ; CHECK-NEXT:   [[FADDDrr:%[0-9]+]]:fpr64 = FADDDrr [[FMOVDi]], [[FMOVDi]], implicit $fpcr
45  ; CHECK-NEXT:   [[ADDXrr2:%[0-9]+]]:gpr64 = ADDXrr [[COPY1]], [[COPY1]]
46  ; CHECK-NEXT:   dead $xzr = SUBSXrr [[COPY]], [[ADDXrr2]], implicit-def $nzcv
47  ; CHECK-NEXT:   [[FADDDrr1:%[0-9]+]]:fpr64 = FADDDrr [[FADDDrr]], [[FADDDrr]], implicit $fpcr
48  ; CHECK-NEXT: {{  $}}
49  ; CHECK-NEXT: bb.6:
50  ; CHECK-NEXT:   successors: %bb.6(0x40000000), %bb.7(0x40000000)
51  ; CHECK-NEXT: {{  $}}
52  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:fpr64 = PHI [[FADDDrr2:%[0-9]+]], %bb.6, [[FADDDrr]], %bb.5
53  ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:gpr64 = PHI [[ADDXrr3:%[0-9]+]], %bb.6, [[ADDXrr2]], %bb.5
54  ; CHECK-NEXT:   [[PHI2:%[0-9]+]]:fpr64 = PHI [[FADDDrr4:%[0-9]+]], %bb.6, [[FADDDrr1]], %bb.5
55  ; CHECK-NEXT:   [[FADDDrr2]]:fpr64 = FADDDrr [[FMOVDi]], [[PHI]], implicit $fpcr
56  ; CHECK-NEXT:   [[ADDXrr3]]:gpr64 = ADDXrr [[PHI1]], [[COPY1]]
57  ; CHECK-NEXT:   [[FADDDrr3:%[0-9]+]]:fpr64 = FADDDrr [[PHI2]], [[PHI2]], implicit $fpcr
58  ; CHECK-NEXT:   dead $xzr = SUBSXrr [[COPY]], [[ADDXrr3]], implicit-def $nzcv
59  ; CHECK-NEXT:   [[FADDDrr4]]:fpr64 = FADDDrr [[FADDDrr2]], [[FADDDrr2]], implicit $fpcr
60  ; CHECK-NEXT:   [[CSINCXr2:%[0-9]+]]:gpr64common = CSINCXr $xzr, $xzr, 1, implicit $nzcv
61  ; CHECK-NEXT:   dead $xzr = SUBSXri [[CSINCXr2]], 0, 0, implicit-def $nzcv
62  ; CHECK-NEXT:   Bcc 0, %bb.6, implicit $nzcv
63  ; CHECK-NEXT:   B %bb.7
64  ; CHECK-NEXT: {{  $}}
65  ; CHECK-NEXT: bb.7:
66  ; CHECK-NEXT:   successors: %bb.8(0x40000000), %bb.9(0x40000000)
67  ; CHECK-NEXT: {{  $}}
68  ; CHECK-NEXT:   [[FADDDrr5:%[0-9]+]]:fpr64 = FADDDrr [[FADDDrr4]], [[FADDDrr4]], implicit $fpcr
69  ; CHECK-NEXT:   dead $xzr = SUBSXrr [[COPY]], [[ADDXrr3]], implicit-def $nzcv
70  ; CHECK-NEXT:   [[CSINCXr3:%[0-9]+]]:gpr64common = CSINCXr $xzr, $xzr, 1, implicit $nzcv
71  ; CHECK-NEXT:   dead $xzr = SUBSXri [[CSINCXr3]], 0, 0, implicit-def $nzcv
72  ; CHECK-NEXT:   Bcc 0, %bb.8, implicit $nzcv
73  ; CHECK-NEXT:   B %bb.9
74  ; CHECK-NEXT: {{  $}}
75  ; CHECK-NEXT: bb.8:
76  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
77  ; CHECK-NEXT: {{  $}}
78  ; CHECK-NEXT:   [[PHI3:%[0-9]+]]:fpr64 = PHI [[FMOVDi]], %bb.4, [[FADDDrr2]], %bb.7
79  ; CHECK-NEXT:   [[PHI4:%[0-9]+]]:gpr64 = PHI [[COPY1]], %bb.4, [[ADDXrr3]], %bb.7
80  ; CHECK-NEXT:   B %bb.2
81  ; CHECK-NEXT: {{  $}}
82  ; CHECK-NEXT: bb.9:
83  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
84  ; CHECK-NEXT: {{  $}}
85  ; CHECK-NEXT:   [[PHI5:%[0-9]+]]:fpr64 = PHI [[FADDDrr8:%[0-9]+]], %bb.2, [[FADDDrr5]], %bb.7
86  ; CHECK-NEXT:   B %bb.3
87  ; CHECK-NEXT: {{  $}}
88  ; CHECK-NEXT: bb.2:
89  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.9(0x40000000)
90  ; CHECK-NEXT: {{  $}}
91  ; CHECK-NEXT:   [[PHI6:%[0-9]+]]:gpr64 = PHI [[PHI4]], %bb.8, [[ADDXrr4:%[0-9]+]], %bb.2
92  ; CHECK-NEXT:   [[PHI7:%[0-9]+]]:fpr64 = PHI [[PHI3]], %bb.8, [[FADDDrr6:%[0-9]+]], %bb.2
93  ; CHECK-NEXT:   [[ADDXrr4]]:gpr64 = ADDXrr [[PHI6]], [[COPY1]]
94  ; CHECK-NEXT:   dead $xzr = SUBSXrr [[COPY]], [[ADDXrr4]], implicit-def $nzcv
95  ; CHECK-NEXT:   [[FADDDrr6]]:fpr64 = FADDDrr [[FMOVDi]], [[PHI7]], implicit $fpcr
96  ; CHECK-NEXT:   [[FADDDrr7:%[0-9]+]]:fpr64 = FADDDrr [[FADDDrr6]], [[FADDDrr6]], implicit $fpcr
97  ; CHECK-NEXT:   [[FADDDrr8]]:fpr64 = FADDDrr [[FADDDrr7]], [[FADDDrr7]], implicit $fpcr
98  ; CHECK-NEXT:   Bcc 1, %bb.2, implicit $nzcv
99  ; CHECK-NEXT:   B %bb.9
100  ; CHECK-NEXT: {{  $}}
101  ; CHECK-NEXT: bb.3:
102  ; CHECK-NEXT:   [[PHI8:%[0-9]+]]:fpr64 = PHI [[FMOVDi]], %bb.0, [[PHI5]], %bb.9
103  ; CHECK-NEXT:   $d0 = COPY [[PHI8]]
104  ; CHECK-NEXT:   RET_ReallyLR implicit $d0
105  bb.0.entry:
106    liveins: $x0, $x1
107    %10:gpr64 = COPY $x0
108    %11:gpr64 = COPY $x1
109    %20:fpr64 = FMOVDi 1
110    dead %15:gpr64 = SUBSXrr %10, %11, implicit-def $nzcv
111    Bcc 0, %bb.3, implicit $nzcv
112
113  bb.1:
114
115  bb.2:
116    %12:gpr64 = PHI %11, %bb.1, %13, %bb.2
117    %24:fpr64 = PHI %20, %bb.1, %21, %bb.2
118    %13:gpr64 = ADDXrr %12, %11
119    dead $xzr = SUBSXrr %10, %13, implicit-def $nzcv
120    %21:fpr64 = FADDDrr %20, %24, implicit $fpcr
121    %22:fpr64 = FADDDrr %21, %21, implicit $fpcr
122    %23:fpr64 = FADDDrr %22, %22, implicit $fpcr
123    Bcc 1, %bb.2, implicit $nzcv
124    B %bb.3
125
126  bb.3:
127    %25:fpr64 = PHI %20, %bb.0, %23, %bb.2
128    $d0 = COPY %25
129    RET_ReallyLR implicit $d0
130...
131