1# RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -pipeliner-enable-copytophi=0 -debug-only=pipeliner 2>&1 | FileCheck %s 2# REQUIRES: asserts 3 4# Compare and branch instructions are not supported now. 5# CHECK: Unable to analyzeLoop, can NOT pipeline Loop 6 7# (if supported) An acceptable loop by pipeliner: TBB == ExitBB, FBB == LoopBB, Compare and branch 8# CHECK(if supported): Schedule Found? 1 9 10--- | 11 define dso_local void @func(ptr noalias nocapture noundef writeonly %a, ptr nocapture noundef readonly %b, i32 noundef %n) local_unnamed_addr #0 { 12 entry: 13 %or.cond = icmp ult i32 %n, 2 14 br i1 %or.cond, label %for.end, label %for.body.preheader 15 16 for.body.preheader: ; preds = %entry 17 %i.07 = add i32 %n, -1 18 %0 = sext i32 %i.07 to i64 19 br label %for.body 20 21 for.body: ; preds = %for.body.preheader, %for.body 22 %indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ] 23 %1 = shl nsw i64 %indvars.iv, 2 24 %scevgep = getelementptr i8, ptr %b, i64 %1 25 %2 = load float, ptr %scevgep, align 4 26 %add = fadd float %2, 1.000000e+00 27 %3 = shl nsw i64 %indvars.iv, 2 28 %scevgep11 = getelementptr i8, ptr %a, i64 %3 29 store float %add, ptr %scevgep11, align 4 30 %indvars.iv.next = add nsw i64 %indvars.iv, -1 31 %4 = add i64 %indvars.iv, -1 32 %5 = and i64 %4, 4294967295 33 %tobool.not = icmp eq i64 %5, 0 34 br i1 %tobool.not, label %for.end, label %for.body 35 36 for.end: ; preds = %for.body, %entry 37 ret void 38 } 39 40... 41--- 42name: func 43tracksRegLiveness: true 44liveins: 45 - { reg: '$x0', virtual-reg: '%3' } 46 - { reg: '$x1', virtual-reg: '%4' } 47 - { reg: '$w2', virtual-reg: '%5' } 48body: | 49 bb.0.entry: 50 liveins: $x0, $x1, $w2 51 52 %5:gpr32common = COPY $w2 53 %4:gpr64common = COPY $x1 54 %3:gpr64common = COPY $x0 55 dead $wzr = SUBSWri %5, 2, 0, implicit-def $nzcv 56 Bcc 3, %bb.3, implicit $nzcv 57 B %bb.1 58 59 bb.1.for.body.preheader: 60 %7:gpr32common = SUBWri %5, 1, 0 61 %9:gpr64all = IMPLICIT_DEF 62 %8:gpr64 = SUBREG_TO_REG 0, killed %7, %subreg.sub_32 63 %10:gpr64 = SBFMXri killed %8, 0, 31 64 %0:gpr64all = COPY %10 65 %12:fpr32 = FMOVSi 112 66 67 bb.2.for.body: 68 successors: %bb.3(0x04000000), %bb.2(0x7c000000) 69 70 %1:gpr64common = PHI %0, %bb.1, %2, %bb.2 71 %11:fpr32 = LDRSroX %4, %1, 0, 1 :: (load (s32) from %ir.scevgep) 72 %13:fpr32 = nofpexcept FADDSrr killed %11, %12, implicit $fpcr 73 STRSroX killed %13, %3, %1, 0, 1 :: (store (s32) into %ir.scevgep11) 74 %14:gpr64common = SUBXri %1, 1, 0 75 %2:gpr64all = COPY %14 76 %15:gpr32 = COPY %14.sub_32 77 CBZW killed %15, %bb.3 78 B %bb.2 79 80 bb.3.for.end: 81 RET_ReallyLR 82 83... 84