1; RUN: opt -S -mtriple=aarch64-linux-gnu -aarch64-sme-abi %s | FileCheck %s 2; RUN: opt -S -mtriple=aarch64-linux-gnu -aarch64-sme-abi -aarch64-sme-abi %s | FileCheck %s 3 4declare void @shared_za_callee() "aarch64_inout_za" 5 6define void @private_za() "aarch64_new_za" { 7; CHECK-LABEL: @private_za( 8; CHECK-NEXT: prelude: 9; CHECK-NEXT: [[TPIDR2:%.*]] = call i64 @llvm.aarch64.sme.get.tpidr2() 10; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[TPIDR2]], 0 11; CHECK-NEXT: br i1 [[CMP]], label [[SAVE_ZA:%.*]], label [[TMP0:%.*]] 12; CHECK: save.za: 13; CHECK-NEXT: call aarch64_sme_preservemost_from_x0 void @__arm_tpidr2_save() 14; CHECK-NEXT: call void @llvm.aarch64.sme.set.tpidr2(i64 0) 15; CHECK-NEXT: br label [[TMP0]] 16; CHECK: 0: 17; CHECK-NEXT: call void @llvm.aarch64.sme.za.enable() 18; CHECK-NEXT: call void @llvm.aarch64.sme.zero(i32 255) 19; CHECK-NEXT: call void @shared_za_callee() 20; CHECK-NEXT: call void @llvm.aarch64.sme.za.disable() 21; CHECK-NEXT: ret void 22; 23 call void @shared_za_callee() 24 ret void 25} 26 27define i32 @private_za_multiple_exit(i32 %a, i32 %b, i64 %cond) "aarch64_new_za" { 28; CHECK-LABEL: @private_za_multiple_exit( 29; CHECK-NEXT: prelude: 30; CHECK-NEXT: [[TPIDR2:%.*]] = call i64 @llvm.aarch64.sme.get.tpidr2() 31; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[TPIDR2]], 0 32; CHECK-NEXT: br i1 [[CMP]], label [[SAVE_ZA:%.*]], label [[ENTRY:%.*]] 33; CHECK: save.za: 34; CHECK-NEXT: call aarch64_sme_preservemost_from_x0 void @__arm_tpidr2_save() 35; CHECK-NEXT: call void @llvm.aarch64.sme.set.tpidr2(i64 0) 36; CHECK-NEXT: br label [[ENTRY]] 37; CHECK: entry: 38; CHECK-NEXT: call void @llvm.aarch64.sme.za.enable() 39; CHECK-NEXT: call void @llvm.aarch64.sme.zero(i32 255) 40; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[COND:%.*]], 1 41; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_ELSE:%.*]], label [[IF_END:%.*]] 42; CHECK: if.else: 43; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A:%.*]], [[B:%.*]] 44; CHECK-NEXT: call void @llvm.aarch64.sme.za.disable() 45; CHECK-NEXT: ret i32 [[ADD]] 46; CHECK: if.end: 47; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], [[B]] 48; CHECK-NEXT: call void @llvm.aarch64.sme.za.disable() 49; CHECK-NEXT: ret i32 [[SUB]] 50; 51entry: 52 %tobool = icmp eq i64 %cond, 1 53 br i1 %tobool, label %if.else, label %if.end 54 55if.else: 56 %add = add i32 %a, %b 57 ret i32 %add 58 59if.end: 60 %sub = sub i32 %a, %b 61 ret i32 %sub 62} 63 64; CHECK: declare void @__arm_tpidr2_save() #[[ATTR:[0-9]+]] 65; CHECK: attributes #[[ATTR]] = { "aarch64_pstate_sm_compatible" } 66