1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -o - | FileCheck %s 3 4define <16 x i8> @shl_v16i8(<16 x i8> %a) { 5; CHECK-LABEL: shl_v16i8: 6; CHECK: // %bb.0: // %entry 7; CHECK-NEXT: add v0.16b, v0.16b, v0.16b 8; CHECK-NEXT: ret 9entry: 10 %add.i = shl <16 x i8> %a, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1> 11 ret <16 x i8> %add.i 12} 13 14define <8 x i16> @shl_v8i16(<8 x i16> %a) { 15; CHECK-LABEL: shl_v8i16: 16; CHECK: // %bb.0: // %entry 17; CHECK-NEXT: add v0.8h, v0.8h, v0.8h 18; CHECK-NEXT: ret 19entry: 20 %add.i = shl <8 x i16> %a, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> 21 ret <8 x i16> %add.i 22} 23 24define <4 x i32> @shl_v4i32(<4 x i32> %a) { 25; CHECK-LABEL: shl_v4i32: 26; CHECK: // %bb.0: // %entry 27; CHECK-NEXT: add v0.4s, v0.4s, v0.4s 28; CHECK-NEXT: ret 29entry: 30 %add.i = shl <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1> 31 ret <4 x i32> %add.i 32} 33 34define <2 x i64> @shl_v2i64(<2 x i64> %a) { 35; CHECK-LABEL: shl_v2i64: 36; CHECK: // %bb.0: // %entry 37; CHECK-NEXT: add v0.2d, v0.2d, v0.2d 38; CHECK-NEXT: ret 39entry: 40 %add.i = shl <2 x i64> %a, <i64 1, i64 1> 41 ret <2 x i64> %add.i 42} 43 44define <8 x i8> @shl_v8i8(<8 x i8> %a) { 45; CHECK-LABEL: shl_v8i8: 46; CHECK: // %bb.0: // %entry 47; CHECK-NEXT: add v0.8b, v0.8b, v0.8b 48; CHECK-NEXT: ret 49entry: 50 %add.i = shl <8 x i8> %a, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1> 51 ret <8 x i8> %add.i 52} 53 54define <4 x i16> @shl_v4i16(<4 x i16> %a) { 55; CHECK-LABEL: shl_v4i16: 56; CHECK: // %bb.0: // %entry 57; CHECK-NEXT: add v0.4h, v0.4h, v0.4h 58; CHECK-NEXT: ret 59entry: 60 %add.i = shl <4 x i16> %a, <i16 1, i16 1, i16 1, i16 1> 61 ret <4 x i16> %add.i 62} 63 64define <2 x i32> @shl_v2i32(<2 x i32> %a) { 65; CHECK-LABEL: shl_v2i32: 66; CHECK: // %bb.0: // %entry 67; CHECK-NEXT: add v0.2s, v0.2s, v0.2s 68; CHECK-NEXT: ret 69entry: 70 %add.i = shl <2 x i32> %a, <i32 1, i32 1> 71 ret <2 x i32> %add.i 72} 73 74define <8 x i16> @sshll_v8i8(<8 x i8> %a) { 75; CHECK-LABEL: sshll_v8i8: 76; CHECK: // %bb.0: 77; CHECK-NEXT: sshll v0.8h, v0.8b, #1 78; CHECK-NEXT: ret 79 %1 = sext <8 x i8> %a to <8 x i16> 80 %tmp = shl <8 x i16> %1, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> 81 ret <8 x i16> %tmp 82} 83 84define <4 x i32> @sshll_v4i16(<4 x i16> %a) { 85; CHECK-LABEL: sshll_v4i16: 86; CHECK: // %bb.0: 87; CHECK-NEXT: sshll v0.4s, v0.4h, #1 88; CHECK-NEXT: ret 89 %1 = sext <4 x i16> %a to <4 x i32> 90 %tmp = shl <4 x i32> %1, <i32 1, i32 1, i32 1, i32 1> 91 ret <4 x i32> %tmp 92} 93 94define <2 x i64> @sshll_v2i32(<2 x i32> %a) { 95; CHECK-LABEL: sshll_v2i32: 96; CHECK: // %bb.0: 97; CHECK-NEXT: sshll v0.2d, v0.2s, #1 98; CHECK-NEXT: ret 99 %1 = sext <2 x i32> %a to <2 x i64> 100 %tmp = shl <2 x i64> %1, <i64 1, i64 1> 101 ret <2 x i64> %tmp 102} 103 104define <8 x i16> @ushll_v8i8(<8 x i8> %a) { 105; CHECK-LABEL: ushll_v8i8: 106; CHECK: // %bb.0: 107; CHECK-NEXT: ushll v0.8h, v0.8b, #1 108; CHECK-NEXT: ret 109 %1 = zext <8 x i8> %a to <8 x i16> 110 %tmp = shl <8 x i16> %1, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> 111 ret <8 x i16> %tmp 112} 113 114define <4 x i32> @ushll_v4i16(<4 x i16> %a) { 115; CHECK-LABEL: ushll_v4i16: 116; CHECK: // %bb.0: 117; CHECK-NEXT: ushll v0.4s, v0.4h, #1 118; CHECK-NEXT: ret 119 %1 = zext <4 x i16> %a to <4 x i32> 120 %tmp = shl <4 x i32> %1, <i32 1, i32 1, i32 1, i32 1> 121 ret <4 x i32> %tmp 122} 123 124define <2 x i64> @ushll_v2i32(<2 x i32> %a) { 125; CHECK-LABEL: ushll_v2i32: 126; CHECK: // %bb.0: 127; CHECK-NEXT: ushll v0.2d, v0.2s, #1 128; CHECK-NEXT: ret 129 %1 = zext <2 x i32> %a to <2 x i64> 130 %tmp = shl <2 x i64> %1, <i64 1, i64 1> 131 ret <2 x i64> %tmp 132} 133