xref: /llvm-project/llvm/test/CodeGen/AArch64/rmif-use-nzcv.mir (revision f5e1ec8c5804ab7bd36f9acd43124b2029fbabc4)
1# RUN: not llc -o - %s -mtriple=arm64-eabi -run-pass=legalizer 2>&1 | FileCheck %s
2
3# CHECK: [[@LINE+10]]:45: missing implicit register operand 'implicit-def $nzcv'
4...
5---
6name:            test_flags
7liveins:
8  - { reg: '$x0' }
9body:             |
10  bb.0:
11    liveins: $x0
12
13    RMIF renamable $x0, 0, 0, implicit $nzcv
14    RET undef $lr, implicit killed $w0
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