xref: /llvm-project/llvm/test/CodeGen/AArch64/pull-binop-through-shift.ll (revision 5ddce70ef0e5a641d7fea95e31fc5e2439cb98cb) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
3
4; shift left
5
6define i32 @and_signbit_shl(i32 %x, ptr %dst) {
7; CHECK-LABEL: and_signbit_shl:
8; CHECK:       // %bb.0:
9; CHECK-NEXT:    lsl w8, w0, #8
10; CHECK-NEXT:    and w0, w8, #0xff000000
11; CHECK-NEXT:    str w0, [x1]
12; CHECK-NEXT:    ret
13  %t0 = and i32 %x, 4294901760 ; 0xFFFF0000
14  %r = shl i32 %t0, 8
15  store i32 %r, ptr %dst
16  ret i32 %r
17}
18define i32 @and_nosignbit_shl(i32 %x, ptr %dst) {
19; CHECK-LABEL: and_nosignbit_shl:
20; CHECK:       // %bb.0:
21; CHECK-NEXT:    lsl w8, w0, #8
22; CHECK-NEXT:    and w0, w8, #0xff000000
23; CHECK-NEXT:    str w0, [x1]
24; CHECK-NEXT:    ret
25  %t0 = and i32 %x, 2147418112 ; 0x7FFF0000
26  %r = shl i32 %t0, 8
27  store i32 %r, ptr %dst
28  ret i32 %r
29}
30
31define i32 @or_signbit_shl(i32 %x, ptr %dst) {
32; CHECK-LABEL: or_signbit_shl:
33; CHECK:       // %bb.0:
34; CHECK-NEXT:    lsl w8, w0, #8
35; CHECK-NEXT:    orr w0, w8, #0xff000000
36; CHECK-NEXT:    str w0, [x1]
37; CHECK-NEXT:    ret
38  %t0 = or i32 %x, 4294901760 ; 0xFFFF0000
39  %r = shl i32 %t0, 8
40  store i32 %r, ptr %dst
41  ret i32 %r
42}
43define i32 @or_nosignbit_shl(i32 %x, ptr %dst) {
44; CHECK-LABEL: or_nosignbit_shl:
45; CHECK:       // %bb.0:
46; CHECK-NEXT:    lsl w8, w0, #8
47; CHECK-NEXT:    orr w0, w8, #0xff000000
48; CHECK-NEXT:    str w0, [x1]
49; CHECK-NEXT:    ret
50  %t0 = or i32 %x, 2147418112 ; 0x7FFF0000
51  %r = shl i32 %t0, 8
52  store i32 %r, ptr %dst
53  ret i32 %r
54}
55
56define i32 @xor_signbit_shl(i32 %x, ptr %dst) {
57; CHECK-LABEL: xor_signbit_shl:
58; CHECK:       // %bb.0:
59; CHECK-NEXT:    lsl w8, w0, #8
60; CHECK-NEXT:    eor w0, w8, #0xff000000
61; CHECK-NEXT:    str w0, [x1]
62; CHECK-NEXT:    ret
63  %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
64  %r = shl i32 %t0, 8
65  store i32 %r, ptr %dst
66  ret i32 %r
67}
68define i32 @xor_nosignbit_shl(i32 %x, ptr %dst) {
69; CHECK-LABEL: xor_nosignbit_shl:
70; CHECK:       // %bb.0:
71; CHECK-NEXT:    lsl w8, w0, #8
72; CHECK-NEXT:    eor w0, w8, #0xff000000
73; CHECK-NEXT:    str w0, [x1]
74; CHECK-NEXT:    ret
75  %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
76  %r = shl i32 %t0, 8
77  store i32 %r, ptr %dst
78  ret i32 %r
79}
80
81define i32 @add_signbit_shl(i32 %x, ptr %dst) {
82; CHECK-LABEL: add_signbit_shl:
83; CHECK:       // %bb.0:
84; CHECK-NEXT:    mov w8, #-16777216
85; CHECK-NEXT:    add w0, w8, w0, lsl #8
86; CHECK-NEXT:    str w0, [x1]
87; CHECK-NEXT:    ret
88  %t0 = add i32 %x, 4294901760 ; 0xFFFF0000
89  %r = shl i32 %t0, 8
90  store i32 %r, ptr %dst
91  ret i32 %r
92}
93define i32 @add_nosignbit_shl(i32 %x, ptr %dst) {
94; CHECK-LABEL: add_nosignbit_shl:
95; CHECK:       // %bb.0:
96; CHECK-NEXT:    mov w8, #-16777216
97; CHECK-NEXT:    add w0, w8, w0, lsl #8
98; CHECK-NEXT:    str w0, [x1]
99; CHECK-NEXT:    ret
100  %t0 = add i32 %x, 2147418112 ; 0x7FFF0000
101  %r = shl i32 %t0, 8
102  store i32 %r, ptr %dst
103  ret i32 %r
104}
105
106; logical shift right
107
108define i32 @and_signbit_lshr(i32 %x, ptr %dst) {
109; CHECK-LABEL: and_signbit_lshr:
110; CHECK:       // %bb.0:
111; CHECK-NEXT:    lsr w8, w0, #8
112; CHECK-NEXT:    and w0, w8, #0xffff00
113; CHECK-NEXT:    str w0, [x1]
114; CHECK-NEXT:    ret
115  %t0 = and i32 %x, 4294901760 ; 0xFFFF0000
116  %r = lshr i32 %t0, 8
117  store i32 %r, ptr %dst
118  ret i32 %r
119}
120define i32 @and_nosignbit_lshr(i32 %x, ptr %dst) {
121; CHECK-LABEL: and_nosignbit_lshr:
122; CHECK:       // %bb.0:
123; CHECK-NEXT:    lsr w8, w0, #8
124; CHECK-NEXT:    and w0, w8, #0x7fff00
125; CHECK-NEXT:    str w0, [x1]
126; CHECK-NEXT:    ret
127  %t0 = and i32 %x, 2147418112 ; 0x7FFF0000
128  %r = lshr i32 %t0, 8
129  store i32 %r, ptr %dst
130  ret i32 %r
131}
132
133define i32 @or_signbit_lshr(i32 %x, ptr %dst) {
134; CHECK-LABEL: or_signbit_lshr:
135; CHECK:       // %bb.0:
136; CHECK-NEXT:    lsr w8, w0, #8
137; CHECK-NEXT:    orr w0, w8, #0xffff00
138; CHECK-NEXT:    str w0, [x1]
139; CHECK-NEXT:    ret
140  %t0 = or i32 %x, 4294901760 ; 0xFFFF0000
141  %r = lshr i32 %t0, 8
142  store i32 %r, ptr %dst
143  ret i32 %r
144}
145define i32 @or_nosignbit_lshr(i32 %x, ptr %dst) {
146; CHECK-LABEL: or_nosignbit_lshr:
147; CHECK:       // %bb.0:
148; CHECK-NEXT:    lsr w8, w0, #8
149; CHECK-NEXT:    orr w0, w8, #0x7fff00
150; CHECK-NEXT:    str w0, [x1]
151; CHECK-NEXT:    ret
152  %t0 = or i32 %x, 2147418112 ; 0x7FFF0000
153  %r = lshr i32 %t0, 8
154  store i32 %r, ptr %dst
155  ret i32 %r
156}
157
158define i32 @xor_signbit_lshr(i32 %x, ptr %dst) {
159; CHECK-LABEL: xor_signbit_lshr:
160; CHECK:       // %bb.0:
161; CHECK-NEXT:    lsr w8, w0, #8
162; CHECK-NEXT:    eor w0, w8, #0xffff00
163; CHECK-NEXT:    str w0, [x1]
164; CHECK-NEXT:    ret
165  %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
166  %r = lshr i32 %t0, 8
167  store i32 %r, ptr %dst
168  ret i32 %r
169}
170define i32 @xor_nosignbit_lshr(i32 %x, ptr %dst) {
171; CHECK-LABEL: xor_nosignbit_lshr:
172; CHECK:       // %bb.0:
173; CHECK-NEXT:    lsr w8, w0, #8
174; CHECK-NEXT:    eor w0, w8, #0x7fff00
175; CHECK-NEXT:    str w0, [x1]
176; CHECK-NEXT:    ret
177  %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
178  %r = lshr i32 %t0, 8
179  store i32 %r, ptr %dst
180  ret i32 %r
181}
182
183define i32 @add_signbit_lshr(i32 %x, ptr %dst) {
184; CHECK-LABEL: add_signbit_lshr:
185; CHECK:       // %bb.0:
186; CHECK-NEXT:    sub w8, w0, #16, lsl #12 // =65536
187; CHECK-NEXT:    lsr w0, w8, #8
188; CHECK-NEXT:    str w0, [x1]
189; CHECK-NEXT:    ret
190  %t0 = add i32 %x, 4294901760 ; 0xFFFF0000
191  %r = lshr i32 %t0, 8
192  store i32 %r, ptr %dst
193  ret i32 %r
194}
195define i32 @add_nosignbit_lshr(i32 %x, ptr %dst) {
196; CHECK-LABEL: add_nosignbit_lshr:
197; CHECK:       // %bb.0:
198; CHECK-NEXT:    mov w8, #2147418112
199; CHECK-NEXT:    add w8, w0, w8
200; CHECK-NEXT:    lsr w0, w8, #8
201; CHECK-NEXT:    str w0, [x1]
202; CHECK-NEXT:    ret
203  %t0 = add i32 %x, 2147418112 ; 0x7FFF0000
204  %r = lshr i32 %t0, 8
205  store i32 %r, ptr %dst
206  ret i32 %r
207}
208
209; arithmetic shift right
210
211define i32 @and_signbit_ashr(i32 %x, ptr %dst) {
212; CHECK-LABEL: and_signbit_ashr:
213; CHECK:       // %bb.0:
214; CHECK-NEXT:    asr w8, w0, #8
215; CHECK-NEXT:    and w0, w8, #0xffffff00
216; CHECK-NEXT:    str w0, [x1]
217; CHECK-NEXT:    ret
218  %t0 = and i32 %x, 4294901760 ; 0xFFFF0000
219  %r = ashr i32 %t0, 8
220  store i32 %r, ptr %dst
221  ret i32 %r
222}
223define i32 @and_nosignbit_ashr(i32 %x, ptr %dst) {
224; CHECK-LABEL: and_nosignbit_ashr:
225; CHECK:       // %bb.0:
226; CHECK-NEXT:    lsr w8, w0, #8
227; CHECK-NEXT:    and w0, w8, #0x7fff00
228; CHECK-NEXT:    str w0, [x1]
229; CHECK-NEXT:    ret
230  %t0 = and i32 %x, 2147418112 ; 0x7FFF0000
231  %r = ashr i32 %t0, 8
232  store i32 %r, ptr %dst
233  ret i32 %r
234}
235
236define i32 @or_signbit_ashr(i32 %x, ptr %dst) {
237; CHECK-LABEL: or_signbit_ashr:
238; CHECK:       // %bb.0:
239; CHECK-NEXT:    lsr w8, w0, #8
240; CHECK-NEXT:    orr w0, w8, #0xffffff00
241; CHECK-NEXT:    str w0, [x1]
242; CHECK-NEXT:    ret
243  %t0 = or i32 %x, 4294901760 ; 0xFFFF0000
244  %r = ashr i32 %t0, 8
245  store i32 %r, ptr %dst
246  ret i32 %r
247}
248define i32 @or_nosignbit_ashr(i32 %x, ptr %dst) {
249; CHECK-LABEL: or_nosignbit_ashr:
250; CHECK:       // %bb.0:
251; CHECK-NEXT:    asr w8, w0, #8
252; CHECK-NEXT:    orr w0, w8, #0x7fff00
253; CHECK-NEXT:    str w0, [x1]
254; CHECK-NEXT:    ret
255  %t0 = or i32 %x, 2147418112 ; 0x7FFF0000
256  %r = ashr i32 %t0, 8
257  store i32 %r, ptr %dst
258  ret i32 %r
259}
260
261define i32 @xor_signbit_ashr(i32 %x, ptr %dst) {
262; CHECK-LABEL: xor_signbit_ashr:
263; CHECK:       // %bb.0:
264; CHECK-NEXT:    asr w8, w0, #8
265; CHECK-NEXT:    eor w0, w8, #0xffffff00
266; CHECK-NEXT:    str w0, [x1]
267; CHECK-NEXT:    ret
268  %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
269  %r = ashr i32 %t0, 8
270  store i32 %r, ptr %dst
271  ret i32 %r
272}
273define i32 @xor_nosignbit_ashr(i32 %x, ptr %dst) {
274; CHECK-LABEL: xor_nosignbit_ashr:
275; CHECK:       // %bb.0:
276; CHECK-NEXT:    asr w8, w0, #8
277; CHECK-NEXT:    eor w0, w8, #0x7fff00
278; CHECK-NEXT:    str w0, [x1]
279; CHECK-NEXT:    ret
280  %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
281  %r = ashr i32 %t0, 8
282  store i32 %r, ptr %dst
283  ret i32 %r
284}
285
286define i32 @add_signbit_ashr(i32 %x, ptr %dst) {
287; CHECK-LABEL: add_signbit_ashr:
288; CHECK:       // %bb.0:
289; CHECK-NEXT:    sub w8, w0, #16, lsl #12 // =65536
290; CHECK-NEXT:    asr w0, w8, #8
291; CHECK-NEXT:    str w0, [x1]
292; CHECK-NEXT:    ret
293  %t0 = add i32 %x, 4294901760 ; 0xFFFF0000
294  %r = ashr i32 %t0, 8
295  store i32 %r, ptr %dst
296  ret i32 %r
297}
298define i32 @add_nosignbit_ashr(i32 %x, ptr %dst) {
299; CHECK-LABEL: add_nosignbit_ashr:
300; CHECK:       // %bb.0:
301; CHECK-NEXT:    mov w8, #2147418112
302; CHECK-NEXT:    add w8, w0, w8
303; CHECK-NEXT:    asr w0, w8, #8
304; CHECK-NEXT:    str w0, [x1]
305; CHECK-NEXT:    ret
306  %t0 = add i32 %x, 2147418112 ; 0x7FFF0000
307  %r = ashr i32 %t0, 8
308  store i32 %r, ptr %dst
309  ret i32 %r
310}
311