xref: /llvm-project/llvm/test/CodeGen/AArch64/pr96366.ll (revision d5c9ffd545ebf171346ac69b15fafeee469f0b3c)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s
3
4declare void @use(i32)
5
6define i32 @f(i32 %x) nounwind {
7; CHECK-LABEL: f:
8; CHECK:       // %bb.0:
9; CHECK-NEXT:    stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
10; CHECK-NEXT:    mov w19, w0
11; CHECK-NEXT:    neg w0, w0
12; CHECK-NEXT:    bl use
13; CHECK-NEXT:    mov w8, #4 // =0x4
14; CHECK-NEXT:    sub w0, w8, w19
15; CHECK-NEXT:    ldp x30, x19, [sp], #16 // 16-byte Folded Reload
16; CHECK-NEXT:    ret
17  %sub1 = sub nuw i32 0, %x
18  call void @use(i32 %sub1)
19  %sub2 = sub i32 1, %x
20  %sub3 = sub i32 3, %x
21  %mul = mul i32 %x, 1
22  %add1 = add i32 %sub2, %mul
23  %add2 = add i32 %add1, %sub3
24  ret i32 %add2
25}
26