xref: /llvm-project/llvm/test/CodeGen/AArch64/pr86717.ll (revision acab142751d3498c6d0aa63253dc1c9f3f83f268)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s
3
4define <16 x i8> @f(i32 %0) {
5; CHECK-LABEL: f:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    sub sp, sp, #16
8; CHECK-NEXT:    .cfi_def_cfa_offset 16
9; CHECK-NEXT:    movi v0.2d, #0000000000000000
10; CHECK-NEXT:    mov w8, #1 // =0x1
11; CHECK-NEXT:    mov x9, sp
12; CHECK-NEXT:    sub w8, w8, w0
13; CHECK-NEXT:    bfxil x9, x8, #0, #4
14; CHECK-NEXT:    mov w8, #3 // =0x3
15; CHECK-NEXT:    str q0, [sp]
16; CHECK-NEXT:    strb w8, [x9]
17; CHECK-NEXT:    ldr q0, [sp], #16
18; CHECK-NEXT:    ret
19  %2 = sub nuw i32 1, %0
20  %3 = insertelement <16 x i8> zeroinitializer, i8 3, i32 %2
21  ret <16 x i8> %3
22}
23