1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK 3; RUN: llc < %s -mtriple=aarch64 -global-isel 2>&1 | FileCheck %s --check-prefixes=CHECK 4 5define <16 x i8> @test_2(i64 %0) { 6; CHECK-LABEL: test_2: 7; CHECK: // %bb.0: // %Entry 8; CHECK-NEXT: fmov d1, x0 9; CHECK-NEXT: movi v0.16b, #15 10; CHECK-NEXT: ushr v2.8b, v1.8b, #4 11; CHECK-NEXT: zip1 v1.16b, v1.16b, v2.16b 12; CHECK-NEXT: and v0.16b, v1.16b, v0.16b 13; CHECK-NEXT: ret 14Entry: 15 %1 = bitcast i64 %0 to <8 x i8> 16 %2 = lshr <8 x i8> %1, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4> 17 %3 = shufflevector <8 x i8> %1, <8 x i8> %2, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 18 %4 = and <16 x i8> %3, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15> 19 ret <16 x i8> %4 20} 21 22define <16 x i8> @test_3(i64 %0) { 23; CHECK-LABEL: test_3: 24; CHECK: // %bb.0: // %Entry 25; CHECK-NEXT: movi v0.8b, #15 26; CHECK-NEXT: fmov d1, x0 27; CHECK-NEXT: ushr v2.8b, v1.8b, #4 28; CHECK-NEXT: and v0.8b, v1.8b, v0.8b 29; CHECK-NEXT: zip1 v0.16b, v0.16b, v2.16b 30; CHECK-NEXT: ret 31Entry: 32 %1 = bitcast i64 %0 to <8 x i8> 33 %2 = and <8 x i8> %1, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15> 34 %3 = lshr <8 x i8> %1, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4> 35 %4 = shufflevector <8 x i8> %2, <8 x i8> %3, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 36 ret <16 x i8> %4 37} 38