xref: /llvm-project/llvm/test/CodeGen/AArch64/pr61111.ll (revision c546f13f1f43e34a6a39ac70d3cf70adab4d05f4)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
3
4define i62 @f(i1 %0) {
5; CHECK-LABEL: f:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    // kill: def $w0 killed $w0 def $x0
8; CHECK-NEXT:    and x8, x0, #0x1
9; CHECK-NEXT:    sub x8, x8, #1
10; CHECK-NEXT:    tst x8, #0x3fffffffffffffff
11; CHECK-NEXT:    cset w0, ne
12; CHECK-NEXT:    ret
13  %2 = zext i1 %0 to i59
14  %3 = call { i59, i1 } @llvm.umul.with.overflow.i59(i59 %2, i59 -1)
15  %4 = extractvalue { i59, i1 } %3, 0
16  %5 = trunc i59 %4 to i21
17  %6 = trunc i59 %4 to i21
18  %7 = ashr i21 %5, %6
19  %8 = sext i21 %7 to i62
20  %9 = icmp ugt i62 -1, %8
21  %10 = zext i1 %9 to i62
22  ret i62 %10
23}
24
25declare { i59, i1 } @llvm.umul.with.overflow.i59(i59, i59)
26