xref: /llvm-project/llvm/test/CodeGen/AArch64/pr49781.ll (revision 67953311e2e370a9fcf77595d66d39c505565382)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64 -mattr=+sve | FileCheck %s
3
4define <vscale x 2 x i64> @foo(<vscale x 2 x i64> %a) {
5; CHECK-LABEL: foo:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    sub z0.d, z0.d, #2 // =0x2
8; CHECK-NEXT:    ret
9 %idx = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 1, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
10 %b = sub <vscale x 2 x i64> %a, %idx
11 %c = sub <vscale x 2 x i64> %b, %idx
12 ret <vscale x 2 x i64> %c
13}
14