xref: /llvm-project/llvm/test/CodeGen/AArch64/no-quad-ldp-stp.ll (revision 3d18c8cd265c0c0bf1d85226c4770a2dd0f86e8f)
1; RUN: llc < %s -mtriple=aarch64 -mattr=+slow-paired-128 -verify-machineinstrs -asm-verbose=false | FileCheck %s --check-prefixes=CHECK,SLOW
2; RUN: llc < %s -mtriple=aarch64 -mcpu=exynos-m3         -verify-machineinstrs -asm-verbose=false | FileCheck %s --check-prefixes=CHECK,FAST
3
4; CHECK-LABEL: test_nopair_st
5; SLOW: str
6; SLOW: stur
7; SLOW-NOT: stp
8; FAST: stp
9define void @test_nopair_st(ptr %ptr, <2 x double> %v1, <2 x double> %v2) {
10  store <2 x double> %v2, ptr %ptr, align 16
11  %add.ptr = getelementptr inbounds double, ptr %ptr, i64 -2
12  store <2 x double> %v1, ptr %add.ptr, align 16
13  ret void
14}
15
16; CHECK-LABEL: test_nopair_ld
17; SLOW: ldr
18; SLOW: ldr
19; SLOW-NOT: ldp
20; FAST: ldp
21define <2 x i64> @test_nopair_ld(ptr %p) {
22  %tmp1 = load <2 x i64>, < 2 x i64>* %p, align 8
23  %add.ptr2 = getelementptr inbounds i64, ptr %p, i64 2
24  %tmp2 = load <2 x i64>, ptr %add.ptr2, align 8
25  %add = add nsw <2 x i64> %tmp1, %tmp2
26  ret <2 x i64> %add
27}
28