xref: /llvm-project/llvm/test/CodeGen/AArch64/new-load-requires-renaming-in-mssa.ll (revision a930fec033a80bc92f5a11cc334ff4fc44cbe0ca)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -interleaved-load-combine -S -verify-memoryssa %s | FileCheck %s
3; RUN: opt -passes=interleaved-load-combine -S -verify-memoryssa %s | FileCheck %s
4
5target triple = "arm64-apple-darwin"
6
7declare void @clobber(<2 x double>)
8
9define void @rename_uses(ptr %src, i1 %c.1, i1 %c.2) {
10; CHECK-LABEL: @rename_uses(
11; CHECK-NEXT:  bb:
12; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
13; CHECK:       outer.header:
14; CHECK-NEXT:    br label [[INNER:%.*]]
15; CHECK:       inner:
16; CHECK-NEXT:    br i1 [[C_1:%.*]], label [[OUTER_LATCH:%.*]], label [[INNER]]
17; CHECK:       outer.latch:
18; CHECK-NEXT:    br i1 [[C_2:%.*]], label [[EXIT:%.*]], label [[OUTER_HEADER]]
19; CHECK:       exit:
20; CHECK-NEXT:    [[GEP_0:%.*]] = getelementptr inbounds [12 x double], ptr [[SRC:%.*]], i64 0, i64 0
21; CHECK-NEXT:    [[GEP_4:%.*]] = getelementptr [12 x double], ptr [[SRC]], i64 0, i64 4
22; CHECK-NEXT:    [[INTERLEAVED_WIDE_LOAD:%.*]] = load <8 x double>, ptr [[GEP_0]], align 8
23; CHECK-NEXT:    [[L_0:%.*]] = load <4 x double>, ptr [[GEP_0]], align 8
24; CHECK-NEXT:    [[L_4:%.*]] = load <4 x double>, ptr [[GEP_4]], align 8
25; CHECK-NEXT:    [[INTERLEAVED_SHUFFLE:%.*]] = shufflevector <8 x double> [[INTERLEAVED_WIDE_LOAD]], <8 x double> poison, <2 x i32> <i32 0, i32 4>
26; CHECK-NEXT:    [[S_0:%.*]] = shufflevector <4 x double> [[L_0]], <4 x double> [[L_4]], <2 x i32> <i32 0, i32 4>
27; CHECK-NEXT:    [[INTERLEAVED_SHUFFLE1:%.*]] = shufflevector <8 x double> [[INTERLEAVED_WIDE_LOAD]], <8 x double> poison, <2 x i32> <i32 1, i32 5>
28; CHECK-NEXT:    [[S_1:%.*]] = shufflevector <4 x double> [[L_0]], <4 x double> [[L_4]], <2 x i32> <i32 1, i32 5>
29; CHECK-NEXT:    [[INTERLEAVED_SHUFFLE2:%.*]] = shufflevector <8 x double> [[INTERLEAVED_WIDE_LOAD]], <8 x double> poison, <2 x i32> <i32 2, i32 6>
30; CHECK-NEXT:    [[S_2:%.*]] = shufflevector <4 x double> [[L_0]], <4 x double> [[L_4]], <2 x i32> <i32 2, i32 6>
31; CHECK-NEXT:    [[INTERLEAVED_SHUFFLE3:%.*]] = shufflevector <8 x double> [[INTERLEAVED_WIDE_LOAD]], <8 x double> poison, <2 x i32> <i32 3, i32 7>
32; CHECK-NEXT:    [[S_3:%.*]] = shufflevector <4 x double> [[L_0]], <4 x double> [[L_4]], <2 x i32> <i32 3, i32 7>
33; CHECK-NEXT:    call void @clobber(<2 x double> [[INTERLEAVED_SHUFFLE]])
34; CHECK-NEXT:    call void @clobber(<2 x double> [[INTERLEAVED_SHUFFLE1]])
35; CHECK-NEXT:    call void @clobber(<2 x double> [[INTERLEAVED_SHUFFLE2]])
36; CHECK-NEXT:    call void @clobber(<2 x double> [[INTERLEAVED_SHUFFLE3]])
37; CHECK-NEXT:    ret void
38;
39bb:
40  br label %outer.header
41
42outer.header:
43  br label %inner
44
45inner:
46  br i1 %c.1, label %outer.latch, label %inner
47
48outer.latch:
49  br i1 %c.2, label %exit, label %outer.header
50
51exit:
52  %gep.0 = getelementptr inbounds [ 12 x double ], ptr %src, i64 0, i64 0
53  %gep.4 = getelementptr [ 12 x double ], ptr %src, i64 0, i64 4
54  %l.0 = load <4 x double>, ptr %gep.0, align 8
55  %l.4 = load <4 x double>, ptr %gep.4, align 8
56  %s.0 = shufflevector <4 x double> %l.0, <4 x double> %l.4, <2 x i32> <i32 0, i32 4>
57  %s.1 = shufflevector <4 x double> %l.0, <4 x double> %l.4, <2 x i32> <i32 1, i32 5>
58  %s.2 = shufflevector <4 x double> %l.0, <4 x double> %l.4, <2 x i32> <i32 2, i32 6>
59  %s.3 = shufflevector <4 x double> %l.0, <4 x double> %l.4, <2 x i32> <i32 3, i32 7>
60  call void @clobber(<2 x double> %s.0)
61  call void @clobber(<2 x double> %s.1)
62  call void @clobber(<2 x double> %s.2)
63  call void @clobber(<2 x double> %s.3)
64  ret void
65}
66