xref: /llvm-project/llvm/test/CodeGen/AArch64/neon-vector-splat.ll (revision d3ce069572cb565da613df9828ac54f7edb2fc00)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -global-isel=1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
4
5define <2 x i32> @shuffle(ptr %P) {
6; CHECK-SD-LABEL: shuffle:
7; CHECK-SD:       // %bb.0:
8; CHECK-SD-NEXT:    ld1r { v0.2s }, [x0]
9; CHECK-SD-NEXT:    ret
10;
11; CHECK-GI-LABEL: shuffle:
12; CHECK-GI:       // %bb.0:
13; CHECK-GI-NEXT:    ldr d0, [x0]
14; CHECK-GI-NEXT:    dup v0.2s, v0.s[0]
15; CHECK-GI-NEXT:    ret
16  %lv2i32 = load <2 x i32>, ptr %P
17  %B = shufflevector <2 x i32> %lv2i32, <2 x i32> undef, <2 x i32> zeroinitializer
18  ret <2 x i32> %B
19}
20
21define <4 x i32> @shuffle2(ptr %P) {
22; CHECK-LABEL: shuffle2:
23; CHECK:       // %bb.0:
24; CHECK-NEXT:    ld1r { v0.4s }, [x0]
25; CHECK-NEXT:    ret
26  %lv2i32 = load <4 x i32>, ptr %P
27  %B = shufflevector <4 x i32> %lv2i32, <4 x i32> undef, <4 x i32> zeroinitializer
28  ret <4 x i32> %B
29}
30
31define <4 x i32> @shuffle2_multiuse(ptr %P) {
32; CHECK-SD-LABEL: shuffle2_multiuse:
33; CHECK-SD:       // %bb.0:
34; CHECK-SD-NEXT:    ldr q0, [x0]
35; CHECK-SD-NEXT:    dup v1.4s, v0.s[0]
36; CHECK-SD-NEXT:    dup v0.4s, v0.s[1]
37; CHECK-SD-NEXT:    add v0.4s, v1.4s, v0.4s
38; CHECK-SD-NEXT:    ret
39;
40; CHECK-GI-LABEL: shuffle2_multiuse:
41; CHECK-GI:       // %bb.0:
42; CHECK-GI-NEXT:    ldr q0, [x0]
43; CHECK-GI-NEXT:    ld1r { v1.4s }, [x0]
44; CHECK-GI-NEXT:    dup v0.4s, v0.s[1]
45; CHECK-GI-NEXT:    add v0.4s, v1.4s, v0.4s
46; CHECK-GI-NEXT:    ret
47  %lv2i32 = load <4 x i32>, ptr %P
48  %B = shufflevector <4 x i32> %lv2i32, <4 x i32> undef, <4 x i32> zeroinitializer
49  %C = shufflevector <4 x i32> %lv2i32, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
50  %D = add <4 x i32> %B, %C
51  ret <4 x i32> %D
52}
53
54define <4 x i16> @shuffle3(ptr %P) {
55; CHECK-SD-LABEL: shuffle3:
56; CHECK-SD:       // %bb.0:
57; CHECK-SD-NEXT:    ld1r { v0.4h }, [x0]
58; CHECK-SD-NEXT:    ret
59;
60; CHECK-GI-LABEL: shuffle3:
61; CHECK-GI:       // %bb.0:
62; CHECK-GI-NEXT:    ldr d0, [x0]
63; CHECK-GI-NEXT:    dup v0.4h, v0.h[0]
64; CHECK-GI-NEXT:    ret
65  %lv4i16 = load <4 x i16>, ptr %P
66  %sv4i16 = shufflevector <4 x i16> %lv4i16, <4 x i16> undef, <4 x i32> zeroinitializer
67  ret <4 x i16> %sv4i16
68}
69
70define <8 x i16> @shuffle4(ptr %P) {
71; CHECK-LABEL: shuffle4:
72; CHECK:       // %bb.0:
73; CHECK-NEXT:    ld1r { v0.8h }, [x0]
74; CHECK-NEXT:    ret
75  %lv8i16 = load <8 x i16>, ptr %P
76  %sv8i16 = shufflevector <8 x i16> %lv8i16, <8 x i16> undef, <8 x i32> zeroinitializer
77  ret <8 x i16> %sv8i16
78}
79
80define <8 x i8> @shuffle5(ptr %P) {
81; CHECK-SD-LABEL: shuffle5:
82; CHECK-SD:       // %bb.0:
83; CHECK-SD-NEXT:    ld1r { v0.8b }, [x0]
84; CHECK-SD-NEXT:    ret
85;
86; CHECK-GI-LABEL: shuffle5:
87; CHECK-GI:       // %bb.0:
88; CHECK-GI-NEXT:    ldr d0, [x0]
89; CHECK-GI-NEXT:    dup v0.8b, v0.b[0]
90; CHECK-GI-NEXT:    ret
91  %lv8i8 = load <8 x i8>, ptr %P
92  %sv8i8 = shufflevector <8 x i8> %lv8i8, <8 x i8> undef, <8 x i32> zeroinitializer
93  ret <8 x i8> %sv8i8
94}
95
96define <16 x i8> @shuffle6(ptr %P) {
97; CHECK-LABEL: shuffle6:
98; CHECK:       // %bb.0:
99; CHECK-NEXT:    ld1r { v0.16b }, [x0]
100; CHECK-NEXT:    ret
101  %lv16i8 = load <16 x i8>, ptr %P
102  %sv16i8 = shufflevector <16 x i8> %lv16i8, <16 x i8> undef, <16 x i32> zeroinitializer
103  ret <16 x i8> %sv16i8
104}
105
106define <2 x i64> @shuffle7(ptr %P) {
107; CHECK-LABEL: shuffle7:
108; CHECK:       // %bb.0:
109; CHECK-NEXT:    ld1r { v0.2d }, [x0]
110; CHECK-NEXT:    ret
111  %lv2i64 = load <2 x i64>, ptr %P
112  %sv2i64 = shufflevector <2 x i64> %lv2i64, <2 x i64> undef, <2 x i32> zeroinitializer
113  ret <2 x i64> %sv2i64
114}
115
116define <2 x ptr> @shuffle8(ptr %P) {
117; CHECK-SD-LABEL: shuffle8:
118; CHECK-SD:       // %bb.0:
119; CHECK-SD-NEXT:    ld1r { v0.2d }, [x0]
120; CHECK-SD-NEXT:    ret
121;
122; CHECK-GI-LABEL: shuffle8:
123; CHECK-GI:       // %bb.0:
124; CHECK-GI-NEXT:    ldr q0, [x0]
125; CHECK-GI-NEXT:    dup v0.2d, v0.d[0]
126; CHECK-GI-NEXT:    ret
127  %lv2ptr = load <2 x ptr>, ptr %P
128  %sv2ptr = shufflevector <2 x ptr> %lv2ptr, <2 x ptr> undef, <2 x i32> zeroinitializer
129  ret <2 x ptr> %sv2ptr
130}
131
132define <4 x i32> @multiblock_aliasing(ptr %P, i1 %c) {
133; CHECK-LABEL: multiblock_aliasing:
134; CHECK:       // %bb.0: // %entry
135; CHECK-NEXT:    ldr q0, [x0]
136; CHECK-NEXT:    tbz w1, #0, .LBB9_2
137; CHECK-NEXT:  // %bb.1: // %then
138; CHECK-NEXT:    stp xzr, xzr, [x0]
139; CHECK-NEXT:  .LBB9_2: // %else
140; CHECK-NEXT:    dup v0.4s, v0.s[0]
141; CHECK-NEXT:    ret
142entry:
143  %lv2ptr = load <4 x i32>, ptr %P
144  br i1 %c, label %then, label %else
145
146then:
147  store <4 x i32> zeroinitializer, ptr %P
148  br label %else
149
150else:
151  %sv2ptr = shufflevector <4 x i32> %lv2ptr, <4 x i32> undef, <4 x i32> zeroinitializer
152  ret <4 x i32> %sv2ptr
153}
154