xref: /llvm-project/llvm/test/CodeGen/AArch64/neon-sha3.ll (revision 2c25efcbd322c58b62e592a8265ef83803f0e7b9)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc %s -mtriple=aarch64 -mattr=+v8.3a,+sha3 -o - | FileCheck %s
3
4define <2 x i64> @test_vsha512h(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
5; CHECK-LABEL: test_vsha512h:
6; CHECK:       // %bb.0: // %entry
7; CHECK-NEXT:    sha512h q0, q1, v2.2d
8; CHECK-NEXT:    ret
9entry:
10  %vsha512h.i = tail call <2 x i64> @llvm.aarch64.crypto.sha512h(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
11  ret <2 x i64> %vsha512h.i
12}
13
14define <2 x i64> @test_vsha512h2(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
15; CHECK-LABEL: test_vsha512h2:
16; CHECK:       // %bb.0: // %entry
17; CHECK-NEXT:    sha512h2 q0, q1, v2.2d
18; CHECK-NEXT:    ret
19entry:
20  %vsha512h2.i = tail call <2 x i64> @llvm.aarch64.crypto.sha512h2(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
21  ret <2 x i64> %vsha512h2.i
22}
23
24define <2 x i64> @test_vsha512su0(<2 x i64> %a, <2 x i64> %b) {
25; CHECK-LABEL: test_vsha512su0:
26; CHECK:       // %bb.0: // %entry
27; CHECK-NEXT:    sha512su0 v0.2d, v1.2d
28; CHECK-NEXT:    ret
29entry:
30  %vsha512su0.i = tail call <2 x i64> @llvm.aarch64.crypto.sha512su0(<2 x i64> %a, <2 x i64> %b)
31  ret <2 x i64> %vsha512su0.i
32}
33
34define <2 x i64> @test_vsha512su1(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
35; CHECK-LABEL: test_vsha512su1:
36; CHECK:       // %bb.0: // %entry
37; CHECK-NEXT:    sha512su1 v0.2d, v1.2d, v2.2d
38; CHECK-NEXT:    ret
39entry:
40  %vsha512su1.i = tail call <2 x i64> @llvm.aarch64.crypto.sha512su1(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
41  ret <2 x i64> %vsha512su1.i
42}
43
44define <2 x i64> @test_vrax1(<2 x i64> %a, <2 x i64> %b) {
45; CHECK-LABEL: test_vrax1:
46; CHECK:       // %bb.0: // %entry
47; CHECK-NEXT:    rax1 v0.2d, v0.2d, v1.2d
48; CHECK-NEXT:    ret
49entry:
50  %vrax1.i = tail call <2 x i64> @llvm.aarch64.crypto.rax1(<2 x i64> %a, <2 x i64> %b)
51  ret <2 x i64> %vrax1.i
52}
53
54define <2 x i64> @test_vxar(<2 x i64> %a,  <2 x i64> %b) {
55; CHECK-LABEL: test_vxar:
56; CHECK:       // %bb.0: // %entry
57; CHECK-NEXT:    xar v0.2d, v0.2d, v1.2d, #1
58; CHECK-NEXT:    ret
59entry:
60  %vxar.i = tail call  <2 x i64> @llvm.aarch64.crypto.xar(<2 x i64> %a, <2 x i64> %b, i64 1)
61  ret <2 x i64> %vxar.i
62}
63
64define <16 x i8> @test_bcax_8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
65; CHECK-LABEL: test_bcax_8:
66; CHECK:       // %bb.0: // %entry
67; CHECK-NEXT:    bcax v0.16b, v0.16b, v1.16b, v2.16b
68; CHECK-NEXT:    ret
69entry:
70  %vbcax_8.i = tail call <16 x i8> @llvm.aarch64.crypto.bcaxu.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c)
71  ret <16 x i8> %vbcax_8.i
72}
73
74define <16 x i8> @test_eor3_8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
75; CHECK-LABEL: test_eor3_8:
76; CHECK:       // %bb.0: // %entry
77; CHECK-NEXT:    eor3 v0.16b, v0.16b, v1.16b, v2.16b
78; CHECK-NEXT:    ret
79entry:
80  %veor3_8.i = tail call <16 x i8> @llvm.aarch64.crypto.eor3u.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c)
81  ret <16 x i8> %veor3_8.i
82}
83
84define <16 x i8> @test_bcax_s8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
85; CHECK-LABEL: test_bcax_s8:
86; CHECK:       // %bb.0: // %entry
87; CHECK-NEXT:    bcax v0.16b, v0.16b, v1.16b, v2.16b
88; CHECK-NEXT:    ret
89entry:
90  %vbcax_8.i = tail call <16 x i8> @llvm.aarch64.crypto.bcaxs.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c)
91  ret <16 x i8> %vbcax_8.i
92}
93
94define <16 x i8> @test_eor3_s8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
95; CHECK-LABEL: test_eor3_s8:
96; CHECK:       // %bb.0: // %entry
97; CHECK-NEXT:    eor3 v0.16b, v0.16b, v1.16b, v2.16b
98; CHECK-NEXT:    ret
99entry:
100  %veor3_8.i = tail call <16 x i8> @llvm.aarch64.crypto.eor3s.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c)
101  ret <16 x i8> %veor3_8.i
102}
103
104define <8 x i16> @test_bcax_16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
105; CHECK-LABEL: test_bcax_16:
106; CHECK:       // %bb.0: // %entry
107; CHECK-NEXT:    bcax v0.16b, v0.16b, v1.16b, v2.16b
108; CHECK-NEXT:    ret
109entry:
110  %vbcax_16.i = tail call <8 x i16> @llvm.aarch64.crypto.bcaxu.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c)
111  ret <8 x i16> %vbcax_16.i
112}
113
114define <8 x i16> @test_eor3_16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
115; CHECK-LABEL: test_eor3_16:
116; CHECK:       // %bb.0: // %entry
117; CHECK-NEXT:    eor3 v0.16b, v0.16b, v1.16b, v2.16b
118; CHECK-NEXT:    ret
119entry:
120  %veor3_16.i = tail call <8 x i16> @llvm.aarch64.crypto.eor3u.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c)
121  ret <8 x i16> %veor3_16.i
122}
123
124define <8 x i16> @test_bcax_s16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
125; CHECK-LABEL: test_bcax_s16:
126; CHECK:       // %bb.0: // %entry
127; CHECK-NEXT:    bcax v0.16b, v0.16b, v1.16b, v2.16b
128; CHECK-NEXT:    ret
129entry:
130  %vbcax_16.i = tail call <8 x i16> @llvm.aarch64.crypto.bcaxs.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c)
131  ret <8 x i16> %vbcax_16.i
132}
133
134define <8 x i16> @test_eor3_s16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
135; CHECK-LABEL: test_eor3_s16:
136; CHECK:       // %bb.0: // %entry
137; CHECK-NEXT:    eor3 v0.16b, v0.16b, v1.16b, v2.16b
138; CHECK-NEXT:    ret
139entry:
140  %veor3_16.i = tail call <8 x i16> @llvm.aarch64.crypto.eor3s.v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c)
141  ret <8 x i16> %veor3_16.i
142}
143
144define <4 x i32> @test_bcax_32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
145; CHECK-LABEL: test_bcax_32:
146; CHECK:       // %bb.0: // %entry
147; CHECK-NEXT:    bcax v0.16b, v0.16b, v1.16b, v2.16b
148; CHECK-NEXT:    ret
149entry:
150  %vbcax_32.i = tail call <4 x i32> @llvm.aarch64.crypto.bcaxu.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
151  ret <4 x i32> %vbcax_32.i
152}
153
154define <4 x i32> @test_eor3_32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
155; CHECK-LABEL: test_eor3_32:
156; CHECK:       // %bb.0: // %entry
157; CHECK-NEXT:    eor3 v0.16b, v0.16b, v1.16b, v2.16b
158; CHECK-NEXT:    ret
159entry:
160  %veor3_32.i = tail call <4 x i32> @llvm.aarch64.crypto.eor3u.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
161  ret <4 x i32> %veor3_32.i
162}
163
164define <4 x i32> @test_bcax_s32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
165; CHECK-LABEL: test_bcax_s32:
166; CHECK:       // %bb.0: // %entry
167; CHECK-NEXT:    bcax v0.16b, v0.16b, v1.16b, v2.16b
168; CHECK-NEXT:    ret
169entry:
170  %vbcax_32.i = tail call <4 x i32> @llvm.aarch64.crypto.bcaxs.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
171  ret <4 x i32> %vbcax_32.i
172}
173
174define <4 x i32> @test_eor3_s32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
175; CHECK-LABEL: test_eor3_s32:
176; CHECK:       // %bb.0: // %entry
177; CHECK-NEXT:    eor3 v0.16b, v0.16b, v1.16b, v2.16b
178; CHECK-NEXT:    ret
179entry:
180  %veor3_32.i = tail call <4 x i32> @llvm.aarch64.crypto.eor3s.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
181  ret <4 x i32> %veor3_32.i
182}
183
184define <2 x i64> @test_bcax_64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
185; CHECK-LABEL: test_bcax_64:
186; CHECK:       // %bb.0: // %entry
187; CHECK-NEXT:    bcax v0.16b, v0.16b, v1.16b, v2.16b
188; CHECK-NEXT:    ret
189entry:
190  %vbcax_64.i = tail call <2 x i64> @llvm.aarch64.crypto.bcaxu.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
191  ret <2 x i64> %vbcax_64.i
192}
193
194define <2 x i64> @test_eor3_64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
195; CHECK-LABEL: test_eor3_64:
196; CHECK:       // %bb.0: // %entry
197; CHECK-NEXT:    eor3 v0.16b, v0.16b, v1.16b, v2.16b
198; CHECK-NEXT:    ret
199entry:
200  %veor3_64.i = tail call <2 x i64> @llvm.aarch64.crypto.eor3u.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
201  ret <2 x i64> %veor3_64.i
202}
203
204define <2 x i64> @test_bcax_s64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
205; CHECK-LABEL: test_bcax_s64:
206; CHECK:       // %bb.0: // %entry
207; CHECK-NEXT:    bcax v0.16b, v0.16b, v1.16b, v2.16b
208; CHECK-NEXT:    ret
209entry:
210  %vbcax_64.i = tail call <2 x i64> @llvm.aarch64.crypto.bcaxs.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
211  ret <2 x i64> %vbcax_64.i
212}
213
214define <2 x i64> @test_eor3_s64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
215; CHECK-LABEL: test_eor3_s64:
216; CHECK:       // %bb.0: // %entry
217; CHECK-NEXT:    eor3 v0.16b, v0.16b, v1.16b, v2.16b
218; CHECK-NEXT:    ret
219entry:
220  %veor3_64.i = tail call <2 x i64> @llvm.aarch64.crypto.eor3s.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c)
221  ret <2 x i64> %veor3_64.i
222}
223
224declare <2 x i64> @llvm.aarch64.crypto.sha512h(<2 x i64>, <2 x i64>, <2 x i64>)
225declare <2 x i64> @llvm.aarch64.crypto.sha512h2(<2 x i64>, <2 x i64>, <2 x i64>)
226declare <2 x i64> @llvm.aarch64.crypto.sha512su0(<2 x i64>, <2 x i64>)
227declare <2 x i64> @llvm.aarch64.crypto.sha512su1(<2 x i64>, <2 x i64>, <2 x i64>)
228declare <2 x i64> @llvm.aarch64.crypto.rax1(<2 x i64>, <2 x i64>)
229declare <2 x i64> @llvm.aarch64.crypto.xar(<2 x i64>, <2 x i64>, i64 immarg)
230declare <16 x i8> @llvm.aarch64.crypto.bcaxu.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
231declare <8 x i16> @llvm.aarch64.crypto.bcaxu.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
232declare <4 x i32> @llvm.aarch64.crypto.bcaxu.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
233declare <2 x i64> @llvm.aarch64.crypto.bcaxu.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
234declare <16 x i8> @llvm.aarch64.crypto.bcaxs.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
235declare <8 x i16> @llvm.aarch64.crypto.bcaxs.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
236declare <4 x i32> @llvm.aarch64.crypto.bcaxs.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
237declare <2 x i64> @llvm.aarch64.crypto.bcaxs.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
238declare <16 x i8> @llvm.aarch64.crypto.eor3u.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
239declare <8 x i16> @llvm.aarch64.crypto.eor3u.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
240declare <4 x i32> @llvm.aarch64.crypto.eor3u.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
241declare <2 x i64> @llvm.aarch64.crypto.eor3u.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
242declare <16 x i8> @llvm.aarch64.crypto.eor3s.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
243declare <8 x i16> @llvm.aarch64.crypto.eor3s.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
244declare <4 x i32> @llvm.aarch64.crypto.eor3s.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
245declare <2 x i64> @llvm.aarch64.crypto.eor3s.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
246
247