xref: /llvm-project/llvm/test/CodeGen/AArch64/neon-saba.ll (revision 4077e8ab2f093ec7f2a113936325c2e0e8811e1a) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple aarch64-unknown-linux-gnu < %s | FileCheck %s
3
4; SABA from ADD(ABS(SUB NSW))
5
6define <4 x i32> @saba_abs_4s(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) #0 {
7; CHECK-LABEL: saba_abs_4s:
8; CHECK:       // %bb.0:
9; CHECK-NEXT:    saba v0.4s, v1.4s, v2.4s
10; CHECK-NEXT:    ret
11  %sub = sub nsw <4 x i32> %b, %c
12  %abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %sub, i1 true)
13  %add = add <4 x i32> %a, %abs
14  ret <4 x i32> %add
15}
16
17define <2 x i32> @saba_abs_2s(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) #0 {
18; CHECK-LABEL: saba_abs_2s:
19; CHECK:       // %bb.0:
20; CHECK-NEXT:    saba v0.2s, v1.2s, v2.2s
21; CHECK-NEXT:    ret
22  %sub = sub nsw <2 x i32> %b, %c
23  %abs = call <2 x i32> @llvm.abs.v2i32(<2 x i32> %sub, i1 true)
24  %add = add <2 x i32> %a, %abs
25  ret <2 x i32> %add
26}
27
28define <8 x i16> @saba_abs_8h(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) #0 {
29; CHECK-LABEL: saba_abs_8h:
30; CHECK:       // %bb.0:
31; CHECK-NEXT:    saba v0.8h, v1.8h, v2.8h
32; CHECK-NEXT:    ret
33  %sub = sub nsw <8 x i16> %b, %c
34  %abs = call <8 x i16> @llvm.abs.v8i16(<8 x i16> %sub, i1 true)
35  %add = add <8 x i16> %a, %abs
36  ret <8 x i16> %add
37}
38
39define <4 x i16> @saba_abs_4h(<4 x i16> %a, <4 x i16> %b, <4 x i16> %c) #0 {
40; CHECK-LABEL: saba_abs_4h:
41; CHECK:       // %bb.0:
42; CHECK-NEXT:    saba v0.4h, v1.4h, v2.4h
43; CHECK-NEXT:    ret
44  %sub = sub nsw <4 x i16> %b, %c
45  %abs = call <4 x i16> @llvm.abs.v4i16(<4 x i16> %sub, i1 true)
46  %add = add <4 x i16> %a, %abs
47  ret <4 x i16> %add
48}
49
50define <16 x i8> @saba_abs_16b(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #0 {
51; CHECK-LABEL: saba_abs_16b:
52; CHECK:       // %bb.0:
53; CHECK-NEXT:    saba v0.16b, v1.16b, v2.16b
54; CHECK-NEXT:    ret
55  %sub = sub nsw <16 x i8> %b, %c
56  %abs = call <16 x i8> @llvm.abs.v16i8(<16 x i8> %sub, i1 true)
57  %add = add <16 x i8> %a, %abs
58  ret <16 x i8> %add
59}
60
61define <8 x i8> @saba_abs_8b(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
62; CHECK-LABEL: saba_abs_8b:
63; CHECK:       // %bb.0:
64; CHECK-NEXT:    saba v0.8b, v1.8b, v2.8b
65; CHECK-NEXT:    ret
66  %sub = sub nsw <8 x i8> %b, %c
67  %abs = call <8 x i8> @llvm.abs.v8i8(<8 x i8> %sub, i1 true)
68  %add = add <8 x i8> %a, %abs
69  ret <8 x i8> %add
70}
71
72; SABA from ADD(SABD)
73
74define <4 x i32> @saba_sabd_4s(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) #0 {
75; CHECK-LABEL: saba_sabd_4s:
76; CHECK:       // %bb.0:
77; CHECK-NEXT:    saba v0.4s, v1.4s, v2.4s
78; CHECK-NEXT:    ret
79  %sabd = call <4 x i32> @llvm.aarch64.neon.sabd.v4i32(<4 x i32> %b, <4 x i32> %c)
80  %add = add <4 x i32> %sabd, %a
81  ret <4 x i32> %add
82}
83
84define <2 x i32> @saba_sabd_2s(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) #0 {
85; CHECK-LABEL: saba_sabd_2s:
86; CHECK:       // %bb.0:
87; CHECK-NEXT:    saba v0.2s, v1.2s, v2.2s
88; CHECK-NEXT:    ret
89  %sabd = call <2 x i32> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> %b, <2 x i32> %c)
90  %add = add <2 x i32> %sabd, %a
91  ret <2 x i32> %add
92}
93
94define <8 x i16> @saba_sabd_8h(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) #0 {
95; CHECK-LABEL: saba_sabd_8h:
96; CHECK:       // %bb.0:
97; CHECK-NEXT:    saba v0.8h, v1.8h, v2.8h
98; CHECK-NEXT:    ret
99  %sabd = call <8 x i16> @llvm.aarch64.neon.sabd.v8i16(<8 x i16> %b, <8 x i16> %c)
100  %add = add <8 x i16> %sabd, %a
101  ret <8 x i16> %add
102}
103
104define <4 x i16> @saba_sabd_4h(<4 x i16> %a, <4 x i16> %b, <4 x i16> %c) #0 {
105; CHECK-LABEL: saba_sabd_4h:
106; CHECK:       // %bb.0:
107; CHECK-NEXT:    saba v0.4h, v1.4h, v2.4h
108; CHECK-NEXT:    ret
109  %sabd = call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> %b, <4 x i16> %c)
110  %add = add <4 x i16> %sabd, %a
111  ret <4 x i16> %add
112}
113
114define <16 x i8> @saba_sabd_16b(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #0 {
115; CHECK-LABEL: saba_sabd_16b:
116; CHECK:       // %bb.0:
117; CHECK-NEXT:    saba v0.16b, v1.16b, v2.16b
118; CHECK-NEXT:    ret
119  %sabd = call <16 x i8> @llvm.aarch64.neon.sabd.v16i8(<16 x i8> %b, <16 x i8> %c)
120  %add = add <16 x i8> %sabd, %a
121  ret <16 x i8> %add
122}
123
124define <8 x i8> @saba_sabd_8b(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
125; CHECK-LABEL: saba_sabd_8b:
126; CHECK:       // %bb.0:
127; CHECK-NEXT:    saba v0.8b, v1.8b, v2.8b
128; CHECK-NEXT:    ret
129  %sabd = call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %b, <8 x i8> %c)
130  %add = add <8 x i8> %sabd, %a
131  ret <8 x i8> %add
132}
133
134declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
135declare <2 x i32> @llvm.abs.v2i32(<2 x i32>, i1)
136declare <8 x i16> @llvm.abs.v8i16(<8 x i16>, i1)
137declare <4 x i16> @llvm.abs.v4i16(<4 x i16>, i1)
138declare <16 x i8> @llvm.abs.v16i8(<16 x i8>, i1)
139declare <8 x i8> @llvm.abs.v8i8(<8 x i8>, i1)
140
141declare <4 x i32> @llvm.aarch64.neon.sabd.v4i32(<4 x i32>, <4 x i32>)
142declare <2 x i32> @llvm.aarch64.neon.sabd.v2i32(<2 x i32>, <2 x i32>)
143declare <8 x i16> @llvm.aarch64.neon.sabd.v8i16(<8 x i16>, <8 x i16>)
144declare <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16>, <4 x i16>)
145declare <16 x i8> @llvm.aarch64.neon.sabd.v16i8(<16 x i8>, <16 x i8>)
146declare <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8>, <8 x i8>)
147