1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefixes=CHECK,CHECK-SD 3; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI 4 5%struct.int8x8x2_t = type { [2 x <8 x i8>] } 6%struct.int16x4x2_t = type { [2 x <4 x i16>] } 7%struct.int32x2x2_t = type { [2 x <2 x i32>] } 8%struct.uint8x8x2_t = type { [2 x <8 x i8>] } 9%struct.uint16x4x2_t = type { [2 x <4 x i16>] } 10%struct.uint32x2x2_t = type { [2 x <2 x i32>] } 11%struct.float32x2x2_t = type { [2 x <2 x float>] } 12%struct.poly8x8x2_t = type { [2 x <8 x i8>] } 13%struct.poly16x4x2_t = type { [2 x <4 x i16>] } 14%struct.int8x16x2_t = type { [2 x <16 x i8>] } 15%struct.int16x8x2_t = type { [2 x <8 x i16>] } 16%struct.int32x4x2_t = type { [2 x <4 x i32>] } 17%struct.uint8x16x2_t = type { [2 x <16 x i8>] } 18%struct.uint16x8x2_t = type { [2 x <8 x i16>] } 19%struct.uint32x4x2_t = type { [2 x <4 x i32>] } 20%struct.float32x4x2_t = type { [2 x <4 x float>] } 21%struct.poly8x16x2_t = type { [2 x <16 x i8>] } 22%struct.poly16x8x2_t = type { [2 x <8 x i16>] } 23 24define <8 x i8> @test_vuzp1_s8(<8 x i8> %a, <8 x i8> %b) { 25; CHECK-LABEL: test_vuzp1_s8: 26; CHECK: // %bb.0: // %entry 27; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b 28; CHECK-NEXT: ret 29entry: 30 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 31 ret <8 x i8> %shuffle.i 32} 33 34define <16 x i8> @test_vuzp1q_s8(<16 x i8> %a, <16 x i8> %b) { 35; CHECK-LABEL: test_vuzp1q_s8: 36; CHECK: // %bb.0: // %entry 37; CHECK-NEXT: uzp1 v0.16b, v0.16b, v1.16b 38; CHECK-NEXT: ret 39entry: 40 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 41 ret <16 x i8> %shuffle.i 42} 43 44define <4 x i16> @test_vuzp1_s16(<4 x i16> %a, <4 x i16> %b) { 45; CHECK-LABEL: test_vuzp1_s16: 46; CHECK: // %bb.0: // %entry 47; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h 48; CHECK-NEXT: ret 49entry: 50 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 51 ret <4 x i16> %shuffle.i 52} 53 54define <8 x i16> @test_vuzp1q_s16(<8 x i16> %a, <8 x i16> %b) { 55; CHECK-LABEL: test_vuzp1q_s16: 56; CHECK: // %bb.0: // %entry 57; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h 58; CHECK-NEXT: ret 59entry: 60 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 61 ret <8 x i16> %shuffle.i 62} 63 64define <2 x i32> @test_vuzp1_s32(<2 x i32> %a, <2 x i32> %b) { 65; CHECK-LABEL: test_vuzp1_s32: 66; CHECK: // %bb.0: // %entry 67; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s 68; CHECK-NEXT: ret 69entry: 70 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 71 ret <2 x i32> %shuffle.i 72} 73 74define <4 x i32> @test_vuzp1q_s32(<4 x i32> %a, <4 x i32> %b) { 75; CHECK-LABEL: test_vuzp1q_s32: 76; CHECK: // %bb.0: // %entry 77; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s 78; CHECK-NEXT: ret 79entry: 80 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 81 ret <4 x i32> %shuffle.i 82} 83 84define <2 x i64> @test_vuzp1q_s64(<2 x i64> %a, <2 x i64> %b) { 85; CHECK-LABEL: test_vuzp1q_s64: 86; CHECK: // %bb.0: // %entry 87; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 88; CHECK-NEXT: ret 89entry: 90 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 91 ret <2 x i64> %shuffle.i 92} 93 94define <8 x i8> @test_vuzp1_u8(<8 x i8> %a, <8 x i8> %b) { 95; CHECK-LABEL: test_vuzp1_u8: 96; CHECK: // %bb.0: // %entry 97; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b 98; CHECK-NEXT: ret 99entry: 100 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 101 ret <8 x i8> %shuffle.i 102} 103 104define <16 x i8> @test_vuzp1q_u8(<16 x i8> %a, <16 x i8> %b) { 105; CHECK-LABEL: test_vuzp1q_u8: 106; CHECK: // %bb.0: // %entry 107; CHECK-NEXT: uzp1 v0.16b, v0.16b, v1.16b 108; CHECK-NEXT: ret 109entry: 110 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 111 ret <16 x i8> %shuffle.i 112} 113 114define <4 x i16> @test_vuzp1_u16(<4 x i16> %a, <4 x i16> %b) { 115; CHECK-LABEL: test_vuzp1_u16: 116; CHECK: // %bb.0: // %entry 117; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h 118; CHECK-NEXT: ret 119entry: 120 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 121 ret <4 x i16> %shuffle.i 122} 123 124define <8 x i16> @test_vuzp1q_u16(<8 x i16> %a, <8 x i16> %b) { 125; CHECK-LABEL: test_vuzp1q_u16: 126; CHECK: // %bb.0: // %entry 127; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h 128; CHECK-NEXT: ret 129entry: 130 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 131 ret <8 x i16> %shuffle.i 132} 133 134define <2 x i32> @test_vuzp1_u32(<2 x i32> %a, <2 x i32> %b) { 135; CHECK-LABEL: test_vuzp1_u32: 136; CHECK: // %bb.0: // %entry 137; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s 138; CHECK-NEXT: ret 139entry: 140 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 141 ret <2 x i32> %shuffle.i 142} 143 144define <4 x i32> @test_vuzp1q_u32(<4 x i32> %a, <4 x i32> %b) { 145; CHECK-LABEL: test_vuzp1q_u32: 146; CHECK: // %bb.0: // %entry 147; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s 148; CHECK-NEXT: ret 149entry: 150 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 151 ret <4 x i32> %shuffle.i 152} 153 154define <2 x i64> @test_vuzp1q_u64(<2 x i64> %a, <2 x i64> %b) { 155; CHECK-LABEL: test_vuzp1q_u64: 156; CHECK: // %bb.0: // %entry 157; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 158; CHECK-NEXT: ret 159entry: 160 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 161 ret <2 x i64> %shuffle.i 162} 163 164define <2 x ptr> @test_vuzp1q_p0(<2 x ptr> %a, <2 x ptr> %b) { 165; CHECK-LABEL: test_vuzp1q_p0: 166; CHECK: // %bb.0: // %entry 167; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 168; CHECK-NEXT: ret 169entry: 170 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 0, i32 2> 171 ret <2 x ptr> %shuffle.i 172} 173 174define <2 x float> @test_vuzp1_f32(<2 x float> %a, <2 x float> %b) { 175; CHECK-LABEL: test_vuzp1_f32: 176; CHECK: // %bb.0: // %entry 177; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s 178; CHECK-NEXT: ret 179entry: 180 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 181 ret <2 x float> %shuffle.i 182} 183 184define <4 x float> @test_vuzp1q_f32(<4 x float> %a, <4 x float> %b) { 185; CHECK-LABEL: test_vuzp1q_f32: 186; CHECK: // %bb.0: // %entry 187; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s 188; CHECK-NEXT: ret 189entry: 190 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 191 ret <4 x float> %shuffle.i 192} 193 194define <2 x double> @test_vuzp1q_f64(<2 x double> %a, <2 x double> %b) { 195; CHECK-LABEL: test_vuzp1q_f64: 196; CHECK: // %bb.0: // %entry 197; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 198; CHECK-NEXT: ret 199entry: 200 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2> 201 ret <2 x double> %shuffle.i 202} 203 204define <8 x i8> @test_vuzp1_p8(<8 x i8> %a, <8 x i8> %b) { 205; CHECK-LABEL: test_vuzp1_p8: 206; CHECK: // %bb.0: // %entry 207; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b 208; CHECK-NEXT: ret 209entry: 210 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 211 ret <8 x i8> %shuffle.i 212} 213 214define <16 x i8> @test_vuzp1q_p8(<16 x i8> %a, <16 x i8> %b) { 215; CHECK-LABEL: test_vuzp1q_p8: 216; CHECK: // %bb.0: // %entry 217; CHECK-NEXT: uzp1 v0.16b, v0.16b, v1.16b 218; CHECK-NEXT: ret 219entry: 220 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 221 ret <16 x i8> %shuffle.i 222} 223 224define <4 x i16> @test_vuzp1_p16(<4 x i16> %a, <4 x i16> %b) { 225; CHECK-LABEL: test_vuzp1_p16: 226; CHECK: // %bb.0: // %entry 227; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h 228; CHECK-NEXT: ret 229entry: 230 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 231 ret <4 x i16> %shuffle.i 232} 233 234define <8 x i16> @test_vuzp1q_p16(<8 x i16> %a, <8 x i16> %b) { 235; CHECK-LABEL: test_vuzp1q_p16: 236; CHECK: // %bb.0: // %entry 237; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h 238; CHECK-NEXT: ret 239entry: 240 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 241 ret <8 x i16> %shuffle.i 242} 243 244define <8 x i8> @test_vuzp2_s8(<8 x i8> %a, <8 x i8> %b) { 245; CHECK-LABEL: test_vuzp2_s8: 246; CHECK: // %bb.0: // %entry 247; CHECK-NEXT: uzp2 v0.8b, v0.8b, v1.8b 248; CHECK-NEXT: ret 249entry: 250 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 251 ret <8 x i8> %shuffle.i 252} 253 254define <16 x i8> @test_vuzp2q_s8(<16 x i8> %a, <16 x i8> %b) { 255; CHECK-LABEL: test_vuzp2q_s8: 256; CHECK: // %bb.0: // %entry 257; CHECK-NEXT: uzp2 v0.16b, v0.16b, v1.16b 258; CHECK-NEXT: ret 259entry: 260 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 261 ret <16 x i8> %shuffle.i 262} 263 264define <4 x i16> @test_vuzp2_s16(<4 x i16> %a, <4 x i16> %b) { 265; CHECK-LABEL: test_vuzp2_s16: 266; CHECK: // %bb.0: // %entry 267; CHECK-NEXT: uzp2 v0.4h, v0.4h, v1.4h 268; CHECK-NEXT: ret 269entry: 270 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 271 ret <4 x i16> %shuffle.i 272} 273 274define <8 x i16> @test_vuzp2q_s16(<8 x i16> %a, <8 x i16> %b) { 275; CHECK-LABEL: test_vuzp2q_s16: 276; CHECK: // %bb.0: // %entry 277; CHECK-NEXT: uzp2 v0.8h, v0.8h, v1.8h 278; CHECK-NEXT: ret 279entry: 280 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 281 ret <8 x i16> %shuffle.i 282} 283 284define <2 x i32> @test_vuzp2_s32(<2 x i32> %a, <2 x i32> %b) { 285; CHECK-LABEL: test_vuzp2_s32: 286; CHECK: // %bb.0: // %entry 287; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s 288; CHECK-NEXT: ret 289entry: 290 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 291 ret <2 x i32> %shuffle.i 292} 293 294define <4 x i32> @test_vuzp2q_s32(<4 x i32> %a, <4 x i32> %b) { 295; CHECK-LABEL: test_vuzp2q_s32: 296; CHECK: // %bb.0: // %entry 297; CHECK-NEXT: uzp2 v0.4s, v0.4s, v1.4s 298; CHECK-NEXT: ret 299entry: 300 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 301 ret <4 x i32> %shuffle.i 302} 303 304define <2 x i64> @test_vuzp2q_s64(<2 x i64> %a, <2 x i64> %b) { 305; CHECK-LABEL: test_vuzp2q_s64: 306; CHECK: // %bb.0: // %entry 307; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 308; CHECK-NEXT: ret 309entry: 310 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 311 ret <2 x i64> %shuffle.i 312} 313 314define <8 x i8> @test_vuzp2_u8(<8 x i8> %a, <8 x i8> %b) { 315; CHECK-LABEL: test_vuzp2_u8: 316; CHECK: // %bb.0: // %entry 317; CHECK-NEXT: uzp2 v0.8b, v0.8b, v1.8b 318; CHECK-NEXT: ret 319entry: 320 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 321 ret <8 x i8> %shuffle.i 322} 323 324define <16 x i8> @test_vuzp2q_u8(<16 x i8> %a, <16 x i8> %b) { 325; CHECK-LABEL: test_vuzp2q_u8: 326; CHECK: // %bb.0: // %entry 327; CHECK-NEXT: uzp2 v0.16b, v0.16b, v1.16b 328; CHECK-NEXT: ret 329entry: 330 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 331 ret <16 x i8> %shuffle.i 332} 333 334define <4 x i16> @test_vuzp2_u16(<4 x i16> %a, <4 x i16> %b) { 335; CHECK-LABEL: test_vuzp2_u16: 336; CHECK: // %bb.0: // %entry 337; CHECK-NEXT: uzp2 v0.4h, v0.4h, v1.4h 338; CHECK-NEXT: ret 339entry: 340 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 341 ret <4 x i16> %shuffle.i 342} 343 344define <8 x i16> @test_vuzp2q_u16(<8 x i16> %a, <8 x i16> %b) { 345; CHECK-LABEL: test_vuzp2q_u16: 346; CHECK: // %bb.0: // %entry 347; CHECK-NEXT: uzp2 v0.8h, v0.8h, v1.8h 348; CHECK-NEXT: ret 349entry: 350 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 351 ret <8 x i16> %shuffle.i 352} 353 354define <2 x i32> @test_vuzp2_u32(<2 x i32> %a, <2 x i32> %b) { 355; CHECK-LABEL: test_vuzp2_u32: 356; CHECK: // %bb.0: // %entry 357; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s 358; CHECK-NEXT: ret 359entry: 360 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 361 ret <2 x i32> %shuffle.i 362} 363 364define <4 x i32> @test_vuzp2q_u32(<4 x i32> %a, <4 x i32> %b) { 365; CHECK-LABEL: test_vuzp2q_u32: 366; CHECK: // %bb.0: // %entry 367; CHECK-NEXT: uzp2 v0.4s, v0.4s, v1.4s 368; CHECK-NEXT: ret 369entry: 370 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 371 ret <4 x i32> %shuffle.i 372} 373 374define <2 x i64> @test_vuzp2q_u64(<2 x i64> %a, <2 x i64> %b) { 375; CHECK-LABEL: test_vuzp2q_u64: 376; CHECK: // %bb.0: // %entry 377; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 378; CHECK-NEXT: ret 379entry: 380 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 381 ret <2 x i64> %shuffle.i 382} 383 384define <2 x ptr> @test_vuzp2q_p0(<2 x ptr> %a, <2 x ptr> %b) { 385; CHECK-LABEL: test_vuzp2q_p0: 386; CHECK: // %bb.0: // %entry 387; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 388; CHECK-NEXT: ret 389entry: 390 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 1, i32 3> 391 ret <2 x ptr> %shuffle.i 392} 393 394define <2 x float> @test_vuzp2_f32(<2 x float> %a, <2 x float> %b) { 395; CHECK-LABEL: test_vuzp2_f32: 396; CHECK: // %bb.0: // %entry 397; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s 398; CHECK-NEXT: ret 399entry: 400 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 401 ret <2 x float> %shuffle.i 402} 403 404define <4 x float> @test_vuzp2q_f32(<4 x float> %a, <4 x float> %b) { 405; CHECK-LABEL: test_vuzp2q_f32: 406; CHECK: // %bb.0: // %entry 407; CHECK-NEXT: uzp2 v0.4s, v0.4s, v1.4s 408; CHECK-NEXT: ret 409entry: 410 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 411 ret <4 x float> %shuffle.i 412} 413 414define <2 x double> @test_vuzp2q_f64(<2 x double> %a, <2 x double> %b) { 415; CHECK-LABEL: test_vuzp2q_f64: 416; CHECK: // %bb.0: // %entry 417; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 418; CHECK-NEXT: ret 419entry: 420 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3> 421 ret <2 x double> %shuffle.i 422} 423 424define <8 x i8> @test_vuzp2_p8(<8 x i8> %a, <8 x i8> %b) { 425; CHECK-LABEL: test_vuzp2_p8: 426; CHECK: // %bb.0: // %entry 427; CHECK-NEXT: uzp2 v0.8b, v0.8b, v1.8b 428; CHECK-NEXT: ret 429entry: 430 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 431 ret <8 x i8> %shuffle.i 432} 433 434define <16 x i8> @test_vuzp2q_p8(<16 x i8> %a, <16 x i8> %b) { 435; CHECK-LABEL: test_vuzp2q_p8: 436; CHECK: // %bb.0: // %entry 437; CHECK-NEXT: uzp2 v0.16b, v0.16b, v1.16b 438; CHECK-NEXT: ret 439entry: 440 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 441 ret <16 x i8> %shuffle.i 442} 443 444define <4 x i16> @test_vuzp2_p16(<4 x i16> %a, <4 x i16> %b) { 445; CHECK-LABEL: test_vuzp2_p16: 446; CHECK: // %bb.0: // %entry 447; CHECK-NEXT: uzp2 v0.4h, v0.4h, v1.4h 448; CHECK-NEXT: ret 449entry: 450 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 451 ret <4 x i16> %shuffle.i 452} 453 454define <8 x i16> @test_vuzp2q_p16(<8 x i16> %a, <8 x i16> %b) { 455; CHECK-LABEL: test_vuzp2q_p16: 456; CHECK: // %bb.0: // %entry 457; CHECK-NEXT: uzp2 v0.8h, v0.8h, v1.8h 458; CHECK-NEXT: ret 459entry: 460 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 461 ret <8 x i16> %shuffle.i 462} 463 464define <8 x i8> @test_vzip1_s8(<8 x i8> %a, <8 x i8> %b) { 465; CHECK-LABEL: test_vzip1_s8: 466; CHECK: // %bb.0: // %entry 467; CHECK-NEXT: zip1 v0.8b, v0.8b, v1.8b 468; CHECK-NEXT: ret 469entry: 470 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 471 ret <8 x i8> %shuffle.i 472} 473 474define <16 x i8> @test_vzip1q_s8(<16 x i8> %a, <16 x i8> %b) { 475; CHECK-LABEL: test_vzip1q_s8: 476; CHECK: // %bb.0: // %entry 477; CHECK-NEXT: zip1 v0.16b, v0.16b, v1.16b 478; CHECK-NEXT: ret 479entry: 480 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 481 ret <16 x i8> %shuffle.i 482} 483 484define <4 x i16> @test_vzip1_s16(<4 x i16> %a, <4 x i16> %b) { 485; CHECK-LABEL: test_vzip1_s16: 486; CHECK: // %bb.0: // %entry 487; CHECK-NEXT: zip1 v0.4h, v0.4h, v1.4h 488; CHECK-NEXT: ret 489entry: 490 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 491 ret <4 x i16> %shuffle.i 492} 493 494define <8 x i16> @test_vzip1q_s16(<8 x i16> %a, <8 x i16> %b) { 495; CHECK-LABEL: test_vzip1q_s16: 496; CHECK: // %bb.0: // %entry 497; CHECK-NEXT: zip1 v0.8h, v0.8h, v1.8h 498; CHECK-NEXT: ret 499entry: 500 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 501 ret <8 x i16> %shuffle.i 502} 503 504define <2 x i32> @test_vzip1_s32(<2 x i32> %a, <2 x i32> %b) { 505; CHECK-LABEL: test_vzip1_s32: 506; CHECK: // %bb.0: // %entry 507; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s 508; CHECK-NEXT: ret 509entry: 510 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 511 ret <2 x i32> %shuffle.i 512} 513 514define <4 x i32> @test_vzip1q_s32(<4 x i32> %a, <4 x i32> %b) { 515; CHECK-LABEL: test_vzip1q_s32: 516; CHECK: // %bb.0: // %entry 517; CHECK-NEXT: zip1 v0.4s, v0.4s, v1.4s 518; CHECK-NEXT: ret 519entry: 520 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 521 ret <4 x i32> %shuffle.i 522} 523 524define <2 x i64> @test_vzip1q_s64(<2 x i64> %a, <2 x i64> %b) { 525; CHECK-LABEL: test_vzip1q_s64: 526; CHECK: // %bb.0: // %entry 527; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 528; CHECK-NEXT: ret 529entry: 530 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 531 ret <2 x i64> %shuffle.i 532} 533 534define <8 x i8> @test_vzip1_u8(<8 x i8> %a, <8 x i8> %b) { 535; CHECK-LABEL: test_vzip1_u8: 536; CHECK: // %bb.0: // %entry 537; CHECK-NEXT: zip1 v0.8b, v0.8b, v1.8b 538; CHECK-NEXT: ret 539entry: 540 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 541 ret <8 x i8> %shuffle.i 542} 543 544define <16 x i8> @test_vzip1q_u8(<16 x i8> %a, <16 x i8> %b) { 545; CHECK-LABEL: test_vzip1q_u8: 546; CHECK: // %bb.0: // %entry 547; CHECK-NEXT: zip1 v0.16b, v0.16b, v1.16b 548; CHECK-NEXT: ret 549entry: 550 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 551 ret <16 x i8> %shuffle.i 552} 553 554define <4 x i16> @test_vzip1_u16(<4 x i16> %a, <4 x i16> %b) { 555; CHECK-LABEL: test_vzip1_u16: 556; CHECK: // %bb.0: // %entry 557; CHECK-NEXT: zip1 v0.4h, v0.4h, v1.4h 558; CHECK-NEXT: ret 559entry: 560 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 561 ret <4 x i16> %shuffle.i 562} 563 564define <8 x i16> @test_vzip1q_u16(<8 x i16> %a, <8 x i16> %b) { 565; CHECK-LABEL: test_vzip1q_u16: 566; CHECK: // %bb.0: // %entry 567; CHECK-NEXT: zip1 v0.8h, v0.8h, v1.8h 568; CHECK-NEXT: ret 569entry: 570 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 571 ret <8 x i16> %shuffle.i 572} 573 574define <2 x i32> @test_vzip1_u32(<2 x i32> %a, <2 x i32> %b) { 575; CHECK-LABEL: test_vzip1_u32: 576; CHECK: // %bb.0: // %entry 577; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s 578; CHECK-NEXT: ret 579entry: 580 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 581 ret <2 x i32> %shuffle.i 582} 583 584define <4 x i32> @test_vzip1q_u32(<4 x i32> %a, <4 x i32> %b) { 585; CHECK-LABEL: test_vzip1q_u32: 586; CHECK: // %bb.0: // %entry 587; CHECK-NEXT: zip1 v0.4s, v0.4s, v1.4s 588; CHECK-NEXT: ret 589entry: 590 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 591 ret <4 x i32> %shuffle.i 592} 593 594define <2 x i64> @test_vzip1q_u64(<2 x i64> %a, <2 x i64> %b) { 595; CHECK-LABEL: test_vzip1q_u64: 596; CHECK: // %bb.0: // %entry 597; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 598; CHECK-NEXT: ret 599entry: 600 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 601 ret <2 x i64> %shuffle.i 602} 603 604define <2 x ptr> @test_vzip1q_p0(<2 x ptr> %a, <2 x ptr> %b) { 605; CHECK-LABEL: test_vzip1q_p0: 606; CHECK: // %bb.0: // %entry 607; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 608; CHECK-NEXT: ret 609entry: 610 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 0, i32 2> 611 ret <2 x ptr> %shuffle.i 612} 613 614define <2 x float> @test_vzip1_f32(<2 x float> %a, <2 x float> %b) { 615; CHECK-LABEL: test_vzip1_f32: 616; CHECK: // %bb.0: // %entry 617; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s 618; CHECK-NEXT: ret 619entry: 620 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 621 ret <2 x float> %shuffle.i 622} 623 624define <4 x float> @test_vzip1q_f32(<4 x float> %a, <4 x float> %b) { 625; CHECK-LABEL: test_vzip1q_f32: 626; CHECK: // %bb.0: // %entry 627; CHECK-NEXT: zip1 v0.4s, v0.4s, v1.4s 628; CHECK-NEXT: ret 629entry: 630 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 631 ret <4 x float> %shuffle.i 632} 633 634define <2 x double> @test_vzip1q_f64(<2 x double> %a, <2 x double> %b) { 635; CHECK-LABEL: test_vzip1q_f64: 636; CHECK: // %bb.0: // %entry 637; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 638; CHECK-NEXT: ret 639entry: 640 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2> 641 ret <2 x double> %shuffle.i 642} 643 644define <8 x i8> @test_vzip1_p8(<8 x i8> %a, <8 x i8> %b) { 645; CHECK-LABEL: test_vzip1_p8: 646; CHECK: // %bb.0: // %entry 647; CHECK-NEXT: zip1 v0.8b, v0.8b, v1.8b 648; CHECK-NEXT: ret 649entry: 650 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 651 ret <8 x i8> %shuffle.i 652} 653 654define <16 x i8> @test_vzip1q_p8(<16 x i8> %a, <16 x i8> %b) { 655; CHECK-LABEL: test_vzip1q_p8: 656; CHECK: // %bb.0: // %entry 657; CHECK-NEXT: zip1 v0.16b, v0.16b, v1.16b 658; CHECK-NEXT: ret 659entry: 660 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 661 ret <16 x i8> %shuffle.i 662} 663 664define <4 x i16> @test_vzip1_p16(<4 x i16> %a, <4 x i16> %b) { 665; CHECK-LABEL: test_vzip1_p16: 666; CHECK: // %bb.0: // %entry 667; CHECK-NEXT: zip1 v0.4h, v0.4h, v1.4h 668; CHECK-NEXT: ret 669entry: 670 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 671 ret <4 x i16> %shuffle.i 672} 673 674define <8 x i16> @test_vzip1q_p16(<8 x i16> %a, <8 x i16> %b) { 675; CHECK-LABEL: test_vzip1q_p16: 676; CHECK: // %bb.0: // %entry 677; CHECK-NEXT: zip1 v0.8h, v0.8h, v1.8h 678; CHECK-NEXT: ret 679entry: 680 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 681 ret <8 x i16> %shuffle.i 682} 683 684define <8 x i8> @test_vzip2_s8(<8 x i8> %a, <8 x i8> %b) { 685; CHECK-LABEL: test_vzip2_s8: 686; CHECK: // %bb.0: // %entry 687; CHECK-NEXT: zip2 v0.8b, v0.8b, v1.8b 688; CHECK-NEXT: ret 689entry: 690 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 691 ret <8 x i8> %shuffle.i 692} 693 694define <16 x i8> @test_vzip2q_s8(<16 x i8> %a, <16 x i8> %b) { 695; CHECK-LABEL: test_vzip2q_s8: 696; CHECK: // %bb.0: // %entry 697; CHECK-NEXT: zip2 v0.16b, v0.16b, v1.16b 698; CHECK-NEXT: ret 699entry: 700 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 701 ret <16 x i8> %shuffle.i 702} 703 704define <4 x i16> @test_vzip2_s16(<4 x i16> %a, <4 x i16> %b) { 705; CHECK-LABEL: test_vzip2_s16: 706; CHECK: // %bb.0: // %entry 707; CHECK-NEXT: zip2 v0.4h, v0.4h, v1.4h 708; CHECK-NEXT: ret 709entry: 710 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 711 ret <4 x i16> %shuffle.i 712} 713 714define <8 x i16> @test_vzip2q_s16(<8 x i16> %a, <8 x i16> %b) { 715; CHECK-LABEL: test_vzip2q_s16: 716; CHECK: // %bb.0: // %entry 717; CHECK-NEXT: zip2 v0.8h, v0.8h, v1.8h 718; CHECK-NEXT: ret 719entry: 720 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 721 ret <8 x i16> %shuffle.i 722} 723 724define <2 x i32> @test_vzip2_s32(<2 x i32> %a, <2 x i32> %b) { 725; CHECK-LABEL: test_vzip2_s32: 726; CHECK: // %bb.0: // %entry 727; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s 728; CHECK-NEXT: ret 729entry: 730 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 731 ret <2 x i32> %shuffle.i 732} 733 734define <4 x i32> @test_vzip2q_s32(<4 x i32> %a, <4 x i32> %b) { 735; CHECK-LABEL: test_vzip2q_s32: 736; CHECK: // %bb.0: // %entry 737; CHECK-NEXT: zip2 v0.4s, v0.4s, v1.4s 738; CHECK-NEXT: ret 739entry: 740 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 741 ret <4 x i32> %shuffle.i 742} 743 744define <2 x i64> @test_vzip2q_s64(<2 x i64> %a, <2 x i64> %b) { 745; CHECK-LABEL: test_vzip2q_s64: 746; CHECK: // %bb.0: // %entry 747; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 748; CHECK-NEXT: ret 749entry: 750 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 751 ret <2 x i64> %shuffle.i 752} 753 754define <8 x i8> @test_vzip2_u8(<8 x i8> %a, <8 x i8> %b) { 755; CHECK-LABEL: test_vzip2_u8: 756; CHECK: // %bb.0: // %entry 757; CHECK-NEXT: zip2 v0.8b, v0.8b, v1.8b 758; CHECK-NEXT: ret 759entry: 760 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 761 ret <8 x i8> %shuffle.i 762} 763 764define <16 x i8> @test_vzip2q_u8(<16 x i8> %a, <16 x i8> %b) { 765; CHECK-LABEL: test_vzip2q_u8: 766; CHECK: // %bb.0: // %entry 767; CHECK-NEXT: zip2 v0.16b, v0.16b, v1.16b 768; CHECK-NEXT: ret 769entry: 770 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 771 ret <16 x i8> %shuffle.i 772} 773 774define <4 x i16> @test_vzip2_u16(<4 x i16> %a, <4 x i16> %b) { 775; CHECK-LABEL: test_vzip2_u16: 776; CHECK: // %bb.0: // %entry 777; CHECK-NEXT: zip2 v0.4h, v0.4h, v1.4h 778; CHECK-NEXT: ret 779entry: 780 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 781 ret <4 x i16> %shuffle.i 782} 783 784define <8 x i16> @test_vzip2q_u16(<8 x i16> %a, <8 x i16> %b) { 785; CHECK-LABEL: test_vzip2q_u16: 786; CHECK: // %bb.0: // %entry 787; CHECK-NEXT: zip2 v0.8h, v0.8h, v1.8h 788; CHECK-NEXT: ret 789entry: 790 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 791 ret <8 x i16> %shuffle.i 792} 793 794define <2 x i32> @test_vzip2_u32(<2 x i32> %a, <2 x i32> %b) { 795; CHECK-LABEL: test_vzip2_u32: 796; CHECK: // %bb.0: // %entry 797; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s 798; CHECK-NEXT: ret 799entry: 800 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 801 ret <2 x i32> %shuffle.i 802} 803 804define <4 x i32> @test_vzip2q_u32(<4 x i32> %a, <4 x i32> %b) { 805; CHECK-LABEL: test_vzip2q_u32: 806; CHECK: // %bb.0: // %entry 807; CHECK-NEXT: zip2 v0.4s, v0.4s, v1.4s 808; CHECK-NEXT: ret 809entry: 810 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 811 ret <4 x i32> %shuffle.i 812} 813 814define <2 x i64> @test_vzip2q_u64(<2 x i64> %a, <2 x i64> %b) { 815; CHECK-LABEL: test_vzip2q_u64: 816; CHECK: // %bb.0: // %entry 817; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 818; CHECK-NEXT: ret 819entry: 820 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 821 ret <2 x i64> %shuffle.i 822} 823 824define <2 x ptr> @test_vzip2q_p0(<2 x ptr> %a, <2 x ptr> %b) { 825; CHECK-LABEL: test_vzip2q_p0: 826; CHECK: // %bb.0: // %entry 827; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 828; CHECK-NEXT: ret 829entry: 830 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 1, i32 3> 831 ret <2 x ptr> %shuffle.i 832} 833 834define <2 x float> @test_vzip2_f32(<2 x float> %a, <2 x float> %b) { 835; CHECK-LABEL: test_vzip2_f32: 836; CHECK: // %bb.0: // %entry 837; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s 838; CHECK-NEXT: ret 839entry: 840 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 841 ret <2 x float> %shuffle.i 842} 843 844define <4 x float> @test_vzip2q_f32(<4 x float> %a, <4 x float> %b) { 845; CHECK-LABEL: test_vzip2q_f32: 846; CHECK: // %bb.0: // %entry 847; CHECK-NEXT: zip2 v0.4s, v0.4s, v1.4s 848; CHECK-NEXT: ret 849entry: 850 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 851 ret <4 x float> %shuffle.i 852} 853 854define <2 x double> @test_vzip2q_f64(<2 x double> %a, <2 x double> %b) { 855; CHECK-LABEL: test_vzip2q_f64: 856; CHECK: // %bb.0: // %entry 857; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 858; CHECK-NEXT: ret 859entry: 860 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3> 861 ret <2 x double> %shuffle.i 862} 863 864define <8 x i8> @test_vzip2_p8(<8 x i8> %a, <8 x i8> %b) { 865; CHECK-LABEL: test_vzip2_p8: 866; CHECK: // %bb.0: // %entry 867; CHECK-NEXT: zip2 v0.8b, v0.8b, v1.8b 868; CHECK-NEXT: ret 869entry: 870 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 871 ret <8 x i8> %shuffle.i 872} 873 874define <16 x i8> @test_vzip2q_p8(<16 x i8> %a, <16 x i8> %b) { 875; CHECK-LABEL: test_vzip2q_p8: 876; CHECK: // %bb.0: // %entry 877; CHECK-NEXT: zip2 v0.16b, v0.16b, v1.16b 878; CHECK-NEXT: ret 879entry: 880 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 881 ret <16 x i8> %shuffle.i 882} 883 884define <4 x i16> @test_vzip2_p16(<4 x i16> %a, <4 x i16> %b) { 885; CHECK-LABEL: test_vzip2_p16: 886; CHECK: // %bb.0: // %entry 887; CHECK-NEXT: zip2 v0.4h, v0.4h, v1.4h 888; CHECK-NEXT: ret 889entry: 890 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 891 ret <4 x i16> %shuffle.i 892} 893 894define <8 x i16> @test_vzip2q_p16(<8 x i16> %a, <8 x i16> %b) { 895; CHECK-LABEL: test_vzip2q_p16: 896; CHECK: // %bb.0: // %entry 897; CHECK-NEXT: zip2 v0.8h, v0.8h, v1.8h 898; CHECK-NEXT: ret 899entry: 900 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 901 ret <8 x i16> %shuffle.i 902} 903 904define <8 x i8> @test_vtrn1_s8(<8 x i8> %a, <8 x i8> %b) { 905; CHECK-LABEL: test_vtrn1_s8: 906; CHECK: // %bb.0: // %entry 907; CHECK-NEXT: trn1 v0.8b, v0.8b, v1.8b 908; CHECK-NEXT: ret 909entry: 910 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 911 ret <8 x i8> %shuffle.i 912} 913 914define <16 x i8> @test_vtrn1q_s8(<16 x i8> %a, <16 x i8> %b) { 915; CHECK-LABEL: test_vtrn1q_s8: 916; CHECK: // %bb.0: // %entry 917; CHECK-NEXT: trn1 v0.16b, v0.16b, v1.16b 918; CHECK-NEXT: ret 919entry: 920 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 921 ret <16 x i8> %shuffle.i 922} 923 924define <4 x i16> @test_vtrn1_s16(<4 x i16> %a, <4 x i16> %b) { 925; CHECK-LABEL: test_vtrn1_s16: 926; CHECK: // %bb.0: // %entry 927; CHECK-NEXT: trn1 v0.4h, v0.4h, v1.4h 928; CHECK-NEXT: ret 929entry: 930 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 931 ret <4 x i16> %shuffle.i 932} 933 934define <8 x i16> @test_vtrn1q_s16(<8 x i16> %a, <8 x i16> %b) { 935; CHECK-LABEL: test_vtrn1q_s16: 936; CHECK: // %bb.0: // %entry 937; CHECK-NEXT: trn1 v0.8h, v0.8h, v1.8h 938; CHECK-NEXT: ret 939entry: 940 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 941 ret <8 x i16> %shuffle.i 942} 943 944define <2 x i32> @test_vtrn1_s32(<2 x i32> %a, <2 x i32> %b) { 945; CHECK-LABEL: test_vtrn1_s32: 946; CHECK: // %bb.0: // %entry 947; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s 948; CHECK-NEXT: ret 949entry: 950 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 951 ret <2 x i32> %shuffle.i 952} 953 954define <4 x i32> @test_vtrn1q_s32(<4 x i32> %a, <4 x i32> %b) { 955; CHECK-LABEL: test_vtrn1q_s32: 956; CHECK: // %bb.0: // %entry 957; CHECK-NEXT: trn1 v0.4s, v0.4s, v1.4s 958; CHECK-NEXT: ret 959entry: 960 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 961 ret <4 x i32> %shuffle.i 962} 963 964define <2 x i64> @test_vtrn1q_s64(<2 x i64> %a, <2 x i64> %b) { 965; CHECK-LABEL: test_vtrn1q_s64: 966; CHECK: // %bb.0: // %entry 967; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 968; CHECK-NEXT: ret 969entry: 970 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 971 ret <2 x i64> %shuffle.i 972} 973 974define <8 x i8> @test_vtrn1_u8(<8 x i8> %a, <8 x i8> %b) { 975; CHECK-LABEL: test_vtrn1_u8: 976; CHECK: // %bb.0: // %entry 977; CHECK-NEXT: trn1 v0.8b, v0.8b, v1.8b 978; CHECK-NEXT: ret 979entry: 980 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 981 ret <8 x i8> %shuffle.i 982} 983 984define <16 x i8> @test_vtrn1q_u8(<16 x i8> %a, <16 x i8> %b) { 985; CHECK-LABEL: test_vtrn1q_u8: 986; CHECK: // %bb.0: // %entry 987; CHECK-NEXT: trn1 v0.16b, v0.16b, v1.16b 988; CHECK-NEXT: ret 989entry: 990 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 991 ret <16 x i8> %shuffle.i 992} 993 994define <4 x i16> @test_vtrn1_u16(<4 x i16> %a, <4 x i16> %b) { 995; CHECK-LABEL: test_vtrn1_u16: 996; CHECK: // %bb.0: // %entry 997; CHECK-NEXT: trn1 v0.4h, v0.4h, v1.4h 998; CHECK-NEXT: ret 999entry: 1000 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1001 ret <4 x i16> %shuffle.i 1002} 1003 1004define <8 x i16> @test_vtrn1q_u16(<8 x i16> %a, <8 x i16> %b) { 1005; CHECK-LABEL: test_vtrn1q_u16: 1006; CHECK: // %bb.0: // %entry 1007; CHECK-NEXT: trn1 v0.8h, v0.8h, v1.8h 1008; CHECK-NEXT: ret 1009entry: 1010 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1011 ret <8 x i16> %shuffle.i 1012} 1013 1014define <2 x i32> @test_vtrn1_u32(<2 x i32> %a, <2 x i32> %b) { 1015; CHECK-LABEL: test_vtrn1_u32: 1016; CHECK: // %bb.0: // %entry 1017; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s 1018; CHECK-NEXT: ret 1019entry: 1020 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 1021 ret <2 x i32> %shuffle.i 1022} 1023 1024define <4 x i32> @test_vtrn1q_u32(<4 x i32> %a, <4 x i32> %b) { 1025; CHECK-LABEL: test_vtrn1q_u32: 1026; CHECK: // %bb.0: // %entry 1027; CHECK-NEXT: trn1 v0.4s, v0.4s, v1.4s 1028; CHECK-NEXT: ret 1029entry: 1030 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1031 ret <4 x i32> %shuffle.i 1032} 1033 1034define <2 x i64> @test_vtrn1q_u64(<2 x i64> %a, <2 x i64> %b) { 1035; CHECK-LABEL: test_vtrn1q_u64: 1036; CHECK: // %bb.0: // %entry 1037; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 1038; CHECK-NEXT: ret 1039entry: 1040 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 1041 ret <2 x i64> %shuffle.i 1042} 1043 1044define <2 x ptr> @test_vtrn1q_p0(<2 x ptr> %a, <2 x ptr> %b) { 1045; CHECK-LABEL: test_vtrn1q_p0: 1046; CHECK: // %bb.0: // %entry 1047; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 1048; CHECK-NEXT: ret 1049entry: 1050 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 0, i32 2> 1051 ret <2 x ptr> %shuffle.i 1052} 1053 1054define <2 x float> @test_vtrn1_f32(<2 x float> %a, <2 x float> %b) { 1055; CHECK-LABEL: test_vtrn1_f32: 1056; CHECK: // %bb.0: // %entry 1057; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s 1058; CHECK-NEXT: ret 1059entry: 1060 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 1061 ret <2 x float> %shuffle.i 1062} 1063 1064define <4 x float> @test_vtrn1q_f32(<4 x float> %a, <4 x float> %b) { 1065; CHECK-LABEL: test_vtrn1q_f32: 1066; CHECK: // %bb.0: // %entry 1067; CHECK-NEXT: trn1 v0.4s, v0.4s, v1.4s 1068; CHECK-NEXT: ret 1069entry: 1070 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1071 ret <4 x float> %shuffle.i 1072} 1073 1074define <2 x double> @test_vtrn1q_f64(<2 x double> %a, <2 x double> %b) { 1075; CHECK-LABEL: test_vtrn1q_f64: 1076; CHECK: // %bb.0: // %entry 1077; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d 1078; CHECK-NEXT: ret 1079entry: 1080 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2> 1081 ret <2 x double> %shuffle.i 1082} 1083 1084define <8 x i8> @test_vtrn1_p8(<8 x i8> %a, <8 x i8> %b) { 1085; CHECK-LABEL: test_vtrn1_p8: 1086; CHECK: // %bb.0: // %entry 1087; CHECK-NEXT: trn1 v0.8b, v0.8b, v1.8b 1088; CHECK-NEXT: ret 1089entry: 1090 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1091 ret <8 x i8> %shuffle.i 1092} 1093 1094define <16 x i8> @test_vtrn1q_p8(<16 x i8> %a, <16 x i8> %b) { 1095; CHECK-LABEL: test_vtrn1q_p8: 1096; CHECK: // %bb.0: // %entry 1097; CHECK-NEXT: trn1 v0.16b, v0.16b, v1.16b 1098; CHECK-NEXT: ret 1099entry: 1100 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 1101 ret <16 x i8> %shuffle.i 1102} 1103 1104define <4 x i16> @test_vtrn1_p16(<4 x i16> %a, <4 x i16> %b) { 1105; CHECK-LABEL: test_vtrn1_p16: 1106; CHECK: // %bb.0: // %entry 1107; CHECK-NEXT: trn1 v0.4h, v0.4h, v1.4h 1108; CHECK-NEXT: ret 1109entry: 1110 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1111 ret <4 x i16> %shuffle.i 1112} 1113 1114define <8 x i16> @test_vtrn1q_p16(<8 x i16> %a, <8 x i16> %b) { 1115; CHECK-LABEL: test_vtrn1q_p16: 1116; CHECK: // %bb.0: // %entry 1117; CHECK-NEXT: trn1 v0.8h, v0.8h, v1.8h 1118; CHECK-NEXT: ret 1119entry: 1120 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1121 ret <8 x i16> %shuffle.i 1122} 1123 1124define <8 x i8> @test_vtrn2_s8(<8 x i8> %a, <8 x i8> %b) { 1125; CHECK-LABEL: test_vtrn2_s8: 1126; CHECK: // %bb.0: // %entry 1127; CHECK-NEXT: trn2 v0.8b, v0.8b, v1.8b 1128; CHECK-NEXT: ret 1129entry: 1130 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1131 ret <8 x i8> %shuffle.i 1132} 1133 1134define <16 x i8> @test_vtrn2q_s8(<16 x i8> %a, <16 x i8> %b) { 1135; CHECK-LABEL: test_vtrn2q_s8: 1136; CHECK: // %bb.0: // %entry 1137; CHECK-NEXT: trn2 v0.16b, v0.16b, v1.16b 1138; CHECK-NEXT: ret 1139entry: 1140 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1141 ret <16 x i8> %shuffle.i 1142} 1143 1144define <4 x i16> @test_vtrn2_s16(<4 x i16> %a, <4 x i16> %b) { 1145; CHECK-LABEL: test_vtrn2_s16: 1146; CHECK: // %bb.0: // %entry 1147; CHECK-NEXT: trn2 v0.4h, v0.4h, v1.4h 1148; CHECK-NEXT: ret 1149entry: 1150 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1151 ret <4 x i16> %shuffle.i 1152} 1153 1154define <8 x i16> @test_vtrn2q_s16(<8 x i16> %a, <8 x i16> %b) { 1155; CHECK-LABEL: test_vtrn2q_s16: 1156; CHECK: // %bb.0: // %entry 1157; CHECK-NEXT: trn2 v0.8h, v0.8h, v1.8h 1158; CHECK-NEXT: ret 1159entry: 1160 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1161 ret <8 x i16> %shuffle.i 1162} 1163 1164define <2 x i32> @test_vtrn2_s32(<2 x i32> %a, <2 x i32> %b) { 1165; CHECK-LABEL: test_vtrn2_s32: 1166; CHECK: // %bb.0: // %entry 1167; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s 1168; CHECK-NEXT: ret 1169entry: 1170 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 1171 ret <2 x i32> %shuffle.i 1172} 1173 1174define <4 x i32> @test_vtrn2q_s32(<4 x i32> %a, <4 x i32> %b) { 1175; CHECK-LABEL: test_vtrn2q_s32: 1176; CHECK: // %bb.0: // %entry 1177; CHECK-NEXT: trn2 v0.4s, v0.4s, v1.4s 1178; CHECK-NEXT: ret 1179entry: 1180 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1181 ret <4 x i32> %shuffle.i 1182} 1183 1184define <2 x i64> @test_vtrn2q_s64(<2 x i64> %a, <2 x i64> %b) { 1185; CHECK-LABEL: test_vtrn2q_s64: 1186; CHECK: // %bb.0: // %entry 1187; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 1188; CHECK-NEXT: ret 1189entry: 1190 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 1191 ret <2 x i64> %shuffle.i 1192} 1193 1194define <8 x i8> @test_vtrn2_u8(<8 x i8> %a, <8 x i8> %b) { 1195; CHECK-LABEL: test_vtrn2_u8: 1196; CHECK: // %bb.0: // %entry 1197; CHECK-NEXT: trn2 v0.8b, v0.8b, v1.8b 1198; CHECK-NEXT: ret 1199entry: 1200 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1201 ret <8 x i8> %shuffle.i 1202} 1203 1204define <16 x i8> @test_vtrn2q_u8(<16 x i8> %a, <16 x i8> %b) { 1205; CHECK-LABEL: test_vtrn2q_u8: 1206; CHECK: // %bb.0: // %entry 1207; CHECK-NEXT: trn2 v0.16b, v0.16b, v1.16b 1208; CHECK-NEXT: ret 1209entry: 1210 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1211 ret <16 x i8> %shuffle.i 1212} 1213 1214define <4 x i16> @test_vtrn2_u16(<4 x i16> %a, <4 x i16> %b) { 1215; CHECK-LABEL: test_vtrn2_u16: 1216; CHECK: // %bb.0: // %entry 1217; CHECK-NEXT: trn2 v0.4h, v0.4h, v1.4h 1218; CHECK-NEXT: ret 1219entry: 1220 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1221 ret <4 x i16> %shuffle.i 1222} 1223 1224define <8 x i16> @test_vtrn2q_u16(<8 x i16> %a, <8 x i16> %b) { 1225; CHECK-LABEL: test_vtrn2q_u16: 1226; CHECK: // %bb.0: // %entry 1227; CHECK-NEXT: trn2 v0.8h, v0.8h, v1.8h 1228; CHECK-NEXT: ret 1229entry: 1230 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1231 ret <8 x i16> %shuffle.i 1232} 1233 1234define <2 x i32> @test_vtrn2_u32(<2 x i32> %a, <2 x i32> %b) { 1235; CHECK-LABEL: test_vtrn2_u32: 1236; CHECK: // %bb.0: // %entry 1237; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s 1238; CHECK-NEXT: ret 1239entry: 1240 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 1241 ret <2 x i32> %shuffle.i 1242} 1243 1244define <4 x i32> @test_vtrn2q_u32(<4 x i32> %a, <4 x i32> %b) { 1245; CHECK-LABEL: test_vtrn2q_u32: 1246; CHECK: // %bb.0: // %entry 1247; CHECK-NEXT: trn2 v0.4s, v0.4s, v1.4s 1248; CHECK-NEXT: ret 1249entry: 1250 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1251 ret <4 x i32> %shuffle.i 1252} 1253 1254define <2 x i64> @test_vtrn2q_u64(<2 x i64> %a, <2 x i64> %b) { 1255; CHECK-LABEL: test_vtrn2q_u64: 1256; CHECK: // %bb.0: // %entry 1257; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 1258; CHECK-NEXT: ret 1259entry: 1260 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 1261 ret <2 x i64> %shuffle.i 1262} 1263 1264define <2 x ptr> @test_vtrn2q_p0(<2 x ptr> %a, <2 x ptr> %b) { 1265; CHECK-LABEL: test_vtrn2q_p0: 1266; CHECK: // %bb.0: // %entry 1267; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 1268; CHECK-NEXT: ret 1269entry: 1270 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 1, i32 3> 1271 ret <2 x ptr> %shuffle.i 1272} 1273 1274define <2 x float> @test_vtrn2_f32(<2 x float> %a, <2 x float> %b) { 1275; CHECK-LABEL: test_vtrn2_f32: 1276; CHECK: // %bb.0: // %entry 1277; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s 1278; CHECK-NEXT: ret 1279entry: 1280 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 1281 ret <2 x float> %shuffle.i 1282} 1283 1284define <4 x float> @test_vtrn2q_f32(<4 x float> %a, <4 x float> %b) { 1285; CHECK-LABEL: test_vtrn2q_f32: 1286; CHECK: // %bb.0: // %entry 1287; CHECK-NEXT: trn2 v0.4s, v0.4s, v1.4s 1288; CHECK-NEXT: ret 1289entry: 1290 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1291 ret <4 x float> %shuffle.i 1292} 1293 1294define <2 x double> @test_vtrn2q_f64(<2 x double> %a, <2 x double> %b) { 1295; CHECK-LABEL: test_vtrn2q_f64: 1296; CHECK: // %bb.0: // %entry 1297; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d 1298; CHECK-NEXT: ret 1299entry: 1300 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3> 1301 ret <2 x double> %shuffle.i 1302} 1303 1304define <8 x i8> @test_vtrn2_p8(<8 x i8> %a, <8 x i8> %b) { 1305; CHECK-LABEL: test_vtrn2_p8: 1306; CHECK: // %bb.0: // %entry 1307; CHECK-NEXT: trn2 v0.8b, v0.8b, v1.8b 1308; CHECK-NEXT: ret 1309entry: 1310 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1311 ret <8 x i8> %shuffle.i 1312} 1313 1314define <16 x i8> @test_vtrn2q_p8(<16 x i8> %a, <16 x i8> %b) { 1315; CHECK-LABEL: test_vtrn2q_p8: 1316; CHECK: // %bb.0: // %entry 1317; CHECK-NEXT: trn2 v0.16b, v0.16b, v1.16b 1318; CHECK-NEXT: ret 1319entry: 1320 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1321 ret <16 x i8> %shuffle.i 1322} 1323 1324define <4 x i16> @test_vtrn2_p16(<4 x i16> %a, <4 x i16> %b) { 1325; CHECK-LABEL: test_vtrn2_p16: 1326; CHECK: // %bb.0: // %entry 1327; CHECK-NEXT: trn2 v0.4h, v0.4h, v1.4h 1328; CHECK-NEXT: ret 1329entry: 1330 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1331 ret <4 x i16> %shuffle.i 1332} 1333 1334define <8 x i16> @test_vtrn2q_p16(<8 x i16> %a, <8 x i16> %b) { 1335; CHECK-LABEL: test_vtrn2q_p16: 1336; CHECK: // %bb.0: // %entry 1337; CHECK-NEXT: trn2 v0.8h, v0.8h, v1.8h 1338; CHECK-NEXT: ret 1339entry: 1340 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1341 ret <8 x i16> %shuffle.i 1342} 1343 1344define <8 x i8> @test_same_vuzp1_s8(<8 x i8> %a) { 1345; CHECK-LABEL: test_same_vuzp1_s8: 1346; CHECK: // %bb.0: // %entry 1347; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b 1348; CHECK-NEXT: ret 1349entry: 1350 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1351 ret <8 x i8> %shuffle.i 1352} 1353 1354define <16 x i8> @test_same_vuzp1q_s8(<16 x i8> %a) { 1355; CHECK-LABEL: test_same_vuzp1q_s8: 1356; CHECK: // %bb.0: // %entry 1357; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b 1358; CHECK-NEXT: ret 1359entry: 1360 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1361 ret <16 x i8> %shuffle.i 1362} 1363 1364define <4 x i16> @test_same_vuzp1_s16(<4 x i16> %a) { 1365; CHECK-LABEL: test_same_vuzp1_s16: 1366; CHECK: // %bb.0: // %entry 1367; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h 1368; CHECK-NEXT: ret 1369entry: 1370 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1371 ret <4 x i16> %shuffle.i 1372} 1373 1374define <8 x i16> @test_same_vuzp1q_s16(<8 x i16> %a) { 1375; CHECK-LABEL: test_same_vuzp1q_s16: 1376; CHECK: // %bb.0: // %entry 1377; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h 1378; CHECK-NEXT: ret 1379entry: 1380 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1381 ret <8 x i16> %shuffle.i 1382} 1383 1384define <4 x i32> @test_same_vuzp1q_s32(<4 x i32> %a) { 1385; CHECK-LABEL: test_same_vuzp1q_s32: 1386; CHECK: // %bb.0: // %entry 1387; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s 1388; CHECK-NEXT: ret 1389entry: 1390 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1391 ret <4 x i32> %shuffle.i 1392} 1393 1394define <8 x i8> @test_same_vuzp1_u8(<8 x i8> %a) { 1395; CHECK-LABEL: test_same_vuzp1_u8: 1396; CHECK: // %bb.0: // %entry 1397; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b 1398; CHECK-NEXT: ret 1399entry: 1400 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1401 ret <8 x i8> %shuffle.i 1402} 1403 1404define <16 x i8> @test_same_vuzp1q_u8(<16 x i8> %a) { 1405; CHECK-LABEL: test_same_vuzp1q_u8: 1406; CHECK: // %bb.0: // %entry 1407; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b 1408; CHECK-NEXT: ret 1409entry: 1410 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1411 ret <16 x i8> %shuffle.i 1412} 1413 1414define <4 x i16> @test_same_vuzp1_u16(<4 x i16> %a) { 1415; CHECK-LABEL: test_same_vuzp1_u16: 1416; CHECK: // %bb.0: // %entry 1417; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h 1418; CHECK-NEXT: ret 1419entry: 1420 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1421 ret <4 x i16> %shuffle.i 1422} 1423 1424define <8 x i16> @test_same_vuzp1q_u16(<8 x i16> %a) { 1425; CHECK-LABEL: test_same_vuzp1q_u16: 1426; CHECK: // %bb.0: // %entry 1427; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h 1428; CHECK-NEXT: ret 1429entry: 1430 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1431 ret <8 x i16> %shuffle.i 1432} 1433 1434define <4 x i32> @test_same_vuzp1q_u32(<4 x i32> %a) { 1435; CHECK-LABEL: test_same_vuzp1q_u32: 1436; CHECK: // %bb.0: // %entry 1437; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s 1438; CHECK-NEXT: ret 1439entry: 1440 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1441 ret <4 x i32> %shuffle.i 1442} 1443 1444define <4 x float> @test_same_vuzp1q_f32(<4 x float> %a) { 1445; CHECK-LABEL: test_same_vuzp1q_f32: 1446; CHECK: // %bb.0: // %entry 1447; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s 1448; CHECK-NEXT: ret 1449entry: 1450 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1451 ret <4 x float> %shuffle.i 1452} 1453 1454define <8 x i8> @test_same_vuzp1_p8(<8 x i8> %a) { 1455; CHECK-LABEL: test_same_vuzp1_p8: 1456; CHECK: // %bb.0: // %entry 1457; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b 1458; CHECK-NEXT: ret 1459entry: 1460 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1461 ret <8 x i8> %shuffle.i 1462} 1463 1464define <16 x i8> @test_same_vuzp1q_p8(<16 x i8> %a) { 1465; CHECK-LABEL: test_same_vuzp1q_p8: 1466; CHECK: // %bb.0: // %entry 1467; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b 1468; CHECK-NEXT: ret 1469entry: 1470 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1471 ret <16 x i8> %shuffle.i 1472} 1473 1474define <4 x i16> @test_same_vuzp1_p16(<4 x i16> %a) { 1475; CHECK-LABEL: test_same_vuzp1_p16: 1476; CHECK: // %bb.0: // %entry 1477; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h 1478; CHECK-NEXT: ret 1479entry: 1480 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1481 ret <4 x i16> %shuffle.i 1482} 1483 1484define <8 x i16> @test_same_vuzp1q_p16(<8 x i16> %a) { 1485; CHECK-LABEL: test_same_vuzp1q_p16: 1486; CHECK: // %bb.0: // %entry 1487; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h 1488; CHECK-NEXT: ret 1489entry: 1490 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1491 ret <8 x i16> %shuffle.i 1492} 1493 1494define <8 x i8> @test_same_vuzp2_s8(<8 x i8> %a) { 1495; CHECK-LABEL: test_same_vuzp2_s8: 1496; CHECK: // %bb.0: // %entry 1497; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b 1498; CHECK-NEXT: ret 1499entry: 1500 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1501 ret <8 x i8> %shuffle.i 1502} 1503 1504define <16 x i8> @test_same_vuzp2q_s8(<16 x i8> %a) { 1505; CHECK-LABEL: test_same_vuzp2q_s8: 1506; CHECK: // %bb.0: // %entry 1507; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b 1508; CHECK-NEXT: ret 1509entry: 1510 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1511 ret <16 x i8> %shuffle.i 1512} 1513 1514define <4 x i16> @test_same_vuzp2_s16(<4 x i16> %a) { 1515; CHECK-LABEL: test_same_vuzp2_s16: 1516; CHECK: // %bb.0: // %entry 1517; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h 1518; CHECK-NEXT: ret 1519entry: 1520 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1521 ret <4 x i16> %shuffle.i 1522} 1523 1524define <8 x i16> @test_same_vuzp2q_s16(<8 x i16> %a) { 1525; CHECK-LABEL: test_same_vuzp2q_s16: 1526; CHECK: // %bb.0: // %entry 1527; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h 1528; CHECK-NEXT: ret 1529entry: 1530 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1531 ret <8 x i16> %shuffle.i 1532} 1533 1534define <4 x i32> @test_same_vuzp2q_s32(<4 x i32> %a) { 1535; CHECK-LABEL: test_same_vuzp2q_s32: 1536; CHECK: // %bb.0: // %entry 1537; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s 1538; CHECK-NEXT: ret 1539entry: 1540 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1541 ret <4 x i32> %shuffle.i 1542} 1543 1544define <8 x i8> @test_same_vuzp2_u8(<8 x i8> %a) { 1545; CHECK-LABEL: test_same_vuzp2_u8: 1546; CHECK: // %bb.0: // %entry 1547; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b 1548; CHECK-NEXT: ret 1549entry: 1550 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1551 ret <8 x i8> %shuffle.i 1552} 1553 1554define <16 x i8> @test_same_vuzp2q_u8(<16 x i8> %a) { 1555; CHECK-LABEL: test_same_vuzp2q_u8: 1556; CHECK: // %bb.0: // %entry 1557; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b 1558; CHECK-NEXT: ret 1559entry: 1560 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1561 ret <16 x i8> %shuffle.i 1562} 1563 1564define <4 x i16> @test_same_vuzp2_u16(<4 x i16> %a) { 1565; CHECK-LABEL: test_same_vuzp2_u16: 1566; CHECK: // %bb.0: // %entry 1567; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h 1568; CHECK-NEXT: ret 1569entry: 1570 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1571 ret <4 x i16> %shuffle.i 1572} 1573 1574define <8 x i16> @test_same_vuzp2q_u16(<8 x i16> %a) { 1575; CHECK-LABEL: test_same_vuzp2q_u16: 1576; CHECK: // %bb.0: // %entry 1577; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h 1578; CHECK-NEXT: ret 1579entry: 1580 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1581 ret <8 x i16> %shuffle.i 1582} 1583 1584define <4 x i32> @test_same_vuzp2q_u32(<4 x i32> %a) { 1585; CHECK-LABEL: test_same_vuzp2q_u32: 1586; CHECK: // %bb.0: // %entry 1587; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s 1588; CHECK-NEXT: ret 1589entry: 1590 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1591 ret <4 x i32> %shuffle.i 1592} 1593 1594define <4 x float> @test_same_vuzp2q_f32(<4 x float> %a) { 1595; CHECK-LABEL: test_same_vuzp2q_f32: 1596; CHECK: // %bb.0: // %entry 1597; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s 1598; CHECK-NEXT: ret 1599entry: 1600 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1601 ret <4 x float> %shuffle.i 1602} 1603 1604define <8 x i8> @test_same_vuzp2_p8(<8 x i8> %a) { 1605; CHECK-LABEL: test_same_vuzp2_p8: 1606; CHECK: // %bb.0: // %entry 1607; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b 1608; CHECK-NEXT: ret 1609entry: 1610 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1611 ret <8 x i8> %shuffle.i 1612} 1613 1614define <16 x i8> @test_same_vuzp2q_p8(<16 x i8> %a) { 1615; CHECK-LABEL: test_same_vuzp2q_p8: 1616; CHECK: // %bb.0: // %entry 1617; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b 1618; CHECK-NEXT: ret 1619entry: 1620 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1621 ret <16 x i8> %shuffle.i 1622} 1623 1624define <4 x i16> @test_same_vuzp2_p16(<4 x i16> %a) { 1625; CHECK-LABEL: test_same_vuzp2_p16: 1626; CHECK: // %bb.0: // %entry 1627; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h 1628; CHECK-NEXT: ret 1629entry: 1630 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1631 ret <4 x i16> %shuffle.i 1632} 1633 1634define <8 x i16> @test_same_vuzp2q_p16(<8 x i16> %a) { 1635; CHECK-LABEL: test_same_vuzp2q_p16: 1636; CHECK: // %bb.0: // %entry 1637; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h 1638; CHECK-NEXT: ret 1639entry: 1640 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1641 ret <8 x i16> %shuffle.i 1642} 1643 1644define <8 x i8> @test_same_vzip1_s8(<8 x i8> %a) { 1645; CHECK-LABEL: test_same_vzip1_s8: 1646; CHECK: // %bb.0: // %entry 1647; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b 1648; CHECK-NEXT: ret 1649entry: 1650 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1651 ret <8 x i8> %shuffle.i 1652} 1653 1654define <16 x i8> @test_same_vzip1q_s8(<16 x i8> %a) { 1655; CHECK-LABEL: test_same_vzip1q_s8: 1656; CHECK: // %bb.0: // %entry 1657; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b 1658; CHECK-NEXT: ret 1659entry: 1660 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 1661 ret <16 x i8> %shuffle.i 1662} 1663 1664define <4 x i16> @test_same_vzip1_s16(<4 x i16> %a) { 1665; CHECK-LABEL: test_same_vzip1_s16: 1666; CHECK: // %bb.0: // %entry 1667; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h 1668; CHECK-NEXT: ret 1669entry: 1670 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1671 ret <4 x i16> %shuffle.i 1672} 1673 1674define <8 x i16> @test_same_vzip1q_s16(<8 x i16> %a) { 1675; CHECK-LABEL: test_same_vzip1q_s16: 1676; CHECK: // %bb.0: // %entry 1677; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h 1678; CHECK-NEXT: ret 1679entry: 1680 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1681 ret <8 x i16> %shuffle.i 1682} 1683 1684define <4 x i32> @test_same_vzip1q_s32(<4 x i32> %a) { 1685; CHECK-LABEL: test_same_vzip1q_s32: 1686; CHECK: // %bb.0: // %entry 1687; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s 1688; CHECK-NEXT: ret 1689entry: 1690 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1691 ret <4 x i32> %shuffle.i 1692} 1693 1694define <8 x i8> @test_same_vzip1_u8(<8 x i8> %a) { 1695; CHECK-LABEL: test_same_vzip1_u8: 1696; CHECK: // %bb.0: // %entry 1697; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b 1698; CHECK-NEXT: ret 1699entry: 1700 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1701 ret <8 x i8> %shuffle.i 1702} 1703 1704define <16 x i8> @test_same_vzip1q_u8(<16 x i8> %a) { 1705; CHECK-LABEL: test_same_vzip1q_u8: 1706; CHECK: // %bb.0: // %entry 1707; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b 1708; CHECK-NEXT: ret 1709entry: 1710 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 1711 ret <16 x i8> %shuffle.i 1712} 1713 1714define <4 x i16> @test_same_vzip1_u16(<4 x i16> %a) { 1715; CHECK-LABEL: test_same_vzip1_u16: 1716; CHECK: // %bb.0: // %entry 1717; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h 1718; CHECK-NEXT: ret 1719entry: 1720 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1721 ret <4 x i16> %shuffle.i 1722} 1723 1724define <8 x i16> @test_same_vzip1q_u16(<8 x i16> %a) { 1725; CHECK-LABEL: test_same_vzip1q_u16: 1726; CHECK: // %bb.0: // %entry 1727; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h 1728; CHECK-NEXT: ret 1729entry: 1730 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1731 ret <8 x i16> %shuffle.i 1732} 1733 1734define <4 x i32> @test_same_vzip1q_u32(<4 x i32> %a) { 1735; CHECK-LABEL: test_same_vzip1q_u32: 1736; CHECK: // %bb.0: // %entry 1737; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s 1738; CHECK-NEXT: ret 1739entry: 1740 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1741 ret <4 x i32> %shuffle.i 1742} 1743 1744define <4 x float> @test_same_vzip1q_f32(<4 x float> %a) { 1745; CHECK-LABEL: test_same_vzip1q_f32: 1746; CHECK: // %bb.0: // %entry 1747; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s 1748; CHECK-NEXT: ret 1749entry: 1750 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1751 ret <4 x float> %shuffle.i 1752} 1753 1754define <8 x i8> @test_same_vzip1_p8(<8 x i8> %a) { 1755; CHECK-LABEL: test_same_vzip1_p8: 1756; CHECK: // %bb.0: // %entry 1757; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b 1758; CHECK-NEXT: ret 1759entry: 1760 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1761 ret <8 x i8> %shuffle.i 1762} 1763 1764define <16 x i8> @test_same_vzip1q_p8(<16 x i8> %a) { 1765; CHECK-LABEL: test_same_vzip1q_p8: 1766; CHECK: // %bb.0: // %entry 1767; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b 1768; CHECK-NEXT: ret 1769entry: 1770 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 1771 ret <16 x i8> %shuffle.i 1772} 1773 1774define <4 x i16> @test_same_vzip1_p16(<4 x i16> %a) { 1775; CHECK-LABEL: test_same_vzip1_p16: 1776; CHECK: // %bb.0: // %entry 1777; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h 1778; CHECK-NEXT: ret 1779entry: 1780 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1781 ret <4 x i16> %shuffle.i 1782} 1783 1784define <8 x i16> @test_same_vzip1q_p16(<8 x i16> %a) { 1785; CHECK-LABEL: test_same_vzip1q_p16: 1786; CHECK: // %bb.0: // %entry 1787; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h 1788; CHECK-NEXT: ret 1789entry: 1790 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1791 ret <8 x i16> %shuffle.i 1792} 1793 1794define <4 x i8> @test_vzip1_v4i8(<8 x i8> %p) { 1795; CHECK-SD-LABEL: test_vzip1_v4i8: 1796; CHECK-SD: // %bb.0: 1797; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b 1798; CHECK-SD-NEXT: ret 1799; 1800; CHECK-GI-LABEL: test_vzip1_v4i8: 1801; CHECK-GI: // %bb.0: 1802; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0 1803; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 1804; CHECK-GI-NEXT: ret 1805 %lo = shufflevector <8 x i8> %p, <8 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1806 ret <4 x i8> %lo 1807} 1808 1809define <8 x i8> @test_same_vzip2_s8(<8 x i8> %a) { 1810; CHECK-LABEL: test_same_vzip2_s8: 1811; CHECK: // %bb.0: // %entry 1812; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b 1813; CHECK-NEXT: ret 1814entry: 1815 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1816 ret <8 x i8> %shuffle.i 1817} 1818 1819define <16 x i8> @test_same_vzip2q_s8(<16 x i8> %a) { 1820; CHECK-LABEL: test_same_vzip2q_s8: 1821; CHECK: // %bb.0: // %entry 1822; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b 1823; CHECK-NEXT: ret 1824entry: 1825 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 1826 ret <16 x i8> %shuffle.i 1827} 1828 1829define <4 x i16> @test_same_vzip2_s16(<4 x i16> %a) { 1830; CHECK-LABEL: test_same_vzip2_s16: 1831; CHECK: // %bb.0: // %entry 1832; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h 1833; CHECK-NEXT: ret 1834entry: 1835 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1836 ret <4 x i16> %shuffle.i 1837} 1838 1839define <8 x i16> @test_same_vzip2q_s16(<8 x i16> %a) { 1840; CHECK-LABEL: test_same_vzip2q_s16: 1841; CHECK: // %bb.0: // %entry 1842; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h 1843; CHECK-NEXT: ret 1844entry: 1845 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1846 ret <8 x i16> %shuffle.i 1847} 1848 1849define <4 x i32> @test_same_vzip2q_s32(<4 x i32> %a) { 1850; CHECK-LABEL: test_same_vzip2q_s32: 1851; CHECK: // %bb.0: // %entry 1852; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s 1853; CHECK-NEXT: ret 1854entry: 1855 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1856 ret <4 x i32> %shuffle.i 1857} 1858 1859define <8 x i8> @test_same_vzip2_u8(<8 x i8> %a) { 1860; CHECK-LABEL: test_same_vzip2_u8: 1861; CHECK: // %bb.0: // %entry 1862; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b 1863; CHECK-NEXT: ret 1864entry: 1865 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1866 ret <8 x i8> %shuffle.i 1867} 1868 1869define <16 x i8> @test_same_vzip2q_u8(<16 x i8> %a) { 1870; CHECK-LABEL: test_same_vzip2q_u8: 1871; CHECK: // %bb.0: // %entry 1872; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b 1873; CHECK-NEXT: ret 1874entry: 1875 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 1876 ret <16 x i8> %shuffle.i 1877} 1878 1879define <4 x i16> @test_same_vzip2_u16(<4 x i16> %a) { 1880; CHECK-LABEL: test_same_vzip2_u16: 1881; CHECK: // %bb.0: // %entry 1882; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h 1883; CHECK-NEXT: ret 1884entry: 1885 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1886 ret <4 x i16> %shuffle.i 1887} 1888 1889define <8 x i16> @test_same_vzip2q_u16(<8 x i16> %a) { 1890; CHECK-LABEL: test_same_vzip2q_u16: 1891; CHECK: // %bb.0: // %entry 1892; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h 1893; CHECK-NEXT: ret 1894entry: 1895 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1896 ret <8 x i16> %shuffle.i 1897} 1898 1899define <4 x i32> @test_same_vzip2q_u32(<4 x i32> %a) { 1900; CHECK-LABEL: test_same_vzip2q_u32: 1901; CHECK: // %bb.0: // %entry 1902; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s 1903; CHECK-NEXT: ret 1904entry: 1905 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1906 ret <4 x i32> %shuffle.i 1907} 1908 1909define <4 x float> @test_same_vzip2q_f32(<4 x float> %a) { 1910; CHECK-LABEL: test_same_vzip2q_f32: 1911; CHECK: // %bb.0: // %entry 1912; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s 1913; CHECK-NEXT: ret 1914entry: 1915 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1916 ret <4 x float> %shuffle.i 1917} 1918 1919define <8 x i8> @test_same_vzip2_p8(<8 x i8> %a) { 1920; CHECK-LABEL: test_same_vzip2_p8: 1921; CHECK: // %bb.0: // %entry 1922; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b 1923; CHECK-NEXT: ret 1924entry: 1925 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1926 ret <8 x i8> %shuffle.i 1927} 1928 1929define <16 x i8> @test_same_vzip2q_p8(<16 x i8> %a) { 1930; CHECK-LABEL: test_same_vzip2q_p8: 1931; CHECK: // %bb.0: // %entry 1932; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b 1933; CHECK-NEXT: ret 1934entry: 1935 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 1936 ret <16 x i8> %shuffle.i 1937} 1938 1939define <4 x i16> @test_same_vzip2_p16(<4 x i16> %a) { 1940; CHECK-LABEL: test_same_vzip2_p16: 1941; CHECK: // %bb.0: // %entry 1942; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h 1943; CHECK-NEXT: ret 1944entry: 1945 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1946 ret <4 x i16> %shuffle.i 1947} 1948 1949define <8 x i16> @test_same_vzip2q_p16(<8 x i16> %a) { 1950; CHECK-LABEL: test_same_vzip2q_p16: 1951; CHECK: // %bb.0: // %entry 1952; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h 1953; CHECK-NEXT: ret 1954entry: 1955 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1956 ret <8 x i16> %shuffle.i 1957} 1958 1959define <8 x i8> @test_same_vtrn1_s8(<8 x i8> %a) { 1960; CHECK-LABEL: test_same_vtrn1_s8: 1961; CHECK: // %bb.0: // %entry 1962; CHECK-NEXT: trn1 v0.8b, v0.8b, v0.8b 1963; CHECK-NEXT: ret 1964entry: 1965 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1966 ret <8 x i8> %shuffle.i 1967} 1968 1969define <16 x i8> @test_same_vtrn1q_s8(<16 x i8> %a) { 1970; CHECK-LABEL: test_same_vtrn1q_s8: 1971; CHECK: // %bb.0: // %entry 1972; CHECK-NEXT: trn1 v0.16b, v0.16b, v0.16b 1973; CHECK-NEXT: ret 1974entry: 1975 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 1976 ret <16 x i8> %shuffle.i 1977} 1978 1979define <4 x i16> @test_same_vtrn1_s16(<4 x i16> %a) { 1980; CHECK-LABEL: test_same_vtrn1_s16: 1981; CHECK: // %bb.0: // %entry 1982; CHECK-NEXT: trn1 v0.4h, v0.4h, v0.4h 1983; CHECK-NEXT: ret 1984entry: 1985 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1986 ret <4 x i16> %shuffle.i 1987} 1988 1989define <8 x i16> @test_same_vtrn1q_s16(<8 x i16> %a) { 1990; CHECK-LABEL: test_same_vtrn1q_s16: 1991; CHECK: // %bb.0: // %entry 1992; CHECK-NEXT: trn1 v0.8h, v0.8h, v0.8h 1993; CHECK-NEXT: ret 1994entry: 1995 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1996 ret <8 x i16> %shuffle.i 1997} 1998 1999define <4 x i32> @test_same_vtrn1q_s32(<4 x i32> %a) { 2000; CHECK-LABEL: test_same_vtrn1q_s32: 2001; CHECK: // %bb.0: // %entry 2002; CHECK-NEXT: trn1 v0.4s, v0.4s, v0.4s 2003; CHECK-NEXT: ret 2004entry: 2005 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2006 ret <4 x i32> %shuffle.i 2007} 2008 2009define <8 x i8> @test_same_vtrn1_u8(<8 x i8> %a) { 2010; CHECK-LABEL: test_same_vtrn1_u8: 2011; CHECK: // %bb.0: // %entry 2012; CHECK-NEXT: trn1 v0.8b, v0.8b, v0.8b 2013; CHECK-NEXT: ret 2014entry: 2015 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2016 ret <8 x i8> %shuffle.i 2017} 2018 2019define <16 x i8> @test_same_vtrn1q_u8(<16 x i8> %a) { 2020; CHECK-LABEL: test_same_vtrn1q_u8: 2021; CHECK: // %bb.0: // %entry 2022; CHECK-NEXT: trn1 v0.16b, v0.16b, v0.16b 2023; CHECK-NEXT: ret 2024entry: 2025 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 2026 ret <16 x i8> %shuffle.i 2027} 2028 2029define <4 x i16> @test_same_vtrn1_u16(<4 x i16> %a) { 2030; CHECK-LABEL: test_same_vtrn1_u16: 2031; CHECK: // %bb.0: // %entry 2032; CHECK-NEXT: trn1 v0.4h, v0.4h, v0.4h 2033; CHECK-NEXT: ret 2034entry: 2035 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2036 ret <4 x i16> %shuffle.i 2037} 2038 2039define <8 x i16> @test_same_vtrn1q_u16(<8 x i16> %a) { 2040; CHECK-LABEL: test_same_vtrn1q_u16: 2041; CHECK: // %bb.0: // %entry 2042; CHECK-NEXT: trn1 v0.8h, v0.8h, v0.8h 2043; CHECK-NEXT: ret 2044entry: 2045 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2046 ret <8 x i16> %shuffle.i 2047} 2048 2049define <4 x i32> @test_same_vtrn1q_u32(<4 x i32> %a) { 2050; CHECK-LABEL: test_same_vtrn1q_u32: 2051; CHECK: // %bb.0: // %entry 2052; CHECK-NEXT: trn1 v0.4s, v0.4s, v0.4s 2053; CHECK-NEXT: ret 2054entry: 2055 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2056 ret <4 x i32> %shuffle.i 2057} 2058 2059define <4 x float> @test_same_vtrn1q_f32(<4 x float> %a) { 2060; CHECK-LABEL: test_same_vtrn1q_f32: 2061; CHECK: // %bb.0: // %entry 2062; CHECK-NEXT: trn1 v0.4s, v0.4s, v0.4s 2063; CHECK-NEXT: ret 2064entry: 2065 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2066 ret <4 x float> %shuffle.i 2067} 2068 2069define <8 x i8> @test_same_vtrn1_p8(<8 x i8> %a) { 2070; CHECK-LABEL: test_same_vtrn1_p8: 2071; CHECK: // %bb.0: // %entry 2072; CHECK-NEXT: trn1 v0.8b, v0.8b, v0.8b 2073; CHECK-NEXT: ret 2074entry: 2075 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2076 ret <8 x i8> %shuffle.i 2077} 2078 2079define <16 x i8> @test_same_vtrn1q_p8(<16 x i8> %a) { 2080; CHECK-LABEL: test_same_vtrn1q_p8: 2081; CHECK: // %bb.0: // %entry 2082; CHECK-NEXT: trn1 v0.16b, v0.16b, v0.16b 2083; CHECK-NEXT: ret 2084entry: 2085 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 2086 ret <16 x i8> %shuffle.i 2087} 2088 2089define <4 x i16> @test_same_vtrn1_p16(<4 x i16> %a) { 2090; CHECK-LABEL: test_same_vtrn1_p16: 2091; CHECK: // %bb.0: // %entry 2092; CHECK-NEXT: trn1 v0.4h, v0.4h, v0.4h 2093; CHECK-NEXT: ret 2094entry: 2095 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2096 ret <4 x i16> %shuffle.i 2097} 2098 2099define <8 x i16> @test_same_vtrn1q_p16(<8 x i16> %a) { 2100; CHECK-LABEL: test_same_vtrn1q_p16: 2101; CHECK: // %bb.0: // %entry 2102; CHECK-NEXT: trn1 v0.8h, v0.8h, v0.8h 2103; CHECK-NEXT: ret 2104entry: 2105 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2106 ret <8 x i16> %shuffle.i 2107} 2108 2109define <8 x i8> @test_same_vtrn2_s8(<8 x i8> %a) { 2110; CHECK-LABEL: test_same_vtrn2_s8: 2111; CHECK: // %bb.0: // %entry 2112; CHECK-NEXT: trn2 v0.8b, v0.8b, v0.8b 2113; CHECK-NEXT: ret 2114entry: 2115 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2116 ret <8 x i8> %shuffle.i 2117} 2118 2119define <16 x i8> @test_same_vtrn2q_s8(<16 x i8> %a) { 2120; CHECK-LABEL: test_same_vtrn2q_s8: 2121; CHECK: // %bb.0: // %entry 2122; CHECK-NEXT: trn2 v0.16b, v0.16b, v0.16b 2123; CHECK-NEXT: ret 2124entry: 2125 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 2126 ret <16 x i8> %shuffle.i 2127} 2128 2129define <4 x i16> @test_same_vtrn2_s16(<4 x i16> %a) { 2130; CHECK-LABEL: test_same_vtrn2_s16: 2131; CHECK: // %bb.0: // %entry 2132; CHECK-NEXT: trn2 v0.4h, v0.4h, v0.4h 2133; CHECK-NEXT: ret 2134entry: 2135 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2136 ret <4 x i16> %shuffle.i 2137} 2138 2139define <8 x i16> @test_same_vtrn2q_s16(<8 x i16> %a) { 2140; CHECK-LABEL: test_same_vtrn2q_s16: 2141; CHECK: // %bb.0: // %entry 2142; CHECK-NEXT: trn2 v0.8h, v0.8h, v0.8h 2143; CHECK-NEXT: ret 2144entry: 2145 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2146 ret <8 x i16> %shuffle.i 2147} 2148 2149define <4 x i32> @test_same_vtrn2q_s32(<4 x i32> %a) { 2150; CHECK-LABEL: test_same_vtrn2q_s32: 2151; CHECK: // %bb.0: // %entry 2152; CHECK-NEXT: trn2 v0.4s, v0.4s, v0.4s 2153; CHECK-NEXT: ret 2154entry: 2155 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2156 ret <4 x i32> %shuffle.i 2157} 2158 2159define <8 x i8> @test_same_vtrn2_u8(<8 x i8> %a) { 2160; CHECK-LABEL: test_same_vtrn2_u8: 2161; CHECK: // %bb.0: // %entry 2162; CHECK-NEXT: trn2 v0.8b, v0.8b, v0.8b 2163; CHECK-NEXT: ret 2164entry: 2165 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2166 ret <8 x i8> %shuffle.i 2167} 2168 2169define <16 x i8> @test_same_vtrn2q_u8(<16 x i8> %a) { 2170; CHECK-LABEL: test_same_vtrn2q_u8: 2171; CHECK: // %bb.0: // %entry 2172; CHECK-NEXT: trn2 v0.16b, v0.16b, v0.16b 2173; CHECK-NEXT: ret 2174entry: 2175 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 2176 ret <16 x i8> %shuffle.i 2177} 2178 2179define <4 x i16> @test_same_vtrn2_u16(<4 x i16> %a) { 2180; CHECK-LABEL: test_same_vtrn2_u16: 2181; CHECK: // %bb.0: // %entry 2182; CHECK-NEXT: trn2 v0.4h, v0.4h, v0.4h 2183; CHECK-NEXT: ret 2184entry: 2185 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2186 ret <4 x i16> %shuffle.i 2187} 2188 2189define <8 x i16> @test_same_vtrn2q_u16(<8 x i16> %a) { 2190; CHECK-LABEL: test_same_vtrn2q_u16: 2191; CHECK: // %bb.0: // %entry 2192; CHECK-NEXT: trn2 v0.8h, v0.8h, v0.8h 2193; CHECK-NEXT: ret 2194entry: 2195 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2196 ret <8 x i16> %shuffle.i 2197} 2198 2199define <4 x i32> @test_same_vtrn2q_u32(<4 x i32> %a) { 2200; CHECK-LABEL: test_same_vtrn2q_u32: 2201; CHECK: // %bb.0: // %entry 2202; CHECK-NEXT: trn2 v0.4s, v0.4s, v0.4s 2203; CHECK-NEXT: ret 2204entry: 2205 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2206 ret <4 x i32> %shuffle.i 2207} 2208 2209define <4 x float> @test_same_vtrn2q_f32(<4 x float> %a) { 2210; CHECK-LABEL: test_same_vtrn2q_f32: 2211; CHECK: // %bb.0: // %entry 2212; CHECK-NEXT: trn2 v0.4s, v0.4s, v0.4s 2213; CHECK-NEXT: ret 2214entry: 2215 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2216 ret <4 x float> %shuffle.i 2217} 2218 2219define <8 x i8> @test_same_vtrn2_p8(<8 x i8> %a) { 2220; CHECK-LABEL: test_same_vtrn2_p8: 2221; CHECK: // %bb.0: // %entry 2222; CHECK-NEXT: trn2 v0.8b, v0.8b, v0.8b 2223; CHECK-NEXT: ret 2224entry: 2225 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2226 ret <8 x i8> %shuffle.i 2227} 2228 2229define <16 x i8> @test_same_vtrn2q_p8(<16 x i8> %a) { 2230; CHECK-LABEL: test_same_vtrn2q_p8: 2231; CHECK: // %bb.0: // %entry 2232; CHECK-NEXT: trn2 v0.16b, v0.16b, v0.16b 2233; CHECK-NEXT: ret 2234entry: 2235 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 2236 ret <16 x i8> %shuffle.i 2237} 2238 2239define <4 x i16> @test_same_vtrn2_p16(<4 x i16> %a) { 2240; CHECK-LABEL: test_same_vtrn2_p16: 2241; CHECK: // %bb.0: // %entry 2242; CHECK-NEXT: trn2 v0.4h, v0.4h, v0.4h 2243; CHECK-NEXT: ret 2244entry: 2245 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2246 ret <4 x i16> %shuffle.i 2247} 2248 2249define <8 x i16> @test_same_vtrn2q_p16(<8 x i16> %a) { 2250; CHECK-LABEL: test_same_vtrn2q_p16: 2251; CHECK: // %bb.0: // %entry 2252; CHECK-NEXT: trn2 v0.8h, v0.8h, v0.8h 2253; CHECK-NEXT: ret 2254entry: 2255 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2256 ret <8 x i16> %shuffle.i 2257} 2258 2259 2260define <8 x i8> @test_undef_vuzp1_s8(<8 x i8> %a) { 2261; CHECK-LABEL: test_undef_vuzp1_s8: 2262; CHECK: // %bb.0: // %entry 2263; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b 2264; CHECK-NEXT: ret 2265entry: 2266 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2267 ret <8 x i8> %shuffle.i 2268} 2269 2270define <16 x i8> @test_undef_vuzp1q_s8(<16 x i8> %a) { 2271; CHECK-SD-LABEL: test_undef_vuzp1q_s8: 2272; CHECK-SD: // %bb.0: // %entry 2273; CHECK-SD-NEXT: xtn v0.8b, v0.8h 2274; CHECK-SD-NEXT: ret 2275; 2276; CHECK-GI-LABEL: test_undef_vuzp1q_s8: 2277; CHECK-GI: // %bb.0: // %entry 2278; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v0.16b 2279; CHECK-GI-NEXT: ret 2280entry: 2281 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 2282 ret <16 x i8> %shuffle.i 2283} 2284 2285define <4 x i16> @test_undef_vuzp1_s16(<4 x i16> %a) { 2286; CHECK-LABEL: test_undef_vuzp1_s16: 2287; CHECK: // %bb.0: // %entry 2288; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h 2289; CHECK-NEXT: ret 2290entry: 2291 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2292 ret <4 x i16> %shuffle.i 2293} 2294 2295define <8 x i16> @test_undef_vuzp1q_s16(<8 x i16> %a) { 2296; CHECK-SD-LABEL: test_undef_vuzp1q_s16: 2297; CHECK-SD: // %bb.0: // %entry 2298; CHECK-SD-NEXT: xtn v0.4h, v0.4s 2299; CHECK-SD-NEXT: ret 2300; 2301; CHECK-GI-LABEL: test_undef_vuzp1q_s16: 2302; CHECK-GI: // %bb.0: // %entry 2303; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v0.8h 2304; CHECK-GI-NEXT: ret 2305entry: 2306 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2307 ret <8 x i16> %shuffle.i 2308} 2309 2310define <4 x i32> @test_undef_vuzp1q_s32(<4 x i32> %a) { 2311; CHECK-SD-LABEL: test_undef_vuzp1q_s32: 2312; CHECK-SD: // %bb.0: // %entry 2313; CHECK-SD-NEXT: xtn v0.2s, v0.2d 2314; CHECK-SD-NEXT: ret 2315; 2316; CHECK-GI-LABEL: test_undef_vuzp1q_s32: 2317; CHECK-GI: // %bb.0: // %entry 2318; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v0.4s 2319; CHECK-GI-NEXT: ret 2320entry: 2321 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2322 ret <4 x i32> %shuffle.i 2323} 2324 2325define <8 x i8> @test_undef_vuzp1_u8(<8 x i8> %a) { 2326; CHECK-LABEL: test_undef_vuzp1_u8: 2327; CHECK: // %bb.0: // %entry 2328; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b 2329; CHECK-NEXT: ret 2330entry: 2331 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2332 ret <8 x i8> %shuffle.i 2333} 2334 2335define <16 x i8> @test_undef_vuzp1q_u8(<16 x i8> %a) { 2336; CHECK-SD-LABEL: test_undef_vuzp1q_u8: 2337; CHECK-SD: // %bb.0: // %entry 2338; CHECK-SD-NEXT: xtn v0.8b, v0.8h 2339; CHECK-SD-NEXT: ret 2340; 2341; CHECK-GI-LABEL: test_undef_vuzp1q_u8: 2342; CHECK-GI: // %bb.0: // %entry 2343; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v0.16b 2344; CHECK-GI-NEXT: ret 2345entry: 2346 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 2347 ret <16 x i8> %shuffle.i 2348} 2349 2350define <4 x i16> @test_undef_vuzp1_u16(<4 x i16> %a) { 2351; CHECK-LABEL: test_undef_vuzp1_u16: 2352; CHECK: // %bb.0: // %entry 2353; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h 2354; CHECK-NEXT: ret 2355entry: 2356 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2357 ret <4 x i16> %shuffle.i 2358} 2359 2360define <8 x i16> @test_undef_vuzp1q_u16(<8 x i16> %a) { 2361; CHECK-SD-LABEL: test_undef_vuzp1q_u16: 2362; CHECK-SD: // %bb.0: // %entry 2363; CHECK-SD-NEXT: xtn v0.4h, v0.4s 2364; CHECK-SD-NEXT: ret 2365; 2366; CHECK-GI-LABEL: test_undef_vuzp1q_u16: 2367; CHECK-GI: // %bb.0: // %entry 2368; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v0.8h 2369; CHECK-GI-NEXT: ret 2370entry: 2371 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2372 ret <8 x i16> %shuffle.i 2373} 2374 2375define <4 x i32> @test_undef_vuzp1q_u32(<4 x i32> %a) { 2376; CHECK-SD-LABEL: test_undef_vuzp1q_u32: 2377; CHECK-SD: // %bb.0: // %entry 2378; CHECK-SD-NEXT: xtn v0.2s, v0.2d 2379; CHECK-SD-NEXT: ret 2380; 2381; CHECK-GI-LABEL: test_undef_vuzp1q_u32: 2382; CHECK-GI: // %bb.0: // %entry 2383; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v0.4s 2384; CHECK-GI-NEXT: ret 2385entry: 2386 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2387 ret <4 x i32> %shuffle.i 2388} 2389 2390define <4 x float> @test_undef_vuzp1q_f32(<4 x float> %a) { 2391; CHECK-LABEL: test_undef_vuzp1q_f32: 2392; CHECK: // %bb.0: // %entry 2393; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s 2394; CHECK-NEXT: ret 2395entry: 2396 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2397 ret <4 x float> %shuffle.i 2398} 2399 2400define <8 x i8> @test_undef_vuzp1_p8(<8 x i8> %a) { 2401; CHECK-LABEL: test_undef_vuzp1_p8: 2402; CHECK: // %bb.0: // %entry 2403; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b 2404; CHECK-NEXT: ret 2405entry: 2406 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2407 ret <8 x i8> %shuffle.i 2408} 2409 2410define <16 x i8> @test_undef_vuzp1q_p8(<16 x i8> %a) { 2411; CHECK-SD-LABEL: test_undef_vuzp1q_p8: 2412; CHECK-SD: // %bb.0: // %entry 2413; CHECK-SD-NEXT: xtn v0.8b, v0.8h 2414; CHECK-SD-NEXT: ret 2415; 2416; CHECK-GI-LABEL: test_undef_vuzp1q_p8: 2417; CHECK-GI: // %bb.0: // %entry 2418; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v0.16b 2419; CHECK-GI-NEXT: ret 2420entry: 2421 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 2422 ret <16 x i8> %shuffle.i 2423} 2424 2425define <4 x i16> @test_undef_vuzp1_p16(<4 x i16> %a) { 2426; CHECK-LABEL: test_undef_vuzp1_p16: 2427; CHECK: // %bb.0: // %entry 2428; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h 2429; CHECK-NEXT: ret 2430entry: 2431 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2432 ret <4 x i16> %shuffle.i 2433} 2434 2435define <8 x i16> @test_undef_vuzp1q_p16(<8 x i16> %a) { 2436; CHECK-SD-LABEL: test_undef_vuzp1q_p16: 2437; CHECK-SD: // %bb.0: // %entry 2438; CHECK-SD-NEXT: xtn v0.4h, v0.4s 2439; CHECK-SD-NEXT: ret 2440; 2441; CHECK-GI-LABEL: test_undef_vuzp1q_p16: 2442; CHECK-GI: // %bb.0: // %entry 2443; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v0.8h 2444; CHECK-GI-NEXT: ret 2445entry: 2446 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2447 ret <8 x i16> %shuffle.i 2448} 2449 2450define <8 x i8> @test_undef_vuzp2_s8(<8 x i8> %a) { 2451; CHECK-LABEL: test_undef_vuzp2_s8: 2452; CHECK: // %bb.0: // %entry 2453; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b 2454; CHECK-NEXT: ret 2455entry: 2456 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2457 ret <8 x i8> %shuffle.i 2458} 2459 2460define <16 x i8> @test_undef_vuzp2q_s8(<16 x i8> %a) { 2461; CHECK-LABEL: test_undef_vuzp2q_s8: 2462; CHECK: // %bb.0: // %entry 2463; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b 2464; CHECK-NEXT: ret 2465entry: 2466 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 2467 ret <16 x i8> %shuffle.i 2468} 2469 2470define <4 x i16> @test_undef_vuzp2_s16(<4 x i16> %a) { 2471; CHECK-LABEL: test_undef_vuzp2_s16: 2472; CHECK: // %bb.0: // %entry 2473; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h 2474; CHECK-NEXT: ret 2475entry: 2476 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2477 ret <4 x i16> %shuffle.i 2478} 2479 2480define <8 x i16> @test_undef_vuzp2q_s16(<8 x i16> %a) { 2481; CHECK-LABEL: test_undef_vuzp2q_s16: 2482; CHECK: // %bb.0: // %entry 2483; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h 2484; CHECK-NEXT: ret 2485entry: 2486 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2487 ret <8 x i16> %shuffle.i 2488} 2489 2490define <4 x i32> @test_undef_vuzp2q_s32(<4 x i32> %a) { 2491; CHECK-LABEL: test_undef_vuzp2q_s32: 2492; CHECK: // %bb.0: // %entry 2493; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s 2494; CHECK-NEXT: ret 2495entry: 2496 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2497 ret <4 x i32> %shuffle.i 2498} 2499 2500define <8 x i8> @test_undef_vuzp2_u8(<8 x i8> %a) { 2501; CHECK-LABEL: test_undef_vuzp2_u8: 2502; CHECK: // %bb.0: // %entry 2503; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b 2504; CHECK-NEXT: ret 2505entry: 2506 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2507 ret <8 x i8> %shuffle.i 2508} 2509 2510define <16 x i8> @test_undef_vuzp2q_u8(<16 x i8> %a) { 2511; CHECK-LABEL: test_undef_vuzp2q_u8: 2512; CHECK: // %bb.0: // %entry 2513; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b 2514; CHECK-NEXT: ret 2515entry: 2516 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 2517 ret <16 x i8> %shuffle.i 2518} 2519 2520define <4 x i16> @test_undef_vuzp2_u16(<4 x i16> %a) { 2521; CHECK-LABEL: test_undef_vuzp2_u16: 2522; CHECK: // %bb.0: // %entry 2523; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h 2524; CHECK-NEXT: ret 2525entry: 2526 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2527 ret <4 x i16> %shuffle.i 2528} 2529 2530define <8 x i16> @test_undef_vuzp2q_u16(<8 x i16> %a) { 2531; CHECK-LABEL: test_undef_vuzp2q_u16: 2532; CHECK: // %bb.0: // %entry 2533; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h 2534; CHECK-NEXT: ret 2535entry: 2536 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2537 ret <8 x i16> %shuffle.i 2538} 2539 2540define <4 x i32> @test_undef_vuzp2q_u32(<4 x i32> %a) { 2541; CHECK-LABEL: test_undef_vuzp2q_u32: 2542; CHECK: // %bb.0: // %entry 2543; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s 2544; CHECK-NEXT: ret 2545entry: 2546 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2547 ret <4 x i32> %shuffle.i 2548} 2549 2550define <4 x float> @test_undef_vuzp2q_f32(<4 x float> %a) { 2551; CHECK-LABEL: test_undef_vuzp2q_f32: 2552; CHECK: // %bb.0: // %entry 2553; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s 2554; CHECK-NEXT: ret 2555entry: 2556 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2557 ret <4 x float> %shuffle.i 2558} 2559 2560define <8 x i8> @test_undef_vuzp2_p8(<8 x i8> %a) { 2561; CHECK-LABEL: test_undef_vuzp2_p8: 2562; CHECK: // %bb.0: // %entry 2563; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b 2564; CHECK-NEXT: ret 2565entry: 2566 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2567 ret <8 x i8> %shuffle.i 2568} 2569 2570define <16 x i8> @test_undef_vuzp2q_p8(<16 x i8> %a) { 2571; CHECK-LABEL: test_undef_vuzp2q_p8: 2572; CHECK: // %bb.0: // %entry 2573; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b 2574; CHECK-NEXT: ret 2575entry: 2576 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 2577 ret <16 x i8> %shuffle.i 2578} 2579 2580define <4 x i16> @test_undef_vuzp2_p16(<4 x i16> %a) { 2581; CHECK-LABEL: test_undef_vuzp2_p16: 2582; CHECK: // %bb.0: // %entry 2583; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h 2584; CHECK-NEXT: ret 2585entry: 2586 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2587 ret <4 x i16> %shuffle.i 2588} 2589 2590define <8 x i16> @test_undef_vuzp2q_p16(<8 x i16> %a) { 2591; CHECK-LABEL: test_undef_vuzp2q_p16: 2592; CHECK: // %bb.0: // %entry 2593; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h 2594; CHECK-NEXT: ret 2595entry: 2596 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2597 ret <8 x i16> %shuffle.i 2598} 2599 2600define <8 x i8> @test_undef_vzip1_s8(<8 x i8> %a) { 2601; CHECK-LABEL: test_undef_vzip1_s8: 2602; CHECK: // %bb.0: // %entry 2603; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b 2604; CHECK-NEXT: ret 2605entry: 2606 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2607 ret <8 x i8> %shuffle.i 2608} 2609 2610define <16 x i8> @test_undef_vzip1q_s8(<16 x i8> %a) { 2611; CHECK-LABEL: test_undef_vzip1q_s8: 2612; CHECK: // %bb.0: // %entry 2613; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b 2614; CHECK-NEXT: ret 2615entry: 2616 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 2617 ret <16 x i8> %shuffle.i 2618} 2619 2620define <4 x i16> @test_undef_vzip1_s16(<4 x i16> %a) { 2621; CHECK-LABEL: test_undef_vzip1_s16: 2622; CHECK: // %bb.0: // %entry 2623; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h 2624; CHECK-NEXT: ret 2625entry: 2626 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2627 ret <4 x i16> %shuffle.i 2628} 2629 2630define <8 x i16> @test_undef_vzip1q_s16(<8 x i16> %a) { 2631; CHECK-LABEL: test_undef_vzip1q_s16: 2632; CHECK: // %bb.0: // %entry 2633; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h 2634; CHECK-NEXT: ret 2635entry: 2636 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2637 ret <8 x i16> %shuffle.i 2638} 2639 2640define <4 x i32> @test_undef_vzip1q_s32(<4 x i32> %a) { 2641; CHECK-LABEL: test_undef_vzip1q_s32: 2642; CHECK: // %bb.0: // %entry 2643; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s 2644; CHECK-NEXT: ret 2645entry: 2646 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2647 ret <4 x i32> %shuffle.i 2648} 2649 2650define <8 x i8> @test_undef_vzip1_u8(<8 x i8> %a) { 2651; CHECK-LABEL: test_undef_vzip1_u8: 2652; CHECK: // %bb.0: // %entry 2653; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b 2654; CHECK-NEXT: ret 2655entry: 2656 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2657 ret <8 x i8> %shuffle.i 2658} 2659 2660define <16 x i8> @test_undef_vzip1q_u8(<16 x i8> %a) { 2661; CHECK-LABEL: test_undef_vzip1q_u8: 2662; CHECK: // %bb.0: // %entry 2663; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b 2664; CHECK-NEXT: ret 2665entry: 2666 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 2667 ret <16 x i8> %shuffle.i 2668} 2669 2670define <4 x i16> @test_undef_vzip1_u16(<4 x i16> %a) { 2671; CHECK-LABEL: test_undef_vzip1_u16: 2672; CHECK: // %bb.0: // %entry 2673; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h 2674; CHECK-NEXT: ret 2675entry: 2676 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2677 ret <4 x i16> %shuffle.i 2678} 2679 2680define <8 x i16> @test_undef_vzip1q_u16(<8 x i16> %a) { 2681; CHECK-LABEL: test_undef_vzip1q_u16: 2682; CHECK: // %bb.0: // %entry 2683; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h 2684; CHECK-NEXT: ret 2685entry: 2686 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2687 ret <8 x i16> %shuffle.i 2688} 2689 2690define <4 x i32> @test_undef_vzip1q_u32(<4 x i32> %a) { 2691; CHECK-LABEL: test_undef_vzip1q_u32: 2692; CHECK: // %bb.0: // %entry 2693; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s 2694; CHECK-NEXT: ret 2695entry: 2696 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2697 ret <4 x i32> %shuffle.i 2698} 2699 2700define <4 x float> @test_undef_vzip1q_f32(<4 x float> %a) { 2701; CHECK-LABEL: test_undef_vzip1q_f32: 2702; CHECK: // %bb.0: // %entry 2703; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s 2704; CHECK-NEXT: ret 2705entry: 2706 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2707 ret <4 x float> %shuffle.i 2708} 2709 2710define <8 x i8> @test_undef_vzip1_p8(<8 x i8> %a) { 2711; CHECK-LABEL: test_undef_vzip1_p8: 2712; CHECK: // %bb.0: // %entry 2713; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b 2714; CHECK-NEXT: ret 2715entry: 2716 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2717 ret <8 x i8> %shuffle.i 2718} 2719 2720define <16 x i8> @test_undef_vzip1q_p8(<16 x i8> %a) { 2721; CHECK-LABEL: test_undef_vzip1q_p8: 2722; CHECK: // %bb.0: // %entry 2723; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b 2724; CHECK-NEXT: ret 2725entry: 2726 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 2727 ret <16 x i8> %shuffle.i 2728} 2729 2730define <4 x i16> @test_undef_vzip1_p16(<4 x i16> %a) { 2731; CHECK-LABEL: test_undef_vzip1_p16: 2732; CHECK: // %bb.0: // %entry 2733; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h 2734; CHECK-NEXT: ret 2735entry: 2736 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2737 ret <4 x i16> %shuffle.i 2738} 2739 2740define <8 x i16> @test_undef_vzip1q_p16(<8 x i16> %a) { 2741; CHECK-LABEL: test_undef_vzip1q_p16: 2742; CHECK: // %bb.0: // %entry 2743; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h 2744; CHECK-NEXT: ret 2745entry: 2746 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2747 ret <8 x i16> %shuffle.i 2748} 2749 2750define <8 x i8> @test_undef_vzip2_s8(<8 x i8> %a) { 2751; CHECK-LABEL: test_undef_vzip2_s8: 2752; CHECK: // %bb.0: // %entry 2753; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b 2754; CHECK-NEXT: ret 2755entry: 2756 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2757 ret <8 x i8> %shuffle.i 2758} 2759 2760define <16 x i8> @test_undef_vzip2q_s8(<16 x i8> %a) { 2761; CHECK-LABEL: test_undef_vzip2q_s8: 2762; CHECK: // %bb.0: // %entry 2763; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b 2764; CHECK-NEXT: ret 2765entry: 2766 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 2767 ret <16 x i8> %shuffle.i 2768} 2769 2770define <4 x i16> @test_undef_vzip2_s16(<4 x i16> %a) { 2771; CHECK-LABEL: test_undef_vzip2_s16: 2772; CHECK: // %bb.0: // %entry 2773; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h 2774; CHECK-NEXT: ret 2775entry: 2776 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2777 ret <4 x i16> %shuffle.i 2778} 2779 2780define <8 x i16> @test_undef_vzip2q_s16(<8 x i16> %a) { 2781; CHECK-LABEL: test_undef_vzip2q_s16: 2782; CHECK: // %bb.0: // %entry 2783; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h 2784; CHECK-NEXT: ret 2785entry: 2786 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2787 ret <8 x i16> %shuffle.i 2788} 2789 2790define <4 x i32> @test_undef_vzip2q_s32(<4 x i32> %a) { 2791; CHECK-LABEL: test_undef_vzip2q_s32: 2792; CHECK: // %bb.0: // %entry 2793; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s 2794; CHECK-NEXT: ret 2795entry: 2796 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2797 ret <4 x i32> %shuffle.i 2798} 2799 2800define <8 x i8> @test_undef_vzip2_u8(<8 x i8> %a) { 2801; CHECK-LABEL: test_undef_vzip2_u8: 2802; CHECK: // %bb.0: // %entry 2803; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b 2804; CHECK-NEXT: ret 2805entry: 2806 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2807 ret <8 x i8> %shuffle.i 2808} 2809 2810define <16 x i8> @test_undef_vzip2q_u8(<16 x i8> %a) { 2811; CHECK-LABEL: test_undef_vzip2q_u8: 2812; CHECK: // %bb.0: // %entry 2813; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b 2814; CHECK-NEXT: ret 2815entry: 2816 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 2817 ret <16 x i8> %shuffle.i 2818} 2819 2820define <4 x i16> @test_undef_vzip2_u16(<4 x i16> %a) { 2821; CHECK-LABEL: test_undef_vzip2_u16: 2822; CHECK: // %bb.0: // %entry 2823; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h 2824; CHECK-NEXT: ret 2825entry: 2826 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2827 ret <4 x i16> %shuffle.i 2828} 2829 2830define <8 x i16> @test_undef_vzip2q_u16(<8 x i16> %a) { 2831; CHECK-LABEL: test_undef_vzip2q_u16: 2832; CHECK: // %bb.0: // %entry 2833; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h 2834; CHECK-NEXT: ret 2835entry: 2836 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2837 ret <8 x i16> %shuffle.i 2838} 2839 2840define <4 x i32> @test_undef_vzip2q_u32(<4 x i32> %a) { 2841; CHECK-LABEL: test_undef_vzip2q_u32: 2842; CHECK: // %bb.0: // %entry 2843; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s 2844; CHECK-NEXT: ret 2845entry: 2846 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2847 ret <4 x i32> %shuffle.i 2848} 2849 2850define <4 x float> @test_undef_vzip2q_f32(<4 x float> %a) { 2851; CHECK-LABEL: test_undef_vzip2q_f32: 2852; CHECK: // %bb.0: // %entry 2853; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s 2854; CHECK-NEXT: ret 2855entry: 2856 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2857 ret <4 x float> %shuffle.i 2858} 2859 2860define <8 x i8> @test_undef_vzip2_p8(<8 x i8> %a) { 2861; CHECK-LABEL: test_undef_vzip2_p8: 2862; CHECK: // %bb.0: // %entry 2863; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b 2864; CHECK-NEXT: ret 2865entry: 2866 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2867 ret <8 x i8> %shuffle.i 2868} 2869 2870define <16 x i8> @test_undef_vzip2q_p8(<16 x i8> %a) { 2871; CHECK-LABEL: test_undef_vzip2q_p8: 2872; CHECK: // %bb.0: // %entry 2873; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b 2874; CHECK-NEXT: ret 2875entry: 2876 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 2877 ret <16 x i8> %shuffle.i 2878} 2879 2880define <4 x i16> @test_undef_vzip2_p16(<4 x i16> %a) { 2881; CHECK-LABEL: test_undef_vzip2_p16: 2882; CHECK: // %bb.0: // %entry 2883; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h 2884; CHECK-NEXT: ret 2885entry: 2886 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2887 ret <4 x i16> %shuffle.i 2888} 2889 2890define <8 x i16> @test_undef_vzip2q_p16(<8 x i16> %a) { 2891; CHECK-LABEL: test_undef_vzip2q_p16: 2892; CHECK: // %bb.0: // %entry 2893; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h 2894; CHECK-NEXT: ret 2895entry: 2896 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2897 ret <8 x i16> %shuffle.i 2898} 2899 2900define <8 x i8> @test_undef_vtrn1_s8(<8 x i8> %a) { 2901; CHECK-LABEL: test_undef_vtrn1_s8: 2902; CHECK: // %bb.0: // %entry 2903; CHECK-NEXT: ret 2904entry: 2905 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2906 ret <8 x i8> %shuffle.i 2907} 2908 2909define <16 x i8> @test_undef_vtrn1q_s8(<16 x i8> %a) { 2910; CHECK-LABEL: test_undef_vtrn1q_s8: 2911; CHECK: // %bb.0: // %entry 2912; CHECK-NEXT: ret 2913entry: 2914 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 2915 ret <16 x i8> %shuffle.i 2916} 2917 2918define <4 x i16> @test_undef_vtrn1_s16(<4 x i16> %a) { 2919; CHECK-LABEL: test_undef_vtrn1_s16: 2920; CHECK: // %bb.0: // %entry 2921; CHECK-NEXT: ret 2922entry: 2923 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2924 ret <4 x i16> %shuffle.i 2925} 2926 2927define <8 x i16> @test_undef_vtrn1q_s16(<8 x i16> %a) { 2928; CHECK-LABEL: test_undef_vtrn1q_s16: 2929; CHECK: // %bb.0: // %entry 2930; CHECK-NEXT: ret 2931entry: 2932 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2933 ret <8 x i16> %shuffle.i 2934} 2935 2936define <4 x i32> @test_undef_vtrn1q_s32(<4 x i32> %a) { 2937; CHECK-LABEL: test_undef_vtrn1q_s32: 2938; CHECK: // %bb.0: // %entry 2939; CHECK-NEXT: ret 2940entry: 2941 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2942 ret <4 x i32> %shuffle.i 2943} 2944 2945define <8 x i8> @test_undef_vtrn1_u8(<8 x i8> %a) { 2946; CHECK-LABEL: test_undef_vtrn1_u8: 2947; CHECK: // %bb.0: // %entry 2948; CHECK-NEXT: ret 2949entry: 2950 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2951 ret <8 x i8> %shuffle.i 2952} 2953 2954define <16 x i8> @test_undef_vtrn1q_u8(<16 x i8> %a) { 2955; CHECK-LABEL: test_undef_vtrn1q_u8: 2956; CHECK: // %bb.0: // %entry 2957; CHECK-NEXT: ret 2958entry: 2959 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 2960 ret <16 x i8> %shuffle.i 2961} 2962 2963define <4 x i16> @test_undef_vtrn1_u16(<4 x i16> %a) { 2964; CHECK-LABEL: test_undef_vtrn1_u16: 2965; CHECK: // %bb.0: // %entry 2966; CHECK-NEXT: ret 2967entry: 2968 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2969 ret <4 x i16> %shuffle.i 2970} 2971 2972define <8 x i16> @test_undef_vtrn1q_u16(<8 x i16> %a) { 2973; CHECK-LABEL: test_undef_vtrn1q_u16: 2974; CHECK: // %bb.0: // %entry 2975; CHECK-NEXT: ret 2976entry: 2977 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2978 ret <8 x i16> %shuffle.i 2979} 2980 2981define <4 x i32> @test_undef_vtrn1q_u32(<4 x i32> %a) { 2982; CHECK-LABEL: test_undef_vtrn1q_u32: 2983; CHECK: // %bb.0: // %entry 2984; CHECK-NEXT: ret 2985entry: 2986 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2987 ret <4 x i32> %shuffle.i 2988} 2989 2990define <4 x float> @test_undef_vtrn1q_f32(<4 x float> %a) { 2991; CHECK-LABEL: test_undef_vtrn1q_f32: 2992; CHECK: // %bb.0: // %entry 2993; CHECK-NEXT: ret 2994entry: 2995 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2996 ret <4 x float> %shuffle.i 2997} 2998 2999define <8 x i8> @test_undef_vtrn1_p8(<8 x i8> %a) { 3000; CHECK-LABEL: test_undef_vtrn1_p8: 3001; CHECK: // %bb.0: // %entry 3002; CHECK-NEXT: ret 3003entry: 3004 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3005 ret <8 x i8> %shuffle.i 3006} 3007 3008define <16 x i8> @test_undef_vtrn1q_p8(<16 x i8> %a) { 3009; CHECK-LABEL: test_undef_vtrn1q_p8: 3010; CHECK: // %bb.0: // %entry 3011; CHECK-NEXT: ret 3012entry: 3013 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 3014 ret <16 x i8> %shuffle.i 3015} 3016 3017define <4 x i16> @test_undef_vtrn1_p16(<4 x i16> %a) { 3018; CHECK-LABEL: test_undef_vtrn1_p16: 3019; CHECK: // %bb.0: // %entry 3020; CHECK-NEXT: ret 3021entry: 3022 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3023 ret <4 x i16> %shuffle.i 3024} 3025 3026define <8 x i16> @test_undef_vtrn1q_p16(<8 x i16> %a) { 3027; CHECK-LABEL: test_undef_vtrn1q_p16: 3028; CHECK: // %bb.0: // %entry 3029; CHECK-NEXT: ret 3030entry: 3031 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3032 ret <8 x i16> %shuffle.i 3033} 3034 3035define <8 x i8> @test_undef_vtrn2_s8(<8 x i8> %a) { 3036; CHECK-LABEL: test_undef_vtrn2_s8: 3037; CHECK: // %bb.0: // %entry 3038; CHECK-NEXT: rev16 v0.8b, v0.8b 3039; CHECK-NEXT: ret 3040entry: 3041 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3042 ret <8 x i8> %shuffle.i 3043} 3044 3045define <16 x i8> @test_undef_vtrn2q_s8(<16 x i8> %a) { 3046; CHECK-LABEL: test_undef_vtrn2q_s8: 3047; CHECK: // %bb.0: // %entry 3048; CHECK-NEXT: rev16 v0.16b, v0.16b 3049; CHECK-NEXT: ret 3050entry: 3051 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 3052 ret <16 x i8> %shuffle.i 3053} 3054 3055define <4 x i16> @test_undef_vtrn2_s16(<4 x i16> %a) { 3056; CHECK-LABEL: test_undef_vtrn2_s16: 3057; CHECK: // %bb.0: // %entry 3058; CHECK-NEXT: rev32 v0.4h, v0.4h 3059; CHECK-NEXT: ret 3060entry: 3061 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3062 ret <4 x i16> %shuffle.i 3063} 3064 3065define <8 x i16> @test_undef_vtrn2q_s16(<8 x i16> %a) { 3066; CHECK-LABEL: test_undef_vtrn2q_s16: 3067; CHECK: // %bb.0: // %entry 3068; CHECK-NEXT: rev32 v0.8h, v0.8h 3069; CHECK-NEXT: ret 3070entry: 3071 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3072 ret <8 x i16> %shuffle.i 3073} 3074 3075define <4 x i32> @test_undef_vtrn2q_s32(<4 x i32> %a) { 3076; CHECK-LABEL: test_undef_vtrn2q_s32: 3077; CHECK: // %bb.0: // %entry 3078; CHECK-NEXT: rev64 v0.4s, v0.4s 3079; CHECK-NEXT: ret 3080entry: 3081 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3082 ret <4 x i32> %shuffle.i 3083} 3084 3085define <8 x i8> @test_undef_vtrn2_u8(<8 x i8> %a) { 3086; CHECK-LABEL: test_undef_vtrn2_u8: 3087; CHECK: // %bb.0: // %entry 3088; CHECK-NEXT: rev16 v0.8b, v0.8b 3089; CHECK-NEXT: ret 3090entry: 3091 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3092 ret <8 x i8> %shuffle.i 3093} 3094 3095define <16 x i8> @test_undef_vtrn2q_u8(<16 x i8> %a) { 3096; CHECK-LABEL: test_undef_vtrn2q_u8: 3097; CHECK: // %bb.0: // %entry 3098; CHECK-NEXT: rev16 v0.16b, v0.16b 3099; CHECK-NEXT: ret 3100entry: 3101 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 3102 ret <16 x i8> %shuffle.i 3103} 3104 3105define <4 x i16> @test_undef_vtrn2_u16(<4 x i16> %a) { 3106; CHECK-LABEL: test_undef_vtrn2_u16: 3107; CHECK: // %bb.0: // %entry 3108; CHECK-NEXT: rev32 v0.4h, v0.4h 3109; CHECK-NEXT: ret 3110entry: 3111 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3112 ret <4 x i16> %shuffle.i 3113} 3114 3115define <8 x i16> @test_undef_vtrn2q_u16(<8 x i16> %a) { 3116; CHECK-LABEL: test_undef_vtrn2q_u16: 3117; CHECK: // %bb.0: // %entry 3118; CHECK-NEXT: rev32 v0.8h, v0.8h 3119; CHECK-NEXT: ret 3120entry: 3121 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3122 ret <8 x i16> %shuffle.i 3123} 3124 3125define <4 x i32> @test_undef_vtrn2q_u32(<4 x i32> %a) { 3126; CHECK-LABEL: test_undef_vtrn2q_u32: 3127; CHECK: // %bb.0: // %entry 3128; CHECK-NEXT: rev64 v0.4s, v0.4s 3129; CHECK-NEXT: ret 3130entry: 3131 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3132 ret <4 x i32> %shuffle.i 3133} 3134 3135define <4 x float> @test_undef_vtrn2q_f32(<4 x float> %a) { 3136; CHECK-LABEL: test_undef_vtrn2q_f32: 3137; CHECK: // %bb.0: // %entry 3138; CHECK-NEXT: rev64 v0.4s, v0.4s 3139; CHECK-NEXT: ret 3140entry: 3141 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3142 ret <4 x float> %shuffle.i 3143} 3144 3145define <8 x i8> @test_undef_vtrn2_p8(<8 x i8> %a) { 3146; CHECK-LABEL: test_undef_vtrn2_p8: 3147; CHECK: // %bb.0: // %entry 3148; CHECK-NEXT: rev16 v0.8b, v0.8b 3149; CHECK-NEXT: ret 3150entry: 3151 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3152 ret <8 x i8> %shuffle.i 3153} 3154 3155define <16 x i8> @test_undef_vtrn2q_p8(<16 x i8> %a) { 3156; CHECK-LABEL: test_undef_vtrn2q_p8: 3157; CHECK: // %bb.0: // %entry 3158; CHECK-NEXT: rev16 v0.16b, v0.16b 3159; CHECK-NEXT: ret 3160entry: 3161 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 3162 ret <16 x i8> %shuffle.i 3163} 3164 3165define <4 x i16> @test_undef_vtrn2_p16(<4 x i16> %a) { 3166; CHECK-LABEL: test_undef_vtrn2_p16: 3167; CHECK: // %bb.0: // %entry 3168; CHECK-NEXT: rev32 v0.4h, v0.4h 3169; CHECK-NEXT: ret 3170entry: 3171 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3172 ret <4 x i16> %shuffle.i 3173} 3174 3175define <8 x i16> @test_undef_vtrn2q_p16(<8 x i16> %a) { 3176; CHECK-LABEL: test_undef_vtrn2q_p16: 3177; CHECK: // %bb.0: // %entry 3178; CHECK-NEXT: rev32 v0.8h, v0.8h 3179; CHECK-NEXT: ret 3180entry: 3181 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3182 ret <8 x i16> %shuffle.i 3183} 3184 3185define %struct.int8x8x2_t @test_vuzp_s8(<8 x i8> %a, <8 x i8> %b) { 3186; CHECK-LABEL: test_vuzp_s8: 3187; CHECK: // %bb.0: // %entry 3188; CHECK-NEXT: uzp1 v2.8b, v0.8b, v1.8b 3189; CHECK-NEXT: uzp2 v1.8b, v0.8b, v1.8b 3190; CHECK-NEXT: fmov d0, d2 3191; CHECK-NEXT: ret 3192entry: 3193 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 3194 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 3195 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 3196 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 3197 ret %struct.int8x8x2_t %.fca.0.1.insert 3198} 3199 3200define %struct.int16x4x2_t @test_vuzp_s16(<4 x i16> %a, <4 x i16> %b) { 3201; CHECK-LABEL: test_vuzp_s16: 3202; CHECK: // %bb.0: // %entry 3203; CHECK-NEXT: uzp1 v2.4h, v0.4h, v1.4h 3204; CHECK-NEXT: uzp2 v1.4h, v0.4h, v1.4h 3205; CHECK-NEXT: fmov d0, d2 3206; CHECK-NEXT: ret 3207entry: 3208 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 3209 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 3210 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0 3211 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1 3212 ret %struct.int16x4x2_t %.fca.0.1.insert 3213} 3214 3215define %struct.int32x2x2_t @test_vuzp_s32(<2 x i32> %a, <2 x i32> %b) { 3216; CHECK-LABEL: test_vuzp_s32: 3217; CHECK: // %bb.0: // %entry 3218; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s 3219; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s 3220; CHECK-NEXT: fmov d0, d2 3221; CHECK-NEXT: ret 3222entry: 3223 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 3224 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 3225 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0 3226 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1 3227 ret %struct.int32x2x2_t %.fca.0.1.insert 3228} 3229 3230define %struct.uint8x8x2_t @test_vuzp_u8(<8 x i8> %a, <8 x i8> %b) { 3231; CHECK-LABEL: test_vuzp_u8: 3232; CHECK: // %bb.0: // %entry 3233; CHECK-NEXT: uzp1 v2.8b, v0.8b, v1.8b 3234; CHECK-NEXT: uzp2 v1.8b, v0.8b, v1.8b 3235; CHECK-NEXT: fmov d0, d2 3236; CHECK-NEXT: ret 3237entry: 3238 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 3239 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 3240 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 3241 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 3242 ret %struct.uint8x8x2_t %.fca.0.1.insert 3243} 3244 3245define %struct.uint16x4x2_t @test_vuzp_u16(<4 x i16> %a, <4 x i16> %b) { 3246; CHECK-LABEL: test_vuzp_u16: 3247; CHECK: // %bb.0: // %entry 3248; CHECK-NEXT: uzp1 v2.4h, v0.4h, v1.4h 3249; CHECK-NEXT: uzp2 v1.4h, v0.4h, v1.4h 3250; CHECK-NEXT: fmov d0, d2 3251; CHECK-NEXT: ret 3252entry: 3253 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 3254 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 3255 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0 3256 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1 3257 ret %struct.uint16x4x2_t %.fca.0.1.insert 3258} 3259 3260define %struct.uint32x2x2_t @test_vuzp_u32(<2 x i32> %a, <2 x i32> %b) { 3261; CHECK-LABEL: test_vuzp_u32: 3262; CHECK: // %bb.0: // %entry 3263; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s 3264; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s 3265; CHECK-NEXT: fmov d0, d2 3266; CHECK-NEXT: ret 3267entry: 3268 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 3269 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 3270 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0 3271 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1 3272 ret %struct.uint32x2x2_t %.fca.0.1.insert 3273} 3274 3275define %struct.float32x2x2_t @test_vuzp_f32(<2 x float> %a, <2 x float> %b) { 3276; CHECK-LABEL: test_vuzp_f32: 3277; CHECK: // %bb.0: // %entry 3278; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s 3279; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s 3280; CHECK-NEXT: fmov d0, d2 3281; CHECK-NEXT: ret 3282entry: 3283 %vuzp.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 3284 %vuzp1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 3285 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vuzp.i, 0, 0 3286 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vuzp1.i, 0, 1 3287 ret %struct.float32x2x2_t %.fca.0.1.insert 3288} 3289 3290define %struct.poly8x8x2_t @test_vuzp_p8(<8 x i8> %a, <8 x i8> %b) { 3291; CHECK-LABEL: test_vuzp_p8: 3292; CHECK: // %bb.0: // %entry 3293; CHECK-NEXT: uzp1 v2.8b, v0.8b, v1.8b 3294; CHECK-NEXT: uzp2 v1.8b, v0.8b, v1.8b 3295; CHECK-NEXT: fmov d0, d2 3296; CHECK-NEXT: ret 3297entry: 3298 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 3299 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 3300 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 3301 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 3302 ret %struct.poly8x8x2_t %.fca.0.1.insert 3303} 3304 3305define %struct.poly16x4x2_t @test_vuzp_p16(<4 x i16> %a, <4 x i16> %b) { 3306; CHECK-LABEL: test_vuzp_p16: 3307; CHECK: // %bb.0: // %entry 3308; CHECK-NEXT: uzp1 v2.4h, v0.4h, v1.4h 3309; CHECK-NEXT: uzp2 v1.4h, v0.4h, v1.4h 3310; CHECK-NEXT: fmov d0, d2 3311; CHECK-NEXT: ret 3312entry: 3313 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 3314 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 3315 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0 3316 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1 3317 ret %struct.poly16x4x2_t %.fca.0.1.insert 3318} 3319 3320define %struct.int8x16x2_t @test_vuzpq_s8(<16 x i8> %a, <16 x i8> %b) { 3321; CHECK-LABEL: test_vuzpq_s8: 3322; CHECK: // %bb.0: // %entry 3323; CHECK-NEXT: uzp1 v2.16b, v0.16b, v1.16b 3324; CHECK-NEXT: uzp2 v1.16b, v0.16b, v1.16b 3325; CHECK-NEXT: mov v0.16b, v2.16b 3326; CHECK-NEXT: ret 3327entry: 3328 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 3329 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 3330 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0 3331 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1 3332 ret %struct.int8x16x2_t %.fca.0.1.insert 3333} 3334 3335define %struct.int16x8x2_t @test_vuzpq_s16(<8 x i16> %a, <8 x i16> %b) { 3336; CHECK-LABEL: test_vuzpq_s16: 3337; CHECK: // %bb.0: // %entry 3338; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h 3339; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h 3340; CHECK-NEXT: mov v0.16b, v2.16b 3341; CHECK-NEXT: ret 3342entry: 3343 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 3344 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 3345 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0 3346 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1 3347 ret %struct.int16x8x2_t %.fca.0.1.insert 3348} 3349 3350define %struct.int32x4x2_t @test_vuzpq_s32(<4 x i32> %a, <4 x i32> %b) { 3351; CHECK-LABEL: test_vuzpq_s32: 3352; CHECK: // %bb.0: // %entry 3353; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s 3354; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s 3355; CHECK-NEXT: mov v0.16b, v2.16b 3356; CHECK-NEXT: ret 3357entry: 3358 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 3359 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 3360 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0 3361 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1 3362 ret %struct.int32x4x2_t %.fca.0.1.insert 3363} 3364 3365define %struct.uint8x16x2_t @test_vuzpq_u8(<16 x i8> %a, <16 x i8> %b) { 3366; CHECK-LABEL: test_vuzpq_u8: 3367; CHECK: // %bb.0: // %entry 3368; CHECK-NEXT: uzp1 v2.16b, v0.16b, v1.16b 3369; CHECK-NEXT: uzp2 v1.16b, v0.16b, v1.16b 3370; CHECK-NEXT: mov v0.16b, v2.16b 3371; CHECK-NEXT: ret 3372entry: 3373 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 3374 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 3375 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0 3376 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1 3377 ret %struct.uint8x16x2_t %.fca.0.1.insert 3378} 3379 3380define %struct.uint16x8x2_t @test_vuzpq_u16(<8 x i16> %a, <8 x i16> %b) { 3381; CHECK-LABEL: test_vuzpq_u16: 3382; CHECK: // %bb.0: // %entry 3383; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h 3384; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h 3385; CHECK-NEXT: mov v0.16b, v2.16b 3386; CHECK-NEXT: ret 3387entry: 3388 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 3389 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 3390 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0 3391 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1 3392 ret %struct.uint16x8x2_t %.fca.0.1.insert 3393} 3394 3395define %struct.uint32x4x2_t @test_vuzpq_u32(<4 x i32> %a, <4 x i32> %b) { 3396; CHECK-LABEL: test_vuzpq_u32: 3397; CHECK: // %bb.0: // %entry 3398; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s 3399; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s 3400; CHECK-NEXT: mov v0.16b, v2.16b 3401; CHECK-NEXT: ret 3402entry: 3403 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 3404 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 3405 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0 3406 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1 3407 ret %struct.uint32x4x2_t %.fca.0.1.insert 3408} 3409 3410define %struct.float32x4x2_t @test_vuzpq_f32(<4 x float> %a, <4 x float> %b) { 3411; CHECK-LABEL: test_vuzpq_f32: 3412; CHECK: // %bb.0: // %entry 3413; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s 3414; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s 3415; CHECK-NEXT: mov v0.16b, v2.16b 3416; CHECK-NEXT: ret 3417entry: 3418 %vuzp.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 3419 %vuzp1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 3420 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vuzp.i, 0, 0 3421 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vuzp1.i, 0, 1 3422 ret %struct.float32x4x2_t %.fca.0.1.insert 3423} 3424 3425define %struct.poly8x16x2_t @test_vuzpq_p8(<16 x i8> %a, <16 x i8> %b) { 3426; CHECK-LABEL: test_vuzpq_p8: 3427; CHECK: // %bb.0: // %entry 3428; CHECK-NEXT: uzp1 v2.16b, v0.16b, v1.16b 3429; CHECK-NEXT: uzp2 v1.16b, v0.16b, v1.16b 3430; CHECK-NEXT: mov v0.16b, v2.16b 3431; CHECK-NEXT: ret 3432entry: 3433 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 3434 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 3435 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0 3436 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1 3437 ret %struct.poly8x16x2_t %.fca.0.1.insert 3438} 3439 3440define %struct.poly16x8x2_t @test_vuzpq_p16(<8 x i16> %a, <8 x i16> %b) { 3441; CHECK-LABEL: test_vuzpq_p16: 3442; CHECK: // %bb.0: // %entry 3443; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h 3444; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h 3445; CHECK-NEXT: mov v0.16b, v2.16b 3446; CHECK-NEXT: ret 3447entry: 3448 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 3449 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 3450 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0 3451 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1 3452 ret %struct.poly16x8x2_t %.fca.0.1.insert 3453} 3454 3455define %struct.int8x8x2_t @test_vzip_s8(<8 x i8> %a, <8 x i8> %b) { 3456; CHECK-LABEL: test_vzip_s8: 3457; CHECK: // %bb.0: // %entry 3458; CHECK-NEXT: zip1 v2.8b, v0.8b, v1.8b 3459; CHECK-NEXT: zip2 v1.8b, v0.8b, v1.8b 3460; CHECK-NEXT: fmov d0, d2 3461; CHECK-NEXT: ret 3462entry: 3463 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 3464 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 3465 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vzip.i, 0, 0 3466 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1 3467 ret %struct.int8x8x2_t %.fca.0.1.insert 3468} 3469 3470define %struct.int16x4x2_t @test_vzip_s16(<4 x i16> %a, <4 x i16> %b) { 3471; CHECK-LABEL: test_vzip_s16: 3472; CHECK: // %bb.0: // %entry 3473; CHECK-NEXT: zip1 v2.4h, v0.4h, v1.4h 3474; CHECK-NEXT: zip2 v1.4h, v0.4h, v1.4h 3475; CHECK-NEXT: fmov d0, d2 3476; CHECK-NEXT: ret 3477entry: 3478 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 3479 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 3480 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vzip.i, 0, 0 3481 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1 3482 ret %struct.int16x4x2_t %.fca.0.1.insert 3483} 3484 3485define %struct.int32x2x2_t @test_vzip_s32(<2 x i32> %a, <2 x i32> %b) { 3486; CHECK-LABEL: test_vzip_s32: 3487; CHECK: // %bb.0: // %entry 3488; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s 3489; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s 3490; CHECK-NEXT: fmov d0, d2 3491; CHECK-NEXT: ret 3492entry: 3493 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 3494 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 3495 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vzip.i, 0, 0 3496 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1 3497 ret %struct.int32x2x2_t %.fca.0.1.insert 3498} 3499 3500define %struct.uint8x8x2_t @test_vzip_u8(<8 x i8> %a, <8 x i8> %b) { 3501; CHECK-LABEL: test_vzip_u8: 3502; CHECK: // %bb.0: // %entry 3503; CHECK-NEXT: zip1 v2.8b, v0.8b, v1.8b 3504; CHECK-NEXT: zip2 v1.8b, v0.8b, v1.8b 3505; CHECK-NEXT: fmov d0, d2 3506; CHECK-NEXT: ret 3507entry: 3508 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 3509 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 3510 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vzip.i, 0, 0 3511 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1 3512 ret %struct.uint8x8x2_t %.fca.0.1.insert 3513} 3514 3515define %struct.uint16x4x2_t @test_vzip_u16(<4 x i16> %a, <4 x i16> %b) { 3516; CHECK-LABEL: test_vzip_u16: 3517; CHECK: // %bb.0: // %entry 3518; CHECK-NEXT: zip1 v2.4h, v0.4h, v1.4h 3519; CHECK-NEXT: zip2 v1.4h, v0.4h, v1.4h 3520; CHECK-NEXT: fmov d0, d2 3521; CHECK-NEXT: ret 3522entry: 3523 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 3524 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 3525 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vzip.i, 0, 0 3526 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1 3527 ret %struct.uint16x4x2_t %.fca.0.1.insert 3528} 3529 3530define %struct.uint32x2x2_t @test_vzip_u32(<2 x i32> %a, <2 x i32> %b) { 3531; CHECK-LABEL: test_vzip_u32: 3532; CHECK: // %bb.0: // %entry 3533; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s 3534; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s 3535; CHECK-NEXT: fmov d0, d2 3536; CHECK-NEXT: ret 3537entry: 3538 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 3539 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 3540 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vzip.i, 0, 0 3541 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1 3542 ret %struct.uint32x2x2_t %.fca.0.1.insert 3543} 3544 3545define %struct.float32x2x2_t @test_vzip_f32(<2 x float> %a, <2 x float> %b) { 3546; CHECK-LABEL: test_vzip_f32: 3547; CHECK: // %bb.0: // %entry 3548; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s 3549; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s 3550; CHECK-NEXT: fmov d0, d2 3551; CHECK-NEXT: ret 3552entry: 3553 %vzip.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 3554 %vzip1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 3555 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vzip.i, 0, 0 3556 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vzip1.i, 0, 1 3557 ret %struct.float32x2x2_t %.fca.0.1.insert 3558} 3559 3560define %struct.poly8x8x2_t @test_vzip_p8(<8 x i8> %a, <8 x i8> %b) { 3561; CHECK-LABEL: test_vzip_p8: 3562; CHECK: // %bb.0: // %entry 3563; CHECK-NEXT: zip1 v2.8b, v0.8b, v1.8b 3564; CHECK-NEXT: zip2 v1.8b, v0.8b, v1.8b 3565; CHECK-NEXT: fmov d0, d2 3566; CHECK-NEXT: ret 3567entry: 3568 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 3569 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 3570 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vzip.i, 0, 0 3571 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1 3572 ret %struct.poly8x8x2_t %.fca.0.1.insert 3573} 3574 3575define %struct.poly16x4x2_t @test_vzip_p16(<4 x i16> %a, <4 x i16> %b) { 3576; CHECK-LABEL: test_vzip_p16: 3577; CHECK: // %bb.0: // %entry 3578; CHECK-NEXT: zip1 v2.4h, v0.4h, v1.4h 3579; CHECK-NEXT: zip2 v1.4h, v0.4h, v1.4h 3580; CHECK-NEXT: fmov d0, d2 3581; CHECK-NEXT: ret 3582entry: 3583 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 3584 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 3585 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vzip.i, 0, 0 3586 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1 3587 ret %struct.poly16x4x2_t %.fca.0.1.insert 3588} 3589 3590define %struct.int8x16x2_t @test_vzipq_s8(<16 x i8> %a, <16 x i8> %b) { 3591; CHECK-LABEL: test_vzipq_s8: 3592; CHECK: // %bb.0: // %entry 3593; CHECK-NEXT: zip1 v2.16b, v0.16b, v1.16b 3594; CHECK-NEXT: zip2 v1.16b, v0.16b, v1.16b 3595; CHECK-NEXT: mov v0.16b, v2.16b 3596; CHECK-NEXT: ret 3597entry: 3598 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 3599 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 3600 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vzip.i, 0, 0 3601 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1 3602 ret %struct.int8x16x2_t %.fca.0.1.insert 3603} 3604 3605define %struct.int16x8x2_t @test_vzipq_s16(<8 x i16> %a, <8 x i16> %b) { 3606; CHECK-LABEL: test_vzipq_s16: 3607; CHECK: // %bb.0: // %entry 3608; CHECK-NEXT: zip1 v2.8h, v0.8h, v1.8h 3609; CHECK-NEXT: zip2 v1.8h, v0.8h, v1.8h 3610; CHECK-NEXT: mov v0.16b, v2.16b 3611; CHECK-NEXT: ret 3612entry: 3613 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 3614 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 3615 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vzip.i, 0, 0 3616 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1 3617 ret %struct.int16x8x2_t %.fca.0.1.insert 3618} 3619 3620define %struct.int32x4x2_t @test_vzipq_s32(<4 x i32> %a, <4 x i32> %b) { 3621; CHECK-LABEL: test_vzipq_s32: 3622; CHECK: // %bb.0: // %entry 3623; CHECK-NEXT: zip1 v2.4s, v0.4s, v1.4s 3624; CHECK-NEXT: zip2 v1.4s, v0.4s, v1.4s 3625; CHECK-NEXT: mov v0.16b, v2.16b 3626; CHECK-NEXT: ret 3627entry: 3628 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 3629 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 3630 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vzip.i, 0, 0 3631 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1 3632 ret %struct.int32x4x2_t %.fca.0.1.insert 3633} 3634 3635define %struct.uint8x16x2_t @test_vzipq_u8(<16 x i8> %a, <16 x i8> %b) { 3636; CHECK-LABEL: test_vzipq_u8: 3637; CHECK: // %bb.0: // %entry 3638; CHECK-NEXT: zip1 v2.16b, v0.16b, v1.16b 3639; CHECK-NEXT: zip2 v1.16b, v0.16b, v1.16b 3640; CHECK-NEXT: mov v0.16b, v2.16b 3641; CHECK-NEXT: ret 3642entry: 3643 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 3644 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 3645 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vzip.i, 0, 0 3646 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1 3647 ret %struct.uint8x16x2_t %.fca.0.1.insert 3648} 3649 3650define %struct.uint16x8x2_t @test_vzipq_u16(<8 x i16> %a, <8 x i16> %b) { 3651; CHECK-LABEL: test_vzipq_u16: 3652; CHECK: // %bb.0: // %entry 3653; CHECK-NEXT: zip1 v2.8h, v0.8h, v1.8h 3654; CHECK-NEXT: zip2 v1.8h, v0.8h, v1.8h 3655; CHECK-NEXT: mov v0.16b, v2.16b 3656; CHECK-NEXT: ret 3657entry: 3658 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 3659 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 3660 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vzip.i, 0, 0 3661 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1 3662 ret %struct.uint16x8x2_t %.fca.0.1.insert 3663} 3664 3665define %struct.uint32x4x2_t @test_vzipq_u32(<4 x i32> %a, <4 x i32> %b) { 3666; CHECK-LABEL: test_vzipq_u32: 3667; CHECK: // %bb.0: // %entry 3668; CHECK-NEXT: zip1 v2.4s, v0.4s, v1.4s 3669; CHECK-NEXT: zip2 v1.4s, v0.4s, v1.4s 3670; CHECK-NEXT: mov v0.16b, v2.16b 3671; CHECK-NEXT: ret 3672entry: 3673 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 3674 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 3675 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vzip.i, 0, 0 3676 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1 3677 ret %struct.uint32x4x2_t %.fca.0.1.insert 3678} 3679 3680define %struct.float32x4x2_t @test_vzipq_f32(<4 x float> %a, <4 x float> %b) { 3681; CHECK-LABEL: test_vzipq_f32: 3682; CHECK: // %bb.0: // %entry 3683; CHECK-NEXT: zip1 v2.4s, v0.4s, v1.4s 3684; CHECK-NEXT: zip2 v1.4s, v0.4s, v1.4s 3685; CHECK-NEXT: mov v0.16b, v2.16b 3686; CHECK-NEXT: ret 3687entry: 3688 %vzip.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 3689 %vzip1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 3690 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vzip.i, 0, 0 3691 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vzip1.i, 0, 1 3692 ret %struct.float32x4x2_t %.fca.0.1.insert 3693} 3694 3695define %struct.poly8x16x2_t @test_vzipq_p8(<16 x i8> %a, <16 x i8> %b) { 3696; CHECK-LABEL: test_vzipq_p8: 3697; CHECK: // %bb.0: // %entry 3698; CHECK-NEXT: zip1 v2.16b, v0.16b, v1.16b 3699; CHECK-NEXT: zip2 v1.16b, v0.16b, v1.16b 3700; CHECK-NEXT: mov v0.16b, v2.16b 3701; CHECK-NEXT: ret 3702entry: 3703 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 3704 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 3705 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vzip.i, 0, 0 3706 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1 3707 ret %struct.poly8x16x2_t %.fca.0.1.insert 3708} 3709 3710define %struct.poly16x8x2_t @test_vzipq_p16(<8 x i16> %a, <8 x i16> %b) { 3711; CHECK-LABEL: test_vzipq_p16: 3712; CHECK: // %bb.0: // %entry 3713; CHECK-NEXT: zip1 v2.8h, v0.8h, v1.8h 3714; CHECK-NEXT: zip2 v1.8h, v0.8h, v1.8h 3715; CHECK-NEXT: mov v0.16b, v2.16b 3716; CHECK-NEXT: ret 3717entry: 3718 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 3719 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 3720 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vzip.i, 0, 0 3721 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1 3722 ret %struct.poly16x8x2_t %.fca.0.1.insert 3723} 3724 3725define %struct.int8x8x2_t @test_vtrn_s8(<8 x i8> %a, <8 x i8> %b) { 3726; CHECK-LABEL: test_vtrn_s8: 3727; CHECK: // %bb.0: // %entry 3728; CHECK-NEXT: trn1 v2.8b, v0.8b, v1.8b 3729; CHECK-NEXT: trn2 v1.8b, v0.8b, v1.8b 3730; CHECK-NEXT: fmov d0, d2 3731; CHECK-NEXT: ret 3732entry: 3733 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3734 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3735 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0 3736 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1 3737 ret %struct.int8x8x2_t %.fca.0.1.insert 3738} 3739 3740define %struct.int16x4x2_t @test_vtrn_s16(<4 x i16> %a, <4 x i16> %b) { 3741; CHECK-LABEL: test_vtrn_s16: 3742; CHECK: // %bb.0: // %entry 3743; CHECK-NEXT: trn1 v2.4h, v0.4h, v1.4h 3744; CHECK-NEXT: trn2 v1.4h, v0.4h, v1.4h 3745; CHECK-NEXT: fmov d0, d2 3746; CHECK-NEXT: ret 3747entry: 3748 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3749 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3750 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0 3751 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1 3752 ret %struct.int16x4x2_t %.fca.0.1.insert 3753} 3754 3755define %struct.int32x2x2_t @test_vtrn_s32(<2 x i32> %a, <2 x i32> %b) { 3756; CHECK-LABEL: test_vtrn_s32: 3757; CHECK: // %bb.0: // %entry 3758; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s 3759; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s 3760; CHECK-NEXT: fmov d0, d2 3761; CHECK-NEXT: ret 3762entry: 3763 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 3764 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 3765 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0 3766 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1 3767 ret %struct.int32x2x2_t %.fca.0.1.insert 3768} 3769 3770define %struct.uint8x8x2_t @test_vtrn_u8(<8 x i8> %a, <8 x i8> %b) { 3771; CHECK-LABEL: test_vtrn_u8: 3772; CHECK: // %bb.0: // %entry 3773; CHECK-NEXT: trn1 v2.8b, v0.8b, v1.8b 3774; CHECK-NEXT: trn2 v1.8b, v0.8b, v1.8b 3775; CHECK-NEXT: fmov d0, d2 3776; CHECK-NEXT: ret 3777entry: 3778 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3779 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3780 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0 3781 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1 3782 ret %struct.uint8x8x2_t %.fca.0.1.insert 3783} 3784 3785define %struct.uint16x4x2_t @test_vtrn_u16(<4 x i16> %a, <4 x i16> %b) { 3786; CHECK-LABEL: test_vtrn_u16: 3787; CHECK: // %bb.0: // %entry 3788; CHECK-NEXT: trn1 v2.4h, v0.4h, v1.4h 3789; CHECK-NEXT: trn2 v1.4h, v0.4h, v1.4h 3790; CHECK-NEXT: fmov d0, d2 3791; CHECK-NEXT: ret 3792entry: 3793 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3794 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3795 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0 3796 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1 3797 ret %struct.uint16x4x2_t %.fca.0.1.insert 3798} 3799 3800define %struct.uint32x2x2_t @test_vtrn_u32(<2 x i32> %a, <2 x i32> %b) { 3801; CHECK-LABEL: test_vtrn_u32: 3802; CHECK: // %bb.0: // %entry 3803; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s 3804; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s 3805; CHECK-NEXT: fmov d0, d2 3806; CHECK-NEXT: ret 3807entry: 3808 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 3809 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 3810 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0 3811 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1 3812 ret %struct.uint32x2x2_t %.fca.0.1.insert 3813} 3814 3815define %struct.float32x2x2_t @test_vtrn_f32(<2 x float> %a, <2 x float> %b) { 3816; CHECK-LABEL: test_vtrn_f32: 3817; CHECK: // %bb.0: // %entry 3818; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s 3819; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s 3820; CHECK-NEXT: fmov d0, d2 3821; CHECK-NEXT: ret 3822entry: 3823 %vtrn.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 3824 %vtrn1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 3825 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vtrn.i, 0, 0 3826 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vtrn1.i, 0, 1 3827 ret %struct.float32x2x2_t %.fca.0.1.insert 3828} 3829 3830define %struct.poly8x8x2_t @test_vtrn_p8(<8 x i8> %a, <8 x i8> %b) { 3831; CHECK-LABEL: test_vtrn_p8: 3832; CHECK: // %bb.0: // %entry 3833; CHECK-NEXT: trn1 v2.8b, v0.8b, v1.8b 3834; CHECK-NEXT: trn2 v1.8b, v0.8b, v1.8b 3835; CHECK-NEXT: fmov d0, d2 3836; CHECK-NEXT: ret 3837entry: 3838 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3839 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3840 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0 3841 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1 3842 ret %struct.poly8x8x2_t %.fca.0.1.insert 3843} 3844 3845define %struct.poly16x4x2_t @test_vtrn_p16(<4 x i16> %a, <4 x i16> %b) { 3846; CHECK-LABEL: test_vtrn_p16: 3847; CHECK: // %bb.0: // %entry 3848; CHECK-NEXT: trn1 v2.4h, v0.4h, v1.4h 3849; CHECK-NEXT: trn2 v1.4h, v0.4h, v1.4h 3850; CHECK-NEXT: fmov d0, d2 3851; CHECK-NEXT: ret 3852entry: 3853 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3854 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3855 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0 3856 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1 3857 ret %struct.poly16x4x2_t %.fca.0.1.insert 3858} 3859 3860define %struct.int8x16x2_t @test_vtrnq_s8(<16 x i8> %a, <16 x i8> %b) { 3861; CHECK-LABEL: test_vtrnq_s8: 3862; CHECK: // %bb.0: // %entry 3863; CHECK-NEXT: trn1 v2.16b, v0.16b, v1.16b 3864; CHECK-NEXT: trn2 v1.16b, v0.16b, v1.16b 3865; CHECK-NEXT: mov v0.16b, v2.16b 3866; CHECK-NEXT: ret 3867entry: 3868 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 3869 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 3870 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0 3871 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1 3872 ret %struct.int8x16x2_t %.fca.0.1.insert 3873} 3874 3875define %struct.int16x8x2_t @test_vtrnq_s16(<8 x i16> %a, <8 x i16> %b) { 3876; CHECK-LABEL: test_vtrnq_s16: 3877; CHECK: // %bb.0: // %entry 3878; CHECK-NEXT: trn1 v2.8h, v0.8h, v1.8h 3879; CHECK-NEXT: trn2 v1.8h, v0.8h, v1.8h 3880; CHECK-NEXT: mov v0.16b, v2.16b 3881; CHECK-NEXT: ret 3882entry: 3883 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3884 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3885 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0 3886 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1 3887 ret %struct.int16x8x2_t %.fca.0.1.insert 3888} 3889 3890define %struct.int32x4x2_t @test_vtrnq_s32(<4 x i32> %a, <4 x i32> %b) { 3891; CHECK-LABEL: test_vtrnq_s32: 3892; CHECK: // %bb.0: // %entry 3893; CHECK-NEXT: trn1 v2.4s, v0.4s, v1.4s 3894; CHECK-NEXT: trn2 v1.4s, v0.4s, v1.4s 3895; CHECK-NEXT: mov v0.16b, v2.16b 3896; CHECK-NEXT: ret 3897entry: 3898 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3899 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3900 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0 3901 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1 3902 ret %struct.int32x4x2_t %.fca.0.1.insert 3903} 3904 3905define %struct.uint8x16x2_t @test_vtrnq_u8(<16 x i8> %a, <16 x i8> %b) { 3906; CHECK-LABEL: test_vtrnq_u8: 3907; CHECK: // %bb.0: // %entry 3908; CHECK-NEXT: trn1 v2.16b, v0.16b, v1.16b 3909; CHECK-NEXT: trn2 v1.16b, v0.16b, v1.16b 3910; CHECK-NEXT: mov v0.16b, v2.16b 3911; CHECK-NEXT: ret 3912entry: 3913 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 3914 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 3915 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0 3916 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1 3917 ret %struct.uint8x16x2_t %.fca.0.1.insert 3918} 3919 3920define %struct.uint16x8x2_t @test_vtrnq_u16(<8 x i16> %a, <8 x i16> %b) { 3921; CHECK-LABEL: test_vtrnq_u16: 3922; CHECK: // %bb.0: // %entry 3923; CHECK-NEXT: trn1 v2.8h, v0.8h, v1.8h 3924; CHECK-NEXT: trn2 v1.8h, v0.8h, v1.8h 3925; CHECK-NEXT: mov v0.16b, v2.16b 3926; CHECK-NEXT: ret 3927entry: 3928 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3929 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3930 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0 3931 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1 3932 ret %struct.uint16x8x2_t %.fca.0.1.insert 3933} 3934 3935define %struct.uint32x4x2_t @test_vtrnq_u32(<4 x i32> %a, <4 x i32> %b) { 3936; CHECK-LABEL: test_vtrnq_u32: 3937; CHECK: // %bb.0: // %entry 3938; CHECK-NEXT: trn1 v2.4s, v0.4s, v1.4s 3939; CHECK-NEXT: trn2 v1.4s, v0.4s, v1.4s 3940; CHECK-NEXT: mov v0.16b, v2.16b 3941; CHECK-NEXT: ret 3942entry: 3943 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3944 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3945 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0 3946 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1 3947 ret %struct.uint32x4x2_t %.fca.0.1.insert 3948} 3949 3950define %struct.float32x4x2_t @test_vtrnq_f32(<4 x float> %a, <4 x float> %b) { 3951; CHECK-LABEL: test_vtrnq_f32: 3952; CHECK: // %bb.0: // %entry 3953; CHECK-NEXT: trn1 v2.4s, v0.4s, v1.4s 3954; CHECK-NEXT: trn2 v1.4s, v0.4s, v1.4s 3955; CHECK-NEXT: mov v0.16b, v2.16b 3956; CHECK-NEXT: ret 3957entry: 3958 %vtrn.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3959 %vtrn1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3960 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vtrn.i, 0, 0 3961 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vtrn1.i, 0, 1 3962 ret %struct.float32x4x2_t %.fca.0.1.insert 3963} 3964 3965define %struct.poly8x16x2_t @test_vtrnq_p8(<16 x i8> %a, <16 x i8> %b) { 3966; CHECK-LABEL: test_vtrnq_p8: 3967; CHECK: // %bb.0: // %entry 3968; CHECK-NEXT: trn1 v2.16b, v0.16b, v1.16b 3969; CHECK-NEXT: trn2 v1.16b, v0.16b, v1.16b 3970; CHECK-NEXT: mov v0.16b, v2.16b 3971; CHECK-NEXT: ret 3972entry: 3973 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 3974 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 3975 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0 3976 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1 3977 ret %struct.poly8x16x2_t %.fca.0.1.insert 3978} 3979 3980define %struct.poly16x8x2_t @test_vtrnq_p16(<8 x i16> %a, <8 x i16> %b) { 3981; CHECK-LABEL: test_vtrnq_p16: 3982; CHECK: // %bb.0: // %entry 3983; CHECK-NEXT: trn1 v2.8h, v0.8h, v1.8h 3984; CHECK-NEXT: trn2 v1.8h, v0.8h, v1.8h 3985; CHECK-NEXT: mov v0.16b, v2.16b 3986; CHECK-NEXT: ret 3987entry: 3988 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3989 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3990 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0 3991 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1 3992 ret %struct.poly16x8x2_t %.fca.0.1.insert 3993} 3994 3995define %struct.uint8x8x2_t @test_uzp(<16 x i8> %y) { 3996; CHECK-SD-LABEL: test_uzp: 3997; CHECK-SD: // %bb.0: 3998; CHECK-SD-NEXT: xtn v2.8b, v0.8h 3999; CHECK-SD-NEXT: uzp2 v1.16b, v0.16b, v0.16b 4000; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1 4001; CHECK-SD-NEXT: fmov d0, d2 4002; CHECK-SD-NEXT: ret 4003; 4004; CHECK-GI-LABEL: test_uzp: 4005; CHECK-GI: // %bb.0: 4006; CHECK-GI-NEXT: uzp1 v2.16b, v0.16b, v0.16b 4007; CHECK-GI-NEXT: uzp2 v1.16b, v0.16b, v0.16b 4008; CHECK-GI-NEXT: // kill: def $d1 killed $d1 killed $q1 4009; CHECK-GI-NEXT: fmov d0, d2 4010; CHECK-GI-NEXT: ret 4011 4012 4013 %vuzp.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 4014 %vuzp1.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 4015 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 4016 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 4017 ret %struct.uint8x8x2_t %.fca.0.1.insert 4018 4019} 4020