xref: /llvm-project/llvm/test/CodeGen/AArch64/neon-insextbitcast.ll (revision 401481daac909131762a68f177ba612b507c6e85) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
3
4define <4 x i32> @test_vins_v4i32(<4 x i32> %a, float %b) {
5; CHECK-LABEL: test_vins_v4i32:
6; CHECK:       // %bb.0: // %entry
7; CHECK-NEXT:    // kill: def $s1 killed $s1 def $q1
8; CHECK-NEXT:    mov v0.s[3], v1.s[0]
9; CHECK-NEXT:    ret
10entry:
11  %c = bitcast float %b to i32
12  %d = insertelement <4 x i32> %a, i32 %c, i32 3
13  ret <4 x i32> %d
14}
15
16define <4 x i32> @test_vins_v4i32_0(<4 x i32> %a, float %b) {
17; CHECK-LABEL: test_vins_v4i32_0:
18; CHECK:       // %bb.0: // %entry
19; CHECK-NEXT:    // kill: def $s1 killed $s1 def $q1
20; CHECK-NEXT:    mov v0.s[0], v1.s[0]
21; CHECK-NEXT:    ret
22entry:
23  %c = bitcast float %b to i32
24  %d = insertelement <4 x i32> %a, i32 %c, i32 0
25  ret <4 x i32> %d
26}
27
28define <2 x i32> @test_vins_v2i32(<2 x i32> %a, float %b) {
29; CHECK-LABEL: test_vins_v2i32:
30; CHECK:       // %bb.0: // %entry
31; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
32; CHECK-NEXT:    // kill: def $s1 killed $s1 def $q1
33; CHECK-NEXT:    mov v0.s[1], v1.s[0]
34; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
35; CHECK-NEXT:    ret
36entry:
37  %c = bitcast float %b to i32
38  %d = insertelement <2 x i32> %a, i32 %c, i32 1
39  ret <2 x i32> %d
40}
41
42define <2 x i32> @test_vins_v2i32_0(<2 x i32> %a, float %b) {
43; CHECK-LABEL: test_vins_v2i32_0:
44; CHECK:       // %bb.0: // %entry
45; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
46; CHECK-NEXT:    // kill: def $s1 killed $s1 def $q1
47; CHECK-NEXT:    mov v0.s[0], v1.s[0]
48; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
49; CHECK-NEXT:    ret
50entry:
51  %c = bitcast float %b to i32
52  %d = insertelement <2 x i32> %a, i32 %c, i32 0
53  ret <2 x i32> %d
54}
55
56define <2 x i64> @test_vins_v2i64(<2 x i64> %a, double %b) {
57; CHECK-LABEL: test_vins_v2i64:
58; CHECK:       // %bb.0: // %entry
59; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
60; CHECK-NEXT:    mov v0.d[1], v1.d[0]
61; CHECK-NEXT:    ret
62entry:
63  %c = bitcast double %b to i64
64  %d = insertelement <2 x i64> %a, i64 %c, i32 1
65  ret <2 x i64> %d
66}
67
68define <2 x i64> @test_vins_v2i64_0(<2 x i64> %a, double %b) {
69; CHECK-LABEL: test_vins_v2i64_0:
70; CHECK:       // %bb.0: // %entry
71; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
72; CHECK-NEXT:    mov v0.d[0], v1.d[0]
73; CHECK-NEXT:    ret
74entry:
75  %c = bitcast double %b to i64
76  %d = insertelement <2 x i64> %a, i64 %c, i32 0
77  ret <2 x i64> %d
78}
79
80define <1 x i64> @test_vins_v1i64(<1 x i64> %a, double %b) {
81; CHECK-LABEL: test_vins_v1i64:
82; CHECK:       // %bb.0: // %entry
83; CHECK-NEXT:    fmov d0, d1
84; CHECK-NEXT:    ret
85entry:
86  %c = bitcast double %b to i64
87  %d = insertelement <1 x i64> %a, i64 %c, i32 0
88  ret <1 x i64> %d
89}
90
91
92define float @test_vext_v4i32(<4 x i32> %a) {
93; CHECK-LABEL: test_vext_v4i32:
94; CHECK:       // %bb.0: // %entry
95; CHECK-NEXT:    mov v0.s[0], v0.s[3]
96; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
97; CHECK-NEXT:    ret
98entry:
99  %b = extractelement <4 x i32> %a, i32 3
100  %c = bitcast i32 %b to float
101  ret float %c
102}
103
104define float @test_vext_v4i32_0(<4 x i32> %a) {
105; CHECK-LABEL: test_vext_v4i32_0:
106; CHECK:       // %bb.0: // %entry
107; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
108; CHECK-NEXT:    ret
109entry:
110  %b = extractelement <4 x i32> %a, i32 0
111  %c = bitcast i32 %b to float
112  ret float %c
113}
114
115define float @test_vext_v2i32(<2 x i32> %a) {
116; CHECK-LABEL: test_vext_v2i32:
117; CHECK:       // %bb.0: // %entry
118; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
119; CHECK-NEXT:    mov v0.s[0], v0.s[1]
120; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
121; CHECK-NEXT:    ret
122entry:
123  %b = extractelement <2 x i32> %a, i32 1
124  %c = bitcast i32 %b to float
125  ret float %c
126}
127
128define float @test_vext_v2i32_0(<2 x i32> %a) {
129; CHECK-LABEL: test_vext_v2i32_0:
130; CHECK:       // %bb.0: // %entry
131; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
132; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
133; CHECK-NEXT:    ret
134entry:
135  %b = extractelement <2 x i32> %a, i32 0
136  %c = bitcast i32 %b to float
137  ret float %c
138}
139
140define double @test_vext_v2i64(<2 x i64> %a) {
141; CHECK-LABEL: test_vext_v2i64:
142; CHECK:       // %bb.0: // %entry
143; CHECK-NEXT:    mov v0.d[0], v0.d[1]
144; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
145; CHECK-NEXT:    ret
146entry:
147  %b = extractelement <2 x i64> %a, i32 1
148  %c = bitcast i64 %b to double
149  ret double %c
150}
151
152define double @test_vext_v2i64_0(<2 x i64> %a) {
153; CHECK-LABEL: test_vext_v2i64_0:
154; CHECK:       // %bb.0: // %entry
155; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
156; CHECK-NEXT:    ret
157entry:
158  %b = extractelement <2 x i64> %a, i32 0
159  %c = bitcast i64 %b to double
160  ret double %c
161}
162
163define double @test_vext_v1i64(<1 x i64> %a) {
164; CHECK-LABEL: test_vext_v1i64:
165; CHECK:       // %bb.0: // %entry
166; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
167; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
168; CHECK-NEXT:    ret
169entry:
170  %b = extractelement <1 x i64> %a, i32 0
171  %c = bitcast i64 %b to double
172  ret double %c
173}
174