xref: /llvm-project/llvm/test/CodeGen/AArch64/neg-selects.ll (revision 041ffc155fd7d154af1ea59853fbe5932d0216d3) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-none-elf %s -o - | FileCheck %s
3
4define i32 @neg_select_neg(i32 %a, i32 %b, i1 %bb) {
5; CHECK-LABEL: neg_select_neg:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    tst w2, #0x1
8; CHECK-NEXT:    csel w0, w0, w1, ne
9; CHECK-NEXT:    ret
10  %nega = sub i32 0, %a
11  %negb = sub i32 0, %b
12  %sel = select i1 %bb, i32 %nega, i32 %negb
13  %res = sub i32 0, %sel
14  ret i32 %res
15}
16
17define i32 @negneg_select_nega(i32 %a, i32 %b, i1 %bb) {
18; CHECK-LABEL: negneg_select_nega:
19; CHECK:       // %bb.0:
20; CHECK-NEXT:    tst w2, #0x1
21; CHECK-NEXT:    csneg w0, w1, w0, eq
22; CHECK-NEXT:    ret
23  %nega = sub i32 0, %a
24  %sel = select i1 %bb, i32 %nega, i32 %b
25  %nsel = sub i32 0, %sel
26  %res = sub i32 0, %nsel
27  ret i32 %res
28}
29
30define i32 @neg_select_nega(i32 %a, i32 %b, i1 %bb) {
31; CHECK-LABEL: neg_select_nega:
32; CHECK:       // %bb.0:
33; CHECK-NEXT:    tst w2, #0x1
34; CHECK-NEXT:    csneg w0, w0, w1, ne
35; CHECK-NEXT:    ret
36  %nega = sub i32 0, %a
37  %sel = select i1 %bb, i32 %nega, i32 %b
38  %res = sub i32 0, %sel
39  ret i32 %res
40}
41
42define i32 @neg_select_negb(i32 %a, i32 %b, i1 %bb) {
43; CHECK-LABEL: neg_select_negb:
44; CHECK:       // %bb.0:
45; CHECK-NEXT:    tst w2, #0x1
46; CHECK-NEXT:    csneg w0, w1, w0, eq
47; CHECK-NEXT:    ret
48  %negb = sub i32 0, %b
49  %sel = select i1 %bb, i32 %a, i32 %negb
50  %res = sub i32 0, %sel
51  ret i32 %res
52}
53
54define i32 @neg_select_ab(i32 %a, i32 %b, i1 %bb) {
55; CHECK-LABEL: neg_select_ab:
56; CHECK:       // %bb.0:
57; CHECK-NEXT:    tst w2, #0x1
58; CHECK-NEXT:    csel w8, w0, w1, ne
59; CHECK-NEXT:    neg w0, w8
60; CHECK-NEXT:    ret
61  %sel = select i1 %bb, i32 %a, i32 %b
62  %res = sub i32 0, %sel
63  ret i32 %res
64}
65
66define i32 @neg_select_nega_with_use(i32 %a, i32 %b, i1 %bb) {
67; CHECK-LABEL: neg_select_nega_with_use:
68; CHECK:       // %bb.0:
69; CHECK-NEXT:    tst w2, #0x1
70; CHECK-NEXT:    neg w8, w0
71; CHECK-NEXT:    csneg w9, w1, w0, eq
72; CHECK-NEXT:    sub w0, w8, w9
73; CHECK-NEXT:    ret
74  %nega = sub i32 0, %a
75  %sel = select i1 %bb, i32 %nega, i32 %b
76  %nsel = sub i32 0, %sel
77  %res = add i32 %nsel, %nega
78  ret i32 %res
79}
80