1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s 3 4define i64 @test0() { 5; CHECK-LABEL: test0: 6; CHECK: ; %bb.0: 7; CHECK-NEXT: mov x0, xzr 8; CHECK-NEXT: ret 9; Not produced by move wide instructions, but good to make sure we can return 0 anyway: 10 ret i64 0 11} 12 13define i64 @test1() { 14; CHECK-LABEL: test1: 15; CHECK: ; %bb.0: 16; CHECK-NEXT: mov w0, #1 ; =0x1 17; CHECK-NEXT: ret 18 ret i64 1 19} 20 21define i64 @test2() { 22; CHECK-LABEL: test2: 23; CHECK: ; %bb.0: 24; CHECK-NEXT: mov w0, #65535 ; =0xffff 25; CHECK-NEXT: ret 26 ret i64 65535 27} 28 29define i64 @test3() { 30; CHECK-LABEL: test3: 31; CHECK: ; %bb.0: 32; CHECK-NEXT: mov w0, #65536 ; =0x10000 33; CHECK-NEXT: ret 34 ret i64 65536 35} 36 37define i64 @test4() { 38; CHECK-LABEL: test4: 39; CHECK: ; %bb.0: 40; CHECK-NEXT: mov w0, #-65536 ; =0xffff0000 41; CHECK-NEXT: ret 42 ret i64 4294901760 43} 44 45define i64 @test5() { 46; CHECK-LABEL: test5: 47; CHECK: ; %bb.0: 48; CHECK-NEXT: mov x0, #4294967296 ; =0x100000000 49; CHECK-NEXT: ret 50 ret i64 4294967296 51} 52 53define i64 @test6() { 54; CHECK-LABEL: test6: 55; CHECK: ; %bb.0: 56; CHECK-NEXT: mov x0, #281470681743360 ; =0xffff00000000 57; CHECK-NEXT: ret 58 ret i64 281470681743360 59} 60 61define i64 @test7() { 62; CHECK-LABEL: test7: 63; CHECK: ; %bb.0: 64; CHECK-NEXT: mov x0, #281474976710656 ; =0x1000000000000 65; CHECK-NEXT: ret 66 ret i64 281474976710656 67} 68 69; A 32-bit MOVN can generate some 64-bit patterns that a 64-bit one 70; couldn't. Useful even for i64 71define i64 @test8() { 72; CHECK-LABEL: test8: 73; CHECK: ; %bb.0: 74; CHECK-NEXT: mov w0, #-60876 ; =0xffff1234 75; CHECK-NEXT: ret 76 ret i64 4294906420 77} 78 79define i64 @test9() { 80; CHECK-LABEL: test9: 81; CHECK: ; %bb.0: 82; CHECK-NEXT: mov x0, #-1 ; =0xffffffffffffffff 83; CHECK-NEXT: ret 84 ret i64 -1 85} 86 87define i64 @test10() { 88; CHECK-LABEL: test10: 89; CHECK: ; %bb.0: 90; CHECK-NEXT: mov x0, #-3989504001 ; =0xffffffff1234ffff 91; CHECK-NEXT: ret 92 ret i64 18446744069720047615 93} 94 95; For reasonably legitimate reasons returning an i32 results in the 96; selection of an i64 constant, so we need a different idiom to test that selection 97@var32 = global i32 0 98 99define void @test11() { 100; CHECK-LABEL: test11: 101; CHECK: ; %bb.0: 102; CHECK-NEXT: adrp x8, _var32@PAGE 103; CHECK-NEXT: str wzr, [x8, _var32@PAGEOFF] 104; CHECK-NEXT: ret 105 store i32 0, ptr @var32 106 ret void 107} 108 109define void @test12() { 110; CHECK-LABEL: test12: 111; CHECK: ; %bb.0: 112; CHECK-NEXT: adrp x8, _var32@PAGE 113; CHECK-NEXT: mov w9, #1 ; =0x1 114; CHECK-NEXT: str w9, [x8, _var32@PAGEOFF] 115; CHECK-NEXT: ret 116 store i32 1, ptr @var32 117 ret void 118} 119 120define void @test13() { 121; CHECK-LABEL: test13: 122; CHECK: ; %bb.0: 123; CHECK-NEXT: adrp x8, _var32@PAGE 124; CHECK-NEXT: mov w9, #65535 ; =0xffff 125; CHECK-NEXT: str w9, [x8, _var32@PAGEOFF] 126; CHECK-NEXT: ret 127 store i32 65535, ptr @var32 128 ret void 129} 130 131define void @test14() { 132; CHECK-LABEL: test14: 133; CHECK: ; %bb.0: 134; CHECK-NEXT: adrp x8, _var32@PAGE 135; CHECK-NEXT: mov w9, #65536 ; =0x10000 136; CHECK-NEXT: str w9, [x8, _var32@PAGEOFF] 137; CHECK-NEXT: ret 138 store i32 65536, ptr @var32 139 ret void 140} 141 142define void @test15() { 143; CHECK-LABEL: test15: 144; CHECK: ; %bb.0: 145; CHECK-NEXT: adrp x8, _var32@PAGE 146; CHECK-NEXT: mov w9, #-65536 ; =0xffff0000 147; CHECK-NEXT: str w9, [x8, _var32@PAGEOFF] 148; CHECK-NEXT: ret 149 store i32 4294901760, ptr @var32 150 ret void 151} 152 153define void @test16() { 154; CHECK-LABEL: test16: 155; CHECK: ; %bb.0: 156; CHECK-NEXT: adrp x8, _var32@PAGE 157; CHECK-NEXT: mov w9, #-1 ; =0xffffffff 158; CHECK-NEXT: str w9, [x8, _var32@PAGEOFF] 159; CHECK-NEXT: ret 160 store i32 -1, ptr @var32 161 ret void 162} 163 164define i64 @test17() { 165; CHECK-LABEL: test17: 166; CHECK: ; %bb.0: 167; CHECK-NEXT: mov x0, #-3 ; =0xfffffffffffffffd 168; CHECK-NEXT: ret 169 170 ; Mustn't MOVN w0 here. 171 ret i64 -3 172} 173