1# RUN: llc -mcpu=exynos-m5 -mtriple=aarch64 -enable-misched -run-pass=machine-scheduler -debug-only=machine-scheduler %s -o /dev/null 2>&1 | FileCheck %s 2# REQUIRES: asserts 3 4# CHECK-LABEL: ********** MI Scheduling ********** 5# CHECK: SU(0): %0:fpr128 = COPY $q1 6# CHECK-NEXT: # preds left : 0 7# CHECK-NEXT: # succs left : 1 8# CHECK-NEXT: # rdefs left : 0 9# CHECK-NEXT: Latency : 2 10# CHECK-NEXT: Depth : 0 11# CHECK-NEXT: Height : 12 12# CHECK-NEXT: Successors: 13# CHECK-NEXT: SU(1): Data Latency=2 Reg=%0 14# CHECK-NEXT: Single Issue : false; 15# CHECK-NEXT: SU(1): %1:fpr32 = FMINVv4i32v %0:fpr128, implicit $fpcr 16# CHECK-NEXT: # preds left : 1 17# CHECK-NEXT: # succs left : 1 18# CHECK-NEXT: # rdefs left : 0 19# CHECK-NEXT: Latency : 8 20# CHECK-NEXT: Depth : 2 21# CHECK-NEXT: Height : 10 22# CHECK-NEXT: Predecessors: 23# CHECK-NEXT: SU(0): Data Latency=2 Reg=%0 24# CHECK-NEXT: Successors: 25# CHECK-NEXT: SU(2): Data Latency=8 Reg=%1 26# CHECK-NEXT: Single Issue : false; 27 28name: test_qform_virtreg 29tracksRegLiveness: true 30body: | 31 bb.0: 32 liveins: $s0, $q1 33 %0:fpr128 = COPY $q1 34 %1:fpr32 = FMINVv4i32v %0:fpr128, implicit $fpcr 35 $s0 = COPY %1 36 RET_ReallyLR implicit $s0 37 38