xref: /llvm-project/llvm/test/CodeGen/AArch64/misched-fusion-addr-tune.ll (revision 5ddce70ef0e5a641d7fea95e31fc5e2439cb98cb)
1; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a65    | FileCheck %s
2
3@var_float = dso_local global float 0.0
4@var_double = dso_local global double 0.0
5@var_double2 = dso_local global <2 x double> <double 0.0, double 0.0>
6
7define dso_local void @ldst_double() {
8  %valf = load volatile float, ptr @var_float
9  %vale = fpext float %valf to double
10  %vald = load volatile double, ptr @var_double
11  %vald1 = insertelement <2 x double> undef, double %vald, i32 0
12  %vald2 = insertelement <2 x double> %vald1, double %vale, i32 1
13  store volatile <2 x double> %vald2, ptr @var_double2
14  ret void
15
16; CHECK-LABEL: ldst_double:
17; CHECK: adrp [[RD:x[0-9]+]], var_double
18; CHECK-NEXT: ldr {{d[0-9]+}}, [[[RD]], {{#?}}:lo12:var_double]
19; CHECK: adrp [[RQ:x[0-9]+]], var_double2
20; CHECK-NEXT: str {{q[0-9]+}}, [[[RQ]], {{#?}}:lo12:var_double2]
21}
22
23define dso_local void @ldst_double_tune_a53() #0 {
24  %valf = load volatile float, ptr @var_float
25  %vale = fpext float %valf to double
26  %vald = load volatile double, ptr @var_double
27  %vald1 = insertelement <2 x double> undef, double %vald, i32 0
28  %vald2 = insertelement <2 x double> %vald1, double %vale, i32 1
29  store volatile <2 x double> %vald2, ptr @var_double2
30  ret void
31
32; CHECK-LABEL: ldst_double_tune_a53:
33; CHECK: adrp [[RD:x[0-9]+]], var_double
34; CHECK-NEXT: ldr {{d[0-9]+}}, [[[RD]], {{#?}}:lo12:var_double]
35; CHECK-NEXT: adrp [[RQ:x[0-9]+]], var_double2
36; CHECK: fcvt
37; CHECK: str {{q[0-9]+}}, [[[RQ]], {{#?}}:lo12:var_double2]
38}
39
40attributes #0 = { "tune-cpu"="cortex-a53" }
41