1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-ISEL 3; RUN: llc -mtriple=aarch64 %s -o - -mattr=+cssc | FileCheck %s --check-prefixes=CHECK,CHECK-ISEL-CSSC 4; RUN: llc -mtriple=aarch64 -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GLOBAL 5; RUN: llc -mtriple=aarch64 -global-isel %s -o - -mattr=+cssc | FileCheck %s --check-prefixes=CHECK,CHECK-GLOBAL-CSSC 6 7; These tests just check that the plumbing is in place for @llvm.smax, @llvm.umax, 8; @llvm.smin, @llvm.umin. 9 10declare i8 @llvm.smax.i8(i8 %a, i8 %b) readnone 11 12define i8 @smaxi8(i8 %a, i8 %b) { 13; CHECK-ISEL-LABEL: smaxi8: 14; CHECK-ISEL: // %bb.0: 15; CHECK-ISEL-NEXT: sxtb w8, w1 16; CHECK-ISEL-NEXT: sxtb w9, w0 17; CHECK-ISEL-NEXT: cmp w9, w8 18; CHECK-ISEL-NEXT: csel w0, w9, w8, gt 19; CHECK-ISEL-NEXT: ret 20; 21; CHECK-ISEL-CSSC-LABEL: smaxi8: 22; CHECK-ISEL-CSSC: // %bb.0: 23; CHECK-ISEL-CSSC-NEXT: sxtb w8, w1 24; CHECK-ISEL-CSSC-NEXT: sxtb w9, w0 25; CHECK-ISEL-CSSC-NEXT: smax w0, w9, w8 26; CHECK-ISEL-CSSC-NEXT: ret 27; 28; CHECK-GLOBAL-LABEL: smaxi8: 29; CHECK-GLOBAL: // %bb.0: 30; CHECK-GLOBAL-NEXT: sxtb w8, w0 31; CHECK-GLOBAL-NEXT: cmp w8, w1, sxtb 32; CHECK-GLOBAL-NEXT: csel w0, w0, w1, gt 33; CHECK-GLOBAL-NEXT: ret 34; 35; CHECK-GLOBAL-CSSC-LABEL: smaxi8: 36; CHECK-GLOBAL-CSSC: // %bb.0: 37; CHECK-GLOBAL-CSSC-NEXT: sxtb w8, w0 38; CHECK-GLOBAL-CSSC-NEXT: sxtb w9, w1 39; CHECK-GLOBAL-CSSC-NEXT: smax w0, w8, w9 40; CHECK-GLOBAL-CSSC-NEXT: ret 41 %c = call i8 @llvm.smax.i8(i8 %a, i8 %b) 42 ret i8 %c 43} 44 45declare i16 @llvm.smax.i16(i16 %a, i16 %b) readnone 46 47define i16 @smaxi16(i16 %a, i16 %b) { 48; CHECK-ISEL-LABEL: smaxi16: 49; CHECK-ISEL: // %bb.0: 50; CHECK-ISEL-NEXT: sxth w8, w1 51; CHECK-ISEL-NEXT: sxth w9, w0 52; CHECK-ISEL-NEXT: cmp w9, w8 53; CHECK-ISEL-NEXT: csel w0, w9, w8, gt 54; CHECK-ISEL-NEXT: ret 55; 56; CHECK-ISEL-CSSC-LABEL: smaxi16: 57; CHECK-ISEL-CSSC: // %bb.0: 58; CHECK-ISEL-CSSC-NEXT: sxth w8, w1 59; CHECK-ISEL-CSSC-NEXT: sxth w9, w0 60; CHECK-ISEL-CSSC-NEXT: smax w0, w9, w8 61; CHECK-ISEL-CSSC-NEXT: ret 62; 63; CHECK-GLOBAL-LABEL: smaxi16: 64; CHECK-GLOBAL: // %bb.0: 65; CHECK-GLOBAL-NEXT: sxth w8, w0 66; CHECK-GLOBAL-NEXT: cmp w8, w1, sxth 67; CHECK-GLOBAL-NEXT: csel w0, w0, w1, gt 68; CHECK-GLOBAL-NEXT: ret 69; 70; CHECK-GLOBAL-CSSC-LABEL: smaxi16: 71; CHECK-GLOBAL-CSSC: // %bb.0: 72; CHECK-GLOBAL-CSSC-NEXT: sxth w8, w0 73; CHECK-GLOBAL-CSSC-NEXT: sxth w9, w1 74; CHECK-GLOBAL-CSSC-NEXT: smax w0, w8, w9 75; CHECK-GLOBAL-CSSC-NEXT: ret 76 %c = call i16 @llvm.smax.i16(i16 %a, i16 %b) 77 ret i16 %c 78} 79 80declare i32 @llvm.smax.i32(i32 %a, i32 %b) readnone 81 82define i32 @smaxi32(i32 %a, i32 %b) { 83; CHECK-ISEL-LABEL: smaxi32: 84; CHECK-ISEL: // %bb.0: 85; CHECK-ISEL-NEXT: cmp w0, w1 86; CHECK-ISEL-NEXT: csel w0, w0, w1, gt 87; CHECK-ISEL-NEXT: ret 88; 89; CHECK-ISEL-CSSC-LABEL: smaxi32: 90; CHECK-ISEL-CSSC: // %bb.0: 91; CHECK-ISEL-CSSC-NEXT: smax w0, w0, w1 92; CHECK-ISEL-CSSC-NEXT: ret 93; 94; CHECK-GLOBAL-LABEL: smaxi32: 95; CHECK-GLOBAL: // %bb.0: 96; CHECK-GLOBAL-NEXT: cmp w0, w1 97; CHECK-GLOBAL-NEXT: csel w0, w0, w1, gt 98; CHECK-GLOBAL-NEXT: ret 99; 100; CHECK-GLOBAL-CSSC-LABEL: smaxi32: 101; CHECK-GLOBAL-CSSC: // %bb.0: 102; CHECK-GLOBAL-CSSC-NEXT: smax w0, w0, w1 103; CHECK-GLOBAL-CSSC-NEXT: ret 104 %c = call i32 @llvm.smax.i32(i32 %a, i32 %b) 105 ret i32 %c 106} 107 108declare i64 @llvm.smax.i64(i64 %a, i64 %b) readnone 109 110define i64 @smaxi64(i64 %a, i64 %b) { 111; CHECK-ISEL-LABEL: smaxi64: 112; CHECK-ISEL: // %bb.0: 113; CHECK-ISEL-NEXT: cmp x0, x1 114; CHECK-ISEL-NEXT: csel x0, x0, x1, gt 115; CHECK-ISEL-NEXT: ret 116; 117; CHECK-ISEL-CSSC-LABEL: smaxi64: 118; CHECK-ISEL-CSSC: // %bb.0: 119; CHECK-ISEL-CSSC-NEXT: smax x0, x0, x1 120; CHECK-ISEL-CSSC-NEXT: ret 121; 122; CHECK-GLOBAL-LABEL: smaxi64: 123; CHECK-GLOBAL: // %bb.0: 124; CHECK-GLOBAL-NEXT: cmp x0, x1 125; CHECK-GLOBAL-NEXT: csel x0, x0, x1, gt 126; CHECK-GLOBAL-NEXT: ret 127; 128; CHECK-GLOBAL-CSSC-LABEL: smaxi64: 129; CHECK-GLOBAL-CSSC: // %bb.0: 130; CHECK-GLOBAL-CSSC-NEXT: smax x0, x0, x1 131; CHECK-GLOBAL-CSSC-NEXT: ret 132 %c = call i64 @llvm.smax.i64(i64 %a, i64 %b) 133 ret i64 %c 134} 135 136declare <8 x i8> @llvm.smax.v8i8(<8 x i8> %a, <8 x i8> %b) readnone 137 138define <8 x i8> @smax8i8(<8 x i8> %a, <8 x i8> %b) { 139; CHECK-LABEL: smax8i8: 140; CHECK: // %bb.0: 141; CHECK-NEXT: smax v0.8b, v0.8b, v1.8b 142; CHECK-NEXT: ret 143 %c = call <8 x i8> @llvm.smax.v8i8(<8 x i8> %a, <8 x i8> %b) 144 ret <8 x i8> %c 145} 146 147declare <16 x i8> @llvm.smax.v16i8(<16 x i8> %a, <16 x i8> %b) readnone 148 149define <16 x i8> @smax16i8(<16 x i8> %a, <16 x i8> %b) { 150; CHECK-LABEL: smax16i8: 151; CHECK: // %bb.0: 152; CHECK-NEXT: smax v0.16b, v0.16b, v1.16b 153; CHECK-NEXT: ret 154 %c = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %a, <16 x i8> %b) 155 ret <16 x i8> %c 156} 157 158declare <32 x i8> @llvm.smax.v32i8(<32 x i8> %a, <32 x i8> %b) readnone 159 160define void @smax32i8(<32 x i8> %a, <32 x i8> %b, ptr %p) { 161; CHECK-ISEL-LABEL: smax32i8: 162; CHECK-ISEL: // %bb.0: 163; CHECK-ISEL-NEXT: smax v1.16b, v1.16b, v3.16b 164; CHECK-ISEL-NEXT: smax v0.16b, v0.16b, v2.16b 165; CHECK-ISEL-NEXT: stp q0, q1, [x0] 166; CHECK-ISEL-NEXT: ret 167; 168; CHECK-ISEL-CSSC-LABEL: smax32i8: 169; CHECK-ISEL-CSSC: // %bb.0: 170; CHECK-ISEL-CSSC-NEXT: smax v1.16b, v1.16b, v3.16b 171; CHECK-ISEL-CSSC-NEXT: smax v0.16b, v0.16b, v2.16b 172; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 173; CHECK-ISEL-CSSC-NEXT: ret 174; 175; CHECK-GLOBAL-LABEL: smax32i8: 176; CHECK-GLOBAL: // %bb.0: 177; CHECK-GLOBAL-NEXT: smax v0.16b, v0.16b, v2.16b 178; CHECK-GLOBAL-NEXT: smax v1.16b, v1.16b, v3.16b 179; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 180; CHECK-GLOBAL-NEXT: ret 181; 182; CHECK-GLOBAL-CSSC-LABEL: smax32i8: 183; CHECK-GLOBAL-CSSC: // %bb.0: 184; CHECK-GLOBAL-CSSC-NEXT: smax v0.16b, v0.16b, v2.16b 185; CHECK-GLOBAL-CSSC-NEXT: smax v1.16b, v1.16b, v3.16b 186; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 187; CHECK-GLOBAL-CSSC-NEXT: ret 188 %c = call <32 x i8> @llvm.smax.v32i8(<32 x i8> %a, <32 x i8> %b) 189 store <32 x i8> %c, ptr %p 190 ret void 191} 192 193declare <4 x i16> @llvm.smax.v4i16(<4 x i16> %a, <4 x i16> %b) readnone 194 195define <4 x i16> @smax4i16(<4 x i16> %a, <4 x i16> %b) { 196; CHECK-LABEL: smax4i16: 197; CHECK: // %bb.0: 198; CHECK-NEXT: smax v0.4h, v0.4h, v1.4h 199; CHECK-NEXT: ret 200 %c = call <4 x i16> @llvm.smax.v4i16(<4 x i16> %a, <4 x i16> %b) 201 ret <4 x i16> %c 202} 203 204declare <8 x i16> @llvm.smax.v8i16(<8 x i16> %a, <8 x i16> %b) readnone 205 206define <8 x i16> @smax8i16(<8 x i16> %a, <8 x i16> %b) { 207; CHECK-LABEL: smax8i16: 208; CHECK: // %bb.0: 209; CHECK-NEXT: smax v0.8h, v0.8h, v1.8h 210; CHECK-NEXT: ret 211 %c = call <8 x i16> @llvm.smax.v8i16(<8 x i16> %a, <8 x i16> %b) 212 ret <8 x i16> %c 213} 214 215declare <16 x i16> @llvm.smax.v16i16(<16 x i16> %a, <16 x i16> %b) readnone 216 217define void @smax16i16(<16 x i16> %a, <16 x i16> %b, ptr %p) { 218; CHECK-ISEL-LABEL: smax16i16: 219; CHECK-ISEL: // %bb.0: 220; CHECK-ISEL-NEXT: smax v1.8h, v1.8h, v3.8h 221; CHECK-ISEL-NEXT: smax v0.8h, v0.8h, v2.8h 222; CHECK-ISEL-NEXT: stp q0, q1, [x0] 223; CHECK-ISEL-NEXT: ret 224; 225; CHECK-ISEL-CSSC-LABEL: smax16i16: 226; CHECK-ISEL-CSSC: // %bb.0: 227; CHECK-ISEL-CSSC-NEXT: smax v1.8h, v1.8h, v3.8h 228; CHECK-ISEL-CSSC-NEXT: smax v0.8h, v0.8h, v2.8h 229; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 230; CHECK-ISEL-CSSC-NEXT: ret 231; 232; CHECK-GLOBAL-LABEL: smax16i16: 233; CHECK-GLOBAL: // %bb.0: 234; CHECK-GLOBAL-NEXT: smax v0.8h, v0.8h, v2.8h 235; CHECK-GLOBAL-NEXT: smax v1.8h, v1.8h, v3.8h 236; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 237; CHECK-GLOBAL-NEXT: ret 238; 239; CHECK-GLOBAL-CSSC-LABEL: smax16i16: 240; CHECK-GLOBAL-CSSC: // %bb.0: 241; CHECK-GLOBAL-CSSC-NEXT: smax v0.8h, v0.8h, v2.8h 242; CHECK-GLOBAL-CSSC-NEXT: smax v1.8h, v1.8h, v3.8h 243; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 244; CHECK-GLOBAL-CSSC-NEXT: ret 245 %c = call <16 x i16> @llvm.smax.v16i16(<16 x i16> %a, <16 x i16> %b) 246 store <16 x i16> %c, ptr %p 247 ret void 248} 249 250declare <2 x i32> @llvm.smax.v2i32(<2 x i32> %a, <2 x i32> %b) readnone 251 252define <2 x i32> @smax2i32(<2 x i32> %a, <2 x i32> %b) { 253; CHECK-LABEL: smax2i32: 254; CHECK: // %bb.0: 255; CHECK-NEXT: smax v0.2s, v0.2s, v1.2s 256; CHECK-NEXT: ret 257 %c = call <2 x i32> @llvm.smax.v2i32(<2 x i32> %a, <2 x i32> %b) 258 ret <2 x i32> %c 259} 260 261declare <4 x i32> @llvm.smax.v4i32(<4 x i32> %a, <4 x i32> %b) readnone 262 263define <4 x i32> @smax4i32(<4 x i32> %a, <4 x i32> %b) { 264; CHECK-LABEL: smax4i32: 265; CHECK: // %bb.0: 266; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s 267; CHECK-NEXT: ret 268 %c = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %a, <4 x i32> %b) 269 ret <4 x i32> %c 270} 271 272declare <8 x i32> @llvm.smax.v8i32(<8 x i32> %a, <8 x i32> %b) readnone 273 274define void @smax8i32(<8 x i32> %a, <8 x i32> %b, ptr %p) { 275; CHECK-ISEL-LABEL: smax8i32: 276; CHECK-ISEL: // %bb.0: 277; CHECK-ISEL-NEXT: smax v1.4s, v1.4s, v3.4s 278; CHECK-ISEL-NEXT: smax v0.4s, v0.4s, v2.4s 279; CHECK-ISEL-NEXT: stp q0, q1, [x0] 280; CHECK-ISEL-NEXT: ret 281; 282; CHECK-ISEL-CSSC-LABEL: smax8i32: 283; CHECK-ISEL-CSSC: // %bb.0: 284; CHECK-ISEL-CSSC-NEXT: smax v1.4s, v1.4s, v3.4s 285; CHECK-ISEL-CSSC-NEXT: smax v0.4s, v0.4s, v2.4s 286; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 287; CHECK-ISEL-CSSC-NEXT: ret 288; 289; CHECK-GLOBAL-LABEL: smax8i32: 290; CHECK-GLOBAL: // %bb.0: 291; CHECK-GLOBAL-NEXT: smax v0.4s, v0.4s, v2.4s 292; CHECK-GLOBAL-NEXT: smax v1.4s, v1.4s, v3.4s 293; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 294; CHECK-GLOBAL-NEXT: ret 295; 296; CHECK-GLOBAL-CSSC-LABEL: smax8i32: 297; CHECK-GLOBAL-CSSC: // %bb.0: 298; CHECK-GLOBAL-CSSC-NEXT: smax v0.4s, v0.4s, v2.4s 299; CHECK-GLOBAL-CSSC-NEXT: smax v1.4s, v1.4s, v3.4s 300; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 301; CHECK-GLOBAL-CSSC-NEXT: ret 302 %c = call <8 x i32>@llvm.smax.v8i32(<8 x i32> %a, <8 x i32> %b) 303 store <8 x i32> %c, ptr %p 304 ret void 305} 306 307declare <1 x i64> @llvm.smax.v1i64(<1 x i64> %a, <1 x i64> %b) readnone 308 309define <1 x i64> @smax1i64(<1 x i64> %a, <1 x i64> %b) { 310; CHECK-ISEL-LABEL: smax1i64: 311; CHECK-ISEL: // %bb.0: 312; CHECK-ISEL-NEXT: cmgt d2, d0, d1 313; CHECK-ISEL-NEXT: bif v0.8b, v1.8b, v2.8b 314; CHECK-ISEL-NEXT: ret 315; 316; CHECK-ISEL-CSSC-LABEL: smax1i64: 317; CHECK-ISEL-CSSC: // %bb.0: 318; CHECK-ISEL-CSSC-NEXT: cmgt d2, d0, d1 319; CHECK-ISEL-CSSC-NEXT: bif v0.8b, v1.8b, v2.8b 320; CHECK-ISEL-CSSC-NEXT: ret 321; 322; CHECK-GLOBAL-LABEL: smax1i64: 323; CHECK-GLOBAL: // %bb.0: 324; CHECK-GLOBAL-NEXT: fmov x8, d0 325; CHECK-GLOBAL-NEXT: fmov x9, d1 326; CHECK-GLOBAL-NEXT: cmp x8, x9 327; CHECK-GLOBAL-NEXT: fcsel d0, d0, d1, gt 328; CHECK-GLOBAL-NEXT: ret 329; 330; CHECK-GLOBAL-CSSC-LABEL: smax1i64: 331; CHECK-GLOBAL-CSSC: // %bb.0: 332; CHECK-GLOBAL-CSSC-NEXT: fmov x8, d0 333; CHECK-GLOBAL-CSSC-NEXT: fmov x9, d1 334; CHECK-GLOBAL-CSSC-NEXT: smax x8, x8, x9 335; CHECK-GLOBAL-CSSC-NEXT: fmov d0, x8 336; CHECK-GLOBAL-CSSC-NEXT: ret 337 %c = call <1 x i64> @llvm.smax.v1i64(<1 x i64> %a, <1 x i64> %b) 338 ret <1 x i64> %c 339} 340 341declare <2 x i64> @llvm.smax.v2i64(<2 x i64> %a, <2 x i64> %b) readnone 342 343define <2 x i64> @smax2i64(<2 x i64> %a, <2 x i64> %b) { 344; CHECK-LABEL: smax2i64: 345; CHECK: // %bb.0: 346; CHECK-NEXT: cmgt v2.2d, v0.2d, v1.2d 347; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b 348; CHECK-NEXT: ret 349 %c = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %a, <2 x i64> %b) 350 ret <2 x i64> %c 351} 352 353declare <4 x i64> @llvm.smax.v4i64(<4 x i64> %a, <4 x i64> %b) readnone 354 355define void @smax4i64(<4 x i64> %a, <4 x i64> %b, ptr %p) { 356; CHECK-ISEL-LABEL: smax4i64: 357; CHECK-ISEL: // %bb.0: 358; CHECK-ISEL-NEXT: cmgt v4.2d, v1.2d, v3.2d 359; CHECK-ISEL-NEXT: cmgt v5.2d, v0.2d, v2.2d 360; CHECK-ISEL-NEXT: bif v1.16b, v3.16b, v4.16b 361; CHECK-ISEL-NEXT: bif v0.16b, v2.16b, v5.16b 362; CHECK-ISEL-NEXT: stp q0, q1, [x0] 363; CHECK-ISEL-NEXT: ret 364; 365; CHECK-ISEL-CSSC-LABEL: smax4i64: 366; CHECK-ISEL-CSSC: // %bb.0: 367; CHECK-ISEL-CSSC-NEXT: cmgt v4.2d, v1.2d, v3.2d 368; CHECK-ISEL-CSSC-NEXT: cmgt v5.2d, v0.2d, v2.2d 369; CHECK-ISEL-CSSC-NEXT: bif v1.16b, v3.16b, v4.16b 370; CHECK-ISEL-CSSC-NEXT: bif v0.16b, v2.16b, v5.16b 371; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 372; CHECK-ISEL-CSSC-NEXT: ret 373; 374; CHECK-GLOBAL-LABEL: smax4i64: 375; CHECK-GLOBAL: // %bb.0: 376; CHECK-GLOBAL-NEXT: cmgt v4.2d, v0.2d, v2.2d 377; CHECK-GLOBAL-NEXT: cmgt v5.2d, v1.2d, v3.2d 378; CHECK-GLOBAL-NEXT: bif v0.16b, v2.16b, v4.16b 379; CHECK-GLOBAL-NEXT: bif v1.16b, v3.16b, v5.16b 380; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 381; CHECK-GLOBAL-NEXT: ret 382; 383; CHECK-GLOBAL-CSSC-LABEL: smax4i64: 384; CHECK-GLOBAL-CSSC: // %bb.0: 385; CHECK-GLOBAL-CSSC-NEXT: cmgt v4.2d, v0.2d, v2.2d 386; CHECK-GLOBAL-CSSC-NEXT: cmgt v5.2d, v1.2d, v3.2d 387; CHECK-GLOBAL-CSSC-NEXT: bif v0.16b, v2.16b, v4.16b 388; CHECK-GLOBAL-CSSC-NEXT: bif v1.16b, v3.16b, v5.16b 389; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 390; CHECK-GLOBAL-CSSC-NEXT: ret 391 %c = call <4 x i64> @llvm.smax.v4i64(<4 x i64> %a, <4 x i64> %b) 392 store <4 x i64> %c, ptr %p 393 ret void 394} 395 396declare i8 @llvm.umax.i8(i8 %a, i8 %b) readnone 397 398define i8 @umaxi8(i8 %a, i8 %b) { 399; CHECK-ISEL-LABEL: umaxi8: 400; CHECK-ISEL: // %bb.0: 401; CHECK-ISEL-NEXT: and w8, w1, #0xff 402; CHECK-ISEL-NEXT: and w9, w0, #0xff 403; CHECK-ISEL-NEXT: cmp w9, w8 404; CHECK-ISEL-NEXT: csel w0, w9, w8, hi 405; CHECK-ISEL-NEXT: ret 406; 407; CHECK-ISEL-CSSC-LABEL: umaxi8: 408; CHECK-ISEL-CSSC: // %bb.0: 409; CHECK-ISEL-CSSC-NEXT: and w8, w1, #0xff 410; CHECK-ISEL-CSSC-NEXT: and w9, w0, #0xff 411; CHECK-ISEL-CSSC-NEXT: umax w0, w9, w8 412; CHECK-ISEL-CSSC-NEXT: ret 413; 414; CHECK-GLOBAL-LABEL: umaxi8: 415; CHECK-GLOBAL: // %bb.0: 416; CHECK-GLOBAL-NEXT: and w8, w0, #0xff 417; CHECK-GLOBAL-NEXT: cmp w8, w1, uxtb 418; CHECK-GLOBAL-NEXT: csel w0, w0, w1, hi 419; CHECK-GLOBAL-NEXT: ret 420; 421; CHECK-GLOBAL-CSSC-LABEL: umaxi8: 422; CHECK-GLOBAL-CSSC: // %bb.0: 423; CHECK-GLOBAL-CSSC-NEXT: and w8, w0, #0xff 424; CHECK-GLOBAL-CSSC-NEXT: and w9, w1, #0xff 425; CHECK-GLOBAL-CSSC-NEXT: umax w0, w8, w9 426; CHECK-GLOBAL-CSSC-NEXT: ret 427 %c = call i8 @llvm.umax.i8(i8 %a, i8 %b) 428 ret i8 %c 429} 430 431define i8 @umaxi8_1(i8 %a) { 432; CHECK-ISEL-LABEL: umaxi8_1: 433; CHECK-ISEL: // %bb.0: 434; CHECK-ISEL-NEXT: and w8, w0, #0xff 435; CHECK-ISEL-NEXT: tst w0, #0xfe 436; CHECK-ISEL-NEXT: csinc w0, w8, wzr, ne 437; CHECK-ISEL-NEXT: ret 438; 439; CHECK-ISEL-CSSC-LABEL: umaxi8_1: 440; CHECK-ISEL-CSSC: // %bb.0: 441; CHECK-ISEL-CSSC-NEXT: and w8, w0, #0xff 442; CHECK-ISEL-CSSC-NEXT: umax w0, w8, #1 443; CHECK-ISEL-CSSC-NEXT: ret 444; 445; CHECK-GLOBAL-LABEL: umaxi8_1: 446; CHECK-GLOBAL: // %bb.0: 447; CHECK-GLOBAL-NEXT: and w8, w0, #0xff 448; CHECK-GLOBAL-NEXT: cmp w8, #1 449; CHECK-GLOBAL-NEXT: csinc w0, w0, wzr, hi 450; CHECK-GLOBAL-NEXT: ret 451; 452; CHECK-GLOBAL-CSSC-LABEL: umaxi8_1: 453; CHECK-GLOBAL-CSSC: // %bb.0: 454; CHECK-GLOBAL-CSSC-NEXT: and w8, w0, #0xff 455; CHECK-GLOBAL-CSSC-NEXT: umax w0, w8, #1 456; CHECK-GLOBAL-CSSC-NEXT: ret 457 %c = call i8 @llvm.umax.i8(i8 %a, i8 1) 458 ret i8 %c 459} 460 461declare i16 @llvm.umax.i16(i16 %a, i16 %b) readnone 462 463define i16 @umaxi16(i16 %a, i16 %b) { 464; CHECK-ISEL-LABEL: umaxi16: 465; CHECK-ISEL: // %bb.0: 466; CHECK-ISEL-NEXT: and w8, w1, #0xffff 467; CHECK-ISEL-NEXT: and w9, w0, #0xffff 468; CHECK-ISEL-NEXT: cmp w9, w8 469; CHECK-ISEL-NEXT: csel w0, w9, w8, hi 470; CHECK-ISEL-NEXT: ret 471; 472; CHECK-ISEL-CSSC-LABEL: umaxi16: 473; CHECK-ISEL-CSSC: // %bb.0: 474; CHECK-ISEL-CSSC-NEXT: and w8, w1, #0xffff 475; CHECK-ISEL-CSSC-NEXT: and w9, w0, #0xffff 476; CHECK-ISEL-CSSC-NEXT: umax w0, w9, w8 477; CHECK-ISEL-CSSC-NEXT: ret 478; 479; CHECK-GLOBAL-LABEL: umaxi16: 480; CHECK-GLOBAL: // %bb.0: 481; CHECK-GLOBAL-NEXT: and w8, w0, #0xffff 482; CHECK-GLOBAL-NEXT: cmp w8, w1, uxth 483; CHECK-GLOBAL-NEXT: csel w0, w0, w1, hi 484; CHECK-GLOBAL-NEXT: ret 485; 486; CHECK-GLOBAL-CSSC-LABEL: umaxi16: 487; CHECK-GLOBAL-CSSC: // %bb.0: 488; CHECK-GLOBAL-CSSC-NEXT: and w8, w0, #0xffff 489; CHECK-GLOBAL-CSSC-NEXT: and w9, w1, #0xffff 490; CHECK-GLOBAL-CSSC-NEXT: umax w0, w8, w9 491; CHECK-GLOBAL-CSSC-NEXT: ret 492 %c = call i16 @llvm.umax.i16(i16 %a, i16 %b) 493 ret i16 %c 494} 495 496define i16 @umaxi16_1(i16 %a) { 497; CHECK-ISEL-LABEL: umaxi16_1: 498; CHECK-ISEL: // %bb.0: 499; CHECK-ISEL-NEXT: and w8, w0, #0xffff 500; CHECK-ISEL-NEXT: tst w0, #0xfffe 501; CHECK-ISEL-NEXT: csinc w0, w8, wzr, ne 502; CHECK-ISEL-NEXT: ret 503; 504; CHECK-ISEL-CSSC-LABEL: umaxi16_1: 505; CHECK-ISEL-CSSC: // %bb.0: 506; CHECK-ISEL-CSSC-NEXT: and w8, w0, #0xffff 507; CHECK-ISEL-CSSC-NEXT: umax w0, w8, #1 508; CHECK-ISEL-CSSC-NEXT: ret 509; 510; CHECK-GLOBAL-LABEL: umaxi16_1: 511; CHECK-GLOBAL: // %bb.0: 512; CHECK-GLOBAL-NEXT: and w8, w0, #0xffff 513; CHECK-GLOBAL-NEXT: cmp w8, #1 514; CHECK-GLOBAL-NEXT: csinc w0, w0, wzr, hi 515; CHECK-GLOBAL-NEXT: ret 516; 517; CHECK-GLOBAL-CSSC-LABEL: umaxi16_1: 518; CHECK-GLOBAL-CSSC: // %bb.0: 519; CHECK-GLOBAL-CSSC-NEXT: and w8, w0, #0xffff 520; CHECK-GLOBAL-CSSC-NEXT: umax w0, w8, #1 521; CHECK-GLOBAL-CSSC-NEXT: ret 522 %c = call i16 @llvm.umax.i16(i16 %a, i16 1) 523 ret i16 %c 524} 525 526declare i32 @llvm.umax.i32(i32 %a, i32 %b) readnone 527 528define i32 @umaxi32(i32 %a, i32 %b) { 529; CHECK-ISEL-LABEL: umaxi32: 530; CHECK-ISEL: // %bb.0: 531; CHECK-ISEL-NEXT: cmp w0, w1 532; CHECK-ISEL-NEXT: csel w0, w0, w1, hi 533; CHECK-ISEL-NEXT: ret 534; 535; CHECK-ISEL-CSSC-LABEL: umaxi32: 536; CHECK-ISEL-CSSC: // %bb.0: 537; CHECK-ISEL-CSSC-NEXT: umax w0, w0, w1 538; CHECK-ISEL-CSSC-NEXT: ret 539; 540; CHECK-GLOBAL-LABEL: umaxi32: 541; CHECK-GLOBAL: // %bb.0: 542; CHECK-GLOBAL-NEXT: cmp w0, w1 543; CHECK-GLOBAL-NEXT: csel w0, w0, w1, hi 544; CHECK-GLOBAL-NEXT: ret 545; 546; CHECK-GLOBAL-CSSC-LABEL: umaxi32: 547; CHECK-GLOBAL-CSSC: // %bb.0: 548; CHECK-GLOBAL-CSSC-NEXT: umax w0, w0, w1 549; CHECK-GLOBAL-CSSC-NEXT: ret 550 %c = call i32 @llvm.umax.i32(i32 %a, i32 %b) 551 ret i32 %c 552} 553 554define i32 @umaxi32_1(i32 %a) { 555; CHECK-ISEL-LABEL: umaxi32_1: 556; CHECK-ISEL: // %bb.0: 557; CHECK-ISEL-NEXT: cmp w0, #1 558; CHECK-ISEL-NEXT: csinc w0, w0, wzr, hi 559; CHECK-ISEL-NEXT: ret 560; 561; CHECK-ISEL-CSSC-LABEL: umaxi32_1: 562; CHECK-ISEL-CSSC: // %bb.0: 563; CHECK-ISEL-CSSC-NEXT: umax w0, w0, #1 564; CHECK-ISEL-CSSC-NEXT: ret 565; 566; CHECK-GLOBAL-LABEL: umaxi32_1: 567; CHECK-GLOBAL: // %bb.0: 568; CHECK-GLOBAL-NEXT: cmp w0, #1 569; CHECK-GLOBAL-NEXT: csinc w0, w0, wzr, hi 570; CHECK-GLOBAL-NEXT: ret 571; 572; CHECK-GLOBAL-CSSC-LABEL: umaxi32_1: 573; CHECK-GLOBAL-CSSC: // %bb.0: 574; CHECK-GLOBAL-CSSC-NEXT: umax w0, w0, #1 575; CHECK-GLOBAL-CSSC-NEXT: ret 576 %c = call i32 @llvm.umax.i32(i32 %a, i32 1) 577 ret i32 %c 578} 579 580declare i64 @llvm.umax.i64(i64 %a, i64 %b) readnone 581 582define i64 @umaxi64(i64 %a, i64 %b) { 583; CHECK-ISEL-LABEL: umaxi64: 584; CHECK-ISEL: // %bb.0: 585; CHECK-ISEL-NEXT: cmp x0, x1 586; CHECK-ISEL-NEXT: csel x0, x0, x1, hi 587; CHECK-ISEL-NEXT: ret 588; 589; CHECK-ISEL-CSSC-LABEL: umaxi64: 590; CHECK-ISEL-CSSC: // %bb.0: 591; CHECK-ISEL-CSSC-NEXT: umax x0, x0, x1 592; CHECK-ISEL-CSSC-NEXT: ret 593; 594; CHECK-GLOBAL-LABEL: umaxi64: 595; CHECK-GLOBAL: // %bb.0: 596; CHECK-GLOBAL-NEXT: cmp x0, x1 597; CHECK-GLOBAL-NEXT: csel x0, x0, x1, hi 598; CHECK-GLOBAL-NEXT: ret 599; 600; CHECK-GLOBAL-CSSC-LABEL: umaxi64: 601; CHECK-GLOBAL-CSSC: // %bb.0: 602; CHECK-GLOBAL-CSSC-NEXT: umax x0, x0, x1 603; CHECK-GLOBAL-CSSC-NEXT: ret 604 %c = call i64 @llvm.umax.i64(i64 %a, i64 %b) 605 ret i64 %c 606} 607 608define i64 @umaxi64_1(i64 %a) { 609; CHECK-ISEL-LABEL: umaxi64_1: 610; CHECK-ISEL: // %bb.0: 611; CHECK-ISEL-NEXT: cmp x0, #1 612; CHECK-ISEL-NEXT: csinc x0, x0, xzr, hi 613; CHECK-ISEL-NEXT: ret 614; 615; CHECK-ISEL-CSSC-LABEL: umaxi64_1: 616; CHECK-ISEL-CSSC: // %bb.0: 617; CHECK-ISEL-CSSC-NEXT: umax x0, x0, #1 618; CHECK-ISEL-CSSC-NEXT: ret 619; 620; CHECK-GLOBAL-LABEL: umaxi64_1: 621; CHECK-GLOBAL: // %bb.0: 622; CHECK-GLOBAL-NEXT: cmp x0, #1 623; CHECK-GLOBAL-NEXT: csinc x0, x0, xzr, hi 624; CHECK-GLOBAL-NEXT: ret 625; 626; CHECK-GLOBAL-CSSC-LABEL: umaxi64_1: 627; CHECK-GLOBAL-CSSC: // %bb.0: 628; CHECK-GLOBAL-CSSC-NEXT: umax x0, x0, #1 629; CHECK-GLOBAL-CSSC-NEXT: ret 630 %c = call i64 @llvm.umax.i64(i64 %a, i64 1) 631 ret i64 %c 632} 633 634declare <8 x i8> @llvm.umax.v8i8(<8 x i8> %a, <8 x i8> %b) readnone 635 636define <8 x i8> @umax8i8(<8 x i8> %a, <8 x i8> %b) { 637; CHECK-LABEL: umax8i8: 638; CHECK: // %bb.0: 639; CHECK-NEXT: umax v0.8b, v0.8b, v1.8b 640; CHECK-NEXT: ret 641 %c = call <8 x i8> @llvm.umax.v8i8(<8 x i8> %a, <8 x i8> %b) 642 ret <8 x i8> %c 643} 644 645declare <16 x i8> @llvm.umax.v16i8(<16 x i8> %a, <16 x i8> %b) readnone 646 647define <16 x i8> @umax16i8(<16 x i8> %a, <16 x i8> %b) { 648; CHECK-LABEL: umax16i8: 649; CHECK: // %bb.0: 650; CHECK-NEXT: umax v0.16b, v0.16b, v1.16b 651; CHECK-NEXT: ret 652 %c = call <16 x i8> @llvm.umax.v16i8(<16 x i8> %a, <16 x i8> %b) 653 ret <16 x i8> %c 654} 655 656declare <32 x i8> @llvm.umax.v32i8(<32 x i8> %a, <32 x i8> %b) readnone 657 658define void @umax32i8(<32 x i8> %a, <32 x i8> %b, ptr %p) { 659; CHECK-ISEL-LABEL: umax32i8: 660; CHECK-ISEL: // %bb.0: 661; CHECK-ISEL-NEXT: umax v1.16b, v1.16b, v3.16b 662; CHECK-ISEL-NEXT: umax v0.16b, v0.16b, v2.16b 663; CHECK-ISEL-NEXT: stp q0, q1, [x0] 664; CHECK-ISEL-NEXT: ret 665; 666; CHECK-ISEL-CSSC-LABEL: umax32i8: 667; CHECK-ISEL-CSSC: // %bb.0: 668; CHECK-ISEL-CSSC-NEXT: umax v1.16b, v1.16b, v3.16b 669; CHECK-ISEL-CSSC-NEXT: umax v0.16b, v0.16b, v2.16b 670; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 671; CHECK-ISEL-CSSC-NEXT: ret 672; 673; CHECK-GLOBAL-LABEL: umax32i8: 674; CHECK-GLOBAL: // %bb.0: 675; CHECK-GLOBAL-NEXT: umax v0.16b, v0.16b, v2.16b 676; CHECK-GLOBAL-NEXT: umax v1.16b, v1.16b, v3.16b 677; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 678; CHECK-GLOBAL-NEXT: ret 679; 680; CHECK-GLOBAL-CSSC-LABEL: umax32i8: 681; CHECK-GLOBAL-CSSC: // %bb.0: 682; CHECK-GLOBAL-CSSC-NEXT: umax v0.16b, v0.16b, v2.16b 683; CHECK-GLOBAL-CSSC-NEXT: umax v1.16b, v1.16b, v3.16b 684; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 685; CHECK-GLOBAL-CSSC-NEXT: ret 686 %c = call <32 x i8> @llvm.umax.v32i8(<32 x i8> %a, <32 x i8> %b) 687 store <32 x i8> %c, ptr %p 688 ret void 689} 690 691declare <4 x i16> @llvm.umax.v4i16(<4 x i16> %a, <4 x i16> %b) readnone 692 693define <4 x i16> @umax4i16(<4 x i16> %a, <4 x i16> %b) { 694; CHECK-LABEL: umax4i16: 695; CHECK: // %bb.0: 696; CHECK-NEXT: umax v0.4h, v0.4h, v1.4h 697; CHECK-NEXT: ret 698 %c = call <4 x i16> @llvm.umax.v4i16(<4 x i16> %a, <4 x i16> %b) 699 ret <4 x i16> %c 700} 701 702declare <8 x i16> @llvm.umax.v8i16(<8 x i16> %a, <8 x i16> %b) readnone 703 704define <8 x i16> @umax8i16(<8 x i16> %a, <8 x i16> %b) { 705; CHECK-LABEL: umax8i16: 706; CHECK: // %bb.0: 707; CHECK-NEXT: umax v0.8h, v0.8h, v1.8h 708; CHECK-NEXT: ret 709 %c = call <8 x i16> @llvm.umax.v8i16(<8 x i16> %a, <8 x i16> %b) 710 ret <8 x i16> %c 711} 712 713declare <16 x i16> @llvm.umax.v16i16(<16 x i16> %a, <16 x i16> %b) readnone 714 715define void @umax16i16(<16 x i16> %a, <16 x i16> %b, ptr %p) { 716; CHECK-ISEL-LABEL: umax16i16: 717; CHECK-ISEL: // %bb.0: 718; CHECK-ISEL-NEXT: umax v1.8h, v1.8h, v3.8h 719; CHECK-ISEL-NEXT: umax v0.8h, v0.8h, v2.8h 720; CHECK-ISEL-NEXT: stp q0, q1, [x0] 721; CHECK-ISEL-NEXT: ret 722; 723; CHECK-ISEL-CSSC-LABEL: umax16i16: 724; CHECK-ISEL-CSSC: // %bb.0: 725; CHECK-ISEL-CSSC-NEXT: umax v1.8h, v1.8h, v3.8h 726; CHECK-ISEL-CSSC-NEXT: umax v0.8h, v0.8h, v2.8h 727; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 728; CHECK-ISEL-CSSC-NEXT: ret 729; 730; CHECK-GLOBAL-LABEL: umax16i16: 731; CHECK-GLOBAL: // %bb.0: 732; CHECK-GLOBAL-NEXT: umax v0.8h, v0.8h, v2.8h 733; CHECK-GLOBAL-NEXT: umax v1.8h, v1.8h, v3.8h 734; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 735; CHECK-GLOBAL-NEXT: ret 736; 737; CHECK-GLOBAL-CSSC-LABEL: umax16i16: 738; CHECK-GLOBAL-CSSC: // %bb.0: 739; CHECK-GLOBAL-CSSC-NEXT: umax v0.8h, v0.8h, v2.8h 740; CHECK-GLOBAL-CSSC-NEXT: umax v1.8h, v1.8h, v3.8h 741; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 742; CHECK-GLOBAL-CSSC-NEXT: ret 743 %c = call <16 x i16> @llvm.umax.v16i16(<16 x i16> %a, <16 x i16> %b) 744 store <16 x i16> %c, ptr %p 745 ret void 746} 747 748declare <2 x i32> @llvm.umax.v2i32(<2 x i32> %a, <2 x i32> %b) readnone 749 750define <2 x i32> @umax2i32(<2 x i32> %a, <2 x i32> %b) { 751; CHECK-LABEL: umax2i32: 752; CHECK: // %bb.0: 753; CHECK-NEXT: umax v0.2s, v0.2s, v1.2s 754; CHECK-NEXT: ret 755 %c = call <2 x i32> @llvm.umax.v2i32(<2 x i32> %a, <2 x i32> %b) 756 ret <2 x i32> %c 757} 758 759declare <4 x i32> @llvm.umax.v4i32(<4 x i32> %a, <4 x i32> %b) readnone 760 761define <4 x i32> @umax4i32(<4 x i32> %a, <4 x i32> %b) { 762; CHECK-LABEL: umax4i32: 763; CHECK: // %bb.0: 764; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s 765; CHECK-NEXT: ret 766 %c = call <4 x i32> @llvm.umax.v4i32(<4 x i32> %a, <4 x i32> %b) 767 ret <4 x i32> %c 768} 769 770declare <8 x i32> @llvm.umax.v8i32(<8 x i32> %a, <8 x i32> %b) readnone 771 772define void @umax8i32(<8 x i32> %a, <8 x i32> %b, ptr %p) { 773; CHECK-ISEL-LABEL: umax8i32: 774; CHECK-ISEL: // %bb.0: 775; CHECK-ISEL-NEXT: umax v1.4s, v1.4s, v3.4s 776; CHECK-ISEL-NEXT: umax v0.4s, v0.4s, v2.4s 777; CHECK-ISEL-NEXT: stp q0, q1, [x0] 778; CHECK-ISEL-NEXT: ret 779; 780; CHECK-ISEL-CSSC-LABEL: umax8i32: 781; CHECK-ISEL-CSSC: // %bb.0: 782; CHECK-ISEL-CSSC-NEXT: umax v1.4s, v1.4s, v3.4s 783; CHECK-ISEL-CSSC-NEXT: umax v0.4s, v0.4s, v2.4s 784; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 785; CHECK-ISEL-CSSC-NEXT: ret 786; 787; CHECK-GLOBAL-LABEL: umax8i32: 788; CHECK-GLOBAL: // %bb.0: 789; CHECK-GLOBAL-NEXT: umax v0.4s, v0.4s, v2.4s 790; CHECK-GLOBAL-NEXT: umax v1.4s, v1.4s, v3.4s 791; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 792; CHECK-GLOBAL-NEXT: ret 793; 794; CHECK-GLOBAL-CSSC-LABEL: umax8i32: 795; CHECK-GLOBAL-CSSC: // %bb.0: 796; CHECK-GLOBAL-CSSC-NEXT: umax v0.4s, v0.4s, v2.4s 797; CHECK-GLOBAL-CSSC-NEXT: umax v1.4s, v1.4s, v3.4s 798; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 799; CHECK-GLOBAL-CSSC-NEXT: ret 800 %c = call <8 x i32>@llvm.umax.v8i32(<8 x i32> %a, <8 x i32> %b) 801 store <8 x i32> %c, ptr %p 802 ret void 803} 804 805declare <1 x i64> @llvm.umax.v1i64(<1 x i64> %a, <1 x i64> %b) readnone 806 807define <1 x i64> @umax1i64(<1 x i64> %a, <1 x i64> %b) { 808; CHECK-ISEL-LABEL: umax1i64: 809; CHECK-ISEL: // %bb.0: 810; CHECK-ISEL-NEXT: cmhi d2, d0, d1 811; CHECK-ISEL-NEXT: bif v0.8b, v1.8b, v2.8b 812; CHECK-ISEL-NEXT: ret 813; 814; CHECK-ISEL-CSSC-LABEL: umax1i64: 815; CHECK-ISEL-CSSC: // %bb.0: 816; CHECK-ISEL-CSSC-NEXT: cmhi d2, d0, d1 817; CHECK-ISEL-CSSC-NEXT: bif v0.8b, v1.8b, v2.8b 818; CHECK-ISEL-CSSC-NEXT: ret 819; 820; CHECK-GLOBAL-LABEL: umax1i64: 821; CHECK-GLOBAL: // %bb.0: 822; CHECK-GLOBAL-NEXT: fmov x8, d0 823; CHECK-GLOBAL-NEXT: fmov x9, d1 824; CHECK-GLOBAL-NEXT: cmp x8, x9 825; CHECK-GLOBAL-NEXT: fcsel d0, d0, d1, hi 826; CHECK-GLOBAL-NEXT: ret 827; 828; CHECK-GLOBAL-CSSC-LABEL: umax1i64: 829; CHECK-GLOBAL-CSSC: // %bb.0: 830; CHECK-GLOBAL-CSSC-NEXT: fmov x8, d0 831; CHECK-GLOBAL-CSSC-NEXT: fmov x9, d1 832; CHECK-GLOBAL-CSSC-NEXT: umax x8, x8, x9 833; CHECK-GLOBAL-CSSC-NEXT: fmov d0, x8 834; CHECK-GLOBAL-CSSC-NEXT: ret 835 %c = call <1 x i64> @llvm.umax.v1i64(<1 x i64> %a, <1 x i64> %b) 836 ret <1 x i64> %c 837} 838 839declare <2 x i64> @llvm.umax.v2i64(<2 x i64> %a, <2 x i64> %b) readnone 840 841define <2 x i64> @umax2i64(<2 x i64> %a, <2 x i64> %b) { 842; CHECK-LABEL: umax2i64: 843; CHECK: // %bb.0: 844; CHECK-NEXT: cmhi v2.2d, v0.2d, v1.2d 845; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b 846; CHECK-NEXT: ret 847 %c = call <2 x i64> @llvm.umax.v2i64(<2 x i64> %a, <2 x i64> %b) 848 ret <2 x i64> %c 849} 850 851declare <4 x i64> @llvm.umax.v4i64(<4 x i64> %a, <4 x i64> %b) readnone 852 853define void @umax4i64(<4 x i64> %a, <4 x i64> %b, ptr %p) { 854; CHECK-ISEL-LABEL: umax4i64: 855; CHECK-ISEL: // %bb.0: 856; CHECK-ISEL-NEXT: cmhi v4.2d, v1.2d, v3.2d 857; CHECK-ISEL-NEXT: cmhi v5.2d, v0.2d, v2.2d 858; CHECK-ISEL-NEXT: bif v1.16b, v3.16b, v4.16b 859; CHECK-ISEL-NEXT: bif v0.16b, v2.16b, v5.16b 860; CHECK-ISEL-NEXT: stp q0, q1, [x0] 861; CHECK-ISEL-NEXT: ret 862; 863; CHECK-ISEL-CSSC-LABEL: umax4i64: 864; CHECK-ISEL-CSSC: // %bb.0: 865; CHECK-ISEL-CSSC-NEXT: cmhi v4.2d, v1.2d, v3.2d 866; CHECK-ISEL-CSSC-NEXT: cmhi v5.2d, v0.2d, v2.2d 867; CHECK-ISEL-CSSC-NEXT: bif v1.16b, v3.16b, v4.16b 868; CHECK-ISEL-CSSC-NEXT: bif v0.16b, v2.16b, v5.16b 869; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 870; CHECK-ISEL-CSSC-NEXT: ret 871; 872; CHECK-GLOBAL-LABEL: umax4i64: 873; CHECK-GLOBAL: // %bb.0: 874; CHECK-GLOBAL-NEXT: cmhi v4.2d, v0.2d, v2.2d 875; CHECK-GLOBAL-NEXT: cmhi v5.2d, v1.2d, v3.2d 876; CHECK-GLOBAL-NEXT: bif v0.16b, v2.16b, v4.16b 877; CHECK-GLOBAL-NEXT: bif v1.16b, v3.16b, v5.16b 878; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 879; CHECK-GLOBAL-NEXT: ret 880; 881; CHECK-GLOBAL-CSSC-LABEL: umax4i64: 882; CHECK-GLOBAL-CSSC: // %bb.0: 883; CHECK-GLOBAL-CSSC-NEXT: cmhi v4.2d, v0.2d, v2.2d 884; CHECK-GLOBAL-CSSC-NEXT: cmhi v5.2d, v1.2d, v3.2d 885; CHECK-GLOBAL-CSSC-NEXT: bif v0.16b, v2.16b, v4.16b 886; CHECK-GLOBAL-CSSC-NEXT: bif v1.16b, v3.16b, v5.16b 887; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 888; CHECK-GLOBAL-CSSC-NEXT: ret 889 %c = call <4 x i64> @llvm.umax.v4i64(<4 x i64> %a, <4 x i64> %b) 890 store <4 x i64> %c, ptr %p 891 ret void 892} 893 894declare i8 @llvm.smin.i8(i8 %a, i8 %b) readnone 895 896define i8 @smini8(i8 %a, i8 %b) { 897; CHECK-ISEL-LABEL: smini8: 898; CHECK-ISEL: // %bb.0: 899; CHECK-ISEL-NEXT: sxtb w8, w1 900; CHECK-ISEL-NEXT: sxtb w9, w0 901; CHECK-ISEL-NEXT: cmp w9, w8 902; CHECK-ISEL-NEXT: csel w0, w9, w8, lt 903; CHECK-ISEL-NEXT: ret 904; 905; CHECK-ISEL-CSSC-LABEL: smini8: 906; CHECK-ISEL-CSSC: // %bb.0: 907; CHECK-ISEL-CSSC-NEXT: sxtb w8, w1 908; CHECK-ISEL-CSSC-NEXT: sxtb w9, w0 909; CHECK-ISEL-CSSC-NEXT: smin w0, w9, w8 910; CHECK-ISEL-CSSC-NEXT: ret 911; 912; CHECK-GLOBAL-LABEL: smini8: 913; CHECK-GLOBAL: // %bb.0: 914; CHECK-GLOBAL-NEXT: sxtb w8, w0 915; CHECK-GLOBAL-NEXT: cmp w8, w1, sxtb 916; CHECK-GLOBAL-NEXT: csel w0, w0, w1, lt 917; CHECK-GLOBAL-NEXT: ret 918; 919; CHECK-GLOBAL-CSSC-LABEL: smini8: 920; CHECK-GLOBAL-CSSC: // %bb.0: 921; CHECK-GLOBAL-CSSC-NEXT: sxtb w8, w0 922; CHECK-GLOBAL-CSSC-NEXT: sxtb w9, w1 923; CHECK-GLOBAL-CSSC-NEXT: smin w0, w8, w9 924; CHECK-GLOBAL-CSSC-NEXT: ret 925 %c = call i8 @llvm.smin.i8(i8 %a, i8 %b) 926 ret i8 %c 927} 928 929declare i16 @llvm.smin.i16(i16 %a, i16 %b) readnone 930 931define i16 @smini16(i16 %a, i16 %b) { 932; CHECK-ISEL-LABEL: smini16: 933; CHECK-ISEL: // %bb.0: 934; CHECK-ISEL-NEXT: sxth w8, w1 935; CHECK-ISEL-NEXT: sxth w9, w0 936; CHECK-ISEL-NEXT: cmp w9, w8 937; CHECK-ISEL-NEXT: csel w0, w9, w8, lt 938; CHECK-ISEL-NEXT: ret 939; 940; CHECK-ISEL-CSSC-LABEL: smini16: 941; CHECK-ISEL-CSSC: // %bb.0: 942; CHECK-ISEL-CSSC-NEXT: sxth w8, w1 943; CHECK-ISEL-CSSC-NEXT: sxth w9, w0 944; CHECK-ISEL-CSSC-NEXT: smin w0, w9, w8 945; CHECK-ISEL-CSSC-NEXT: ret 946; 947; CHECK-GLOBAL-LABEL: smini16: 948; CHECK-GLOBAL: // %bb.0: 949; CHECK-GLOBAL-NEXT: sxth w8, w0 950; CHECK-GLOBAL-NEXT: cmp w8, w1, sxth 951; CHECK-GLOBAL-NEXT: csel w0, w0, w1, lt 952; CHECK-GLOBAL-NEXT: ret 953; 954; CHECK-GLOBAL-CSSC-LABEL: smini16: 955; CHECK-GLOBAL-CSSC: // %bb.0: 956; CHECK-GLOBAL-CSSC-NEXT: sxth w8, w0 957; CHECK-GLOBAL-CSSC-NEXT: sxth w9, w1 958; CHECK-GLOBAL-CSSC-NEXT: smin w0, w8, w9 959; CHECK-GLOBAL-CSSC-NEXT: ret 960 %c = call i16 @llvm.smin.i16(i16 %a, i16 %b) 961 ret i16 %c 962} 963 964declare i32 @llvm.smin.i32(i32 %a, i32 %b) readnone 965 966define i32 @smini32(i32 %a, i32 %b) { 967; CHECK-ISEL-LABEL: smini32: 968; CHECK-ISEL: // %bb.0: 969; CHECK-ISEL-NEXT: cmp w0, w1 970; CHECK-ISEL-NEXT: csel w0, w0, w1, lt 971; CHECK-ISEL-NEXT: ret 972; 973; CHECK-ISEL-CSSC-LABEL: smini32: 974; CHECK-ISEL-CSSC: // %bb.0: 975; CHECK-ISEL-CSSC-NEXT: smin w0, w0, w1 976; CHECK-ISEL-CSSC-NEXT: ret 977; 978; CHECK-GLOBAL-LABEL: smini32: 979; CHECK-GLOBAL: // %bb.0: 980; CHECK-GLOBAL-NEXT: cmp w0, w1 981; CHECK-GLOBAL-NEXT: csel w0, w0, w1, lt 982; CHECK-GLOBAL-NEXT: ret 983; 984; CHECK-GLOBAL-CSSC-LABEL: smini32: 985; CHECK-GLOBAL-CSSC: // %bb.0: 986; CHECK-GLOBAL-CSSC-NEXT: smin w0, w0, w1 987; CHECK-GLOBAL-CSSC-NEXT: ret 988 %c = call i32 @llvm.smin.i32(i32 %a, i32 %b) 989 ret i32 %c 990} 991 992declare i64 @llvm.smin.i64(i64 %a, i64 %b) readnone 993 994define i64 @smini64(i64 %a, i64 %b) { 995; CHECK-ISEL-LABEL: smini64: 996; CHECK-ISEL: // %bb.0: 997; CHECK-ISEL-NEXT: cmp x0, x1 998; CHECK-ISEL-NEXT: csel x0, x0, x1, lt 999; CHECK-ISEL-NEXT: ret 1000; 1001; CHECK-ISEL-CSSC-LABEL: smini64: 1002; CHECK-ISEL-CSSC: // %bb.0: 1003; CHECK-ISEL-CSSC-NEXT: smin x0, x0, x1 1004; CHECK-ISEL-CSSC-NEXT: ret 1005; 1006; CHECK-GLOBAL-LABEL: smini64: 1007; CHECK-GLOBAL: // %bb.0: 1008; CHECK-GLOBAL-NEXT: cmp x0, x1 1009; CHECK-GLOBAL-NEXT: csel x0, x0, x1, lt 1010; CHECK-GLOBAL-NEXT: ret 1011; 1012; CHECK-GLOBAL-CSSC-LABEL: smini64: 1013; CHECK-GLOBAL-CSSC: // %bb.0: 1014; CHECK-GLOBAL-CSSC-NEXT: smin x0, x0, x1 1015; CHECK-GLOBAL-CSSC-NEXT: ret 1016 %c = call i64 @llvm.smin.i64(i64 %a, i64 %b) 1017 ret i64 %c 1018} 1019 1020declare <8 x i8> @llvm.smin.v8i8(<8 x i8> %a, <8 x i8> %b) readnone 1021 1022define <8 x i8> @smin8i8(<8 x i8> %a, <8 x i8> %b) { 1023; CHECK-LABEL: smin8i8: 1024; CHECK: // %bb.0: 1025; CHECK-NEXT: smin v0.8b, v0.8b, v1.8b 1026; CHECK-NEXT: ret 1027 %c = call <8 x i8> @llvm.smin.v8i8(<8 x i8> %a, <8 x i8> %b) 1028 ret <8 x i8> %c 1029} 1030 1031declare <16 x i8> @llvm.smin.v16i8(<16 x i8> %a, <16 x i8> %b) readnone 1032 1033define <16 x i8> @smin16i8(<16 x i8> %a, <16 x i8> %b) { 1034; CHECK-LABEL: smin16i8: 1035; CHECK: // %bb.0: 1036; CHECK-NEXT: smin v0.16b, v0.16b, v1.16b 1037; CHECK-NEXT: ret 1038 %c = call <16 x i8> @llvm.smin.v16i8(<16 x i8> %a, <16 x i8> %b) 1039 ret <16 x i8> %c 1040} 1041 1042declare <32 x i8> @llvm.smin.v32i8(<32 x i8> %a, <32 x i8> %b) readnone 1043 1044define void @smin32i8(<32 x i8> %a, <32 x i8> %b, ptr %p) { 1045; CHECK-ISEL-LABEL: smin32i8: 1046; CHECK-ISEL: // %bb.0: 1047; CHECK-ISEL-NEXT: smin v1.16b, v1.16b, v3.16b 1048; CHECK-ISEL-NEXT: smin v0.16b, v0.16b, v2.16b 1049; CHECK-ISEL-NEXT: stp q0, q1, [x0] 1050; CHECK-ISEL-NEXT: ret 1051; 1052; CHECK-ISEL-CSSC-LABEL: smin32i8: 1053; CHECK-ISEL-CSSC: // %bb.0: 1054; CHECK-ISEL-CSSC-NEXT: smin v1.16b, v1.16b, v3.16b 1055; CHECK-ISEL-CSSC-NEXT: smin v0.16b, v0.16b, v2.16b 1056; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 1057; CHECK-ISEL-CSSC-NEXT: ret 1058; 1059; CHECK-GLOBAL-LABEL: smin32i8: 1060; CHECK-GLOBAL: // %bb.0: 1061; CHECK-GLOBAL-NEXT: smin v0.16b, v0.16b, v2.16b 1062; CHECK-GLOBAL-NEXT: smin v1.16b, v1.16b, v3.16b 1063; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 1064; CHECK-GLOBAL-NEXT: ret 1065; 1066; CHECK-GLOBAL-CSSC-LABEL: smin32i8: 1067; CHECK-GLOBAL-CSSC: // %bb.0: 1068; CHECK-GLOBAL-CSSC-NEXT: smin v0.16b, v0.16b, v2.16b 1069; CHECK-GLOBAL-CSSC-NEXT: smin v1.16b, v1.16b, v3.16b 1070; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 1071; CHECK-GLOBAL-CSSC-NEXT: ret 1072 %c = call <32 x i8> @llvm.smin.v32i8(<32 x i8> %a, <32 x i8> %b) 1073 store <32 x i8> %c, ptr %p 1074 ret void 1075} 1076 1077declare <4 x i16> @llvm.smin.v4i16(<4 x i16> %a, <4 x i16> %b) readnone 1078 1079define <4 x i16> @smin4i16(<4 x i16> %a, <4 x i16> %b) { 1080; CHECK-LABEL: smin4i16: 1081; CHECK: // %bb.0: 1082; CHECK-NEXT: smin v0.4h, v0.4h, v1.4h 1083; CHECK-NEXT: ret 1084 %c = call <4 x i16> @llvm.smin.v4i16(<4 x i16> %a, <4 x i16> %b) 1085 ret <4 x i16> %c 1086} 1087 1088declare <8 x i16> @llvm.smin.v8i16(<8 x i16> %a, <8 x i16> %b) readnone 1089 1090define <8 x i16> @smin8i16(<8 x i16> %a, <8 x i16> %b) { 1091; CHECK-LABEL: smin8i16: 1092; CHECK: // %bb.0: 1093; CHECK-NEXT: smin v0.8h, v0.8h, v1.8h 1094; CHECK-NEXT: ret 1095 %c = call <8 x i16> @llvm.smin.v8i16(<8 x i16> %a, <8 x i16> %b) 1096 ret <8 x i16> %c 1097} 1098 1099declare <16 x i16> @llvm.smin.v16i16(<16 x i16> %a, <16 x i16> %b) readnone 1100 1101define void @smin16i16(<16 x i16> %a, <16 x i16> %b, ptr %p) { 1102; CHECK-ISEL-LABEL: smin16i16: 1103; CHECK-ISEL: // %bb.0: 1104; CHECK-ISEL-NEXT: smin v1.8h, v1.8h, v3.8h 1105; CHECK-ISEL-NEXT: smin v0.8h, v0.8h, v2.8h 1106; CHECK-ISEL-NEXT: stp q0, q1, [x0] 1107; CHECK-ISEL-NEXT: ret 1108; 1109; CHECK-ISEL-CSSC-LABEL: smin16i16: 1110; CHECK-ISEL-CSSC: // %bb.0: 1111; CHECK-ISEL-CSSC-NEXT: smin v1.8h, v1.8h, v3.8h 1112; CHECK-ISEL-CSSC-NEXT: smin v0.8h, v0.8h, v2.8h 1113; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 1114; CHECK-ISEL-CSSC-NEXT: ret 1115; 1116; CHECK-GLOBAL-LABEL: smin16i16: 1117; CHECK-GLOBAL: // %bb.0: 1118; CHECK-GLOBAL-NEXT: smin v0.8h, v0.8h, v2.8h 1119; CHECK-GLOBAL-NEXT: smin v1.8h, v1.8h, v3.8h 1120; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 1121; CHECK-GLOBAL-NEXT: ret 1122; 1123; CHECK-GLOBAL-CSSC-LABEL: smin16i16: 1124; CHECK-GLOBAL-CSSC: // %bb.0: 1125; CHECK-GLOBAL-CSSC-NEXT: smin v0.8h, v0.8h, v2.8h 1126; CHECK-GLOBAL-CSSC-NEXT: smin v1.8h, v1.8h, v3.8h 1127; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 1128; CHECK-GLOBAL-CSSC-NEXT: ret 1129 %c = call <16 x i16> @llvm.smin.v16i16(<16 x i16> %a, <16 x i16> %b) 1130 store <16 x i16> %c, ptr %p 1131 ret void 1132} 1133 1134declare <2 x i32> @llvm.smin.v2i32(<2 x i32> %a, <2 x i32> %b) readnone 1135 1136define <2 x i32> @smin2i32(<2 x i32> %a, <2 x i32> %b) { 1137; CHECK-LABEL: smin2i32: 1138; CHECK: // %bb.0: 1139; CHECK-NEXT: smin v0.2s, v0.2s, v1.2s 1140; CHECK-NEXT: ret 1141 %c = call <2 x i32> @llvm.smin.v2i32(<2 x i32> %a, <2 x i32> %b) 1142 ret <2 x i32> %c 1143} 1144 1145declare <4 x i32> @llvm.smin.v4i32(<4 x i32> %a, <4 x i32> %b) readnone 1146 1147define <4 x i32> @smin4i32(<4 x i32> %a, <4 x i32> %b) { 1148; CHECK-LABEL: smin4i32: 1149; CHECK: // %bb.0: 1150; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s 1151; CHECK-NEXT: ret 1152 %c = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %a, <4 x i32> %b) 1153 ret <4 x i32> %c 1154} 1155 1156declare <8 x i32> @llvm.smin.v8i32(<8 x i32> %a, <8 x i32> %b) readnone 1157 1158define void @smin8i32(<8 x i32> %a, <8 x i32> %b, ptr %p) { 1159; CHECK-ISEL-LABEL: smin8i32: 1160; CHECK-ISEL: // %bb.0: 1161; CHECK-ISEL-NEXT: smin v1.4s, v1.4s, v3.4s 1162; CHECK-ISEL-NEXT: smin v0.4s, v0.4s, v2.4s 1163; CHECK-ISEL-NEXT: stp q0, q1, [x0] 1164; CHECK-ISEL-NEXT: ret 1165; 1166; CHECK-ISEL-CSSC-LABEL: smin8i32: 1167; CHECK-ISEL-CSSC: // %bb.0: 1168; CHECK-ISEL-CSSC-NEXT: smin v1.4s, v1.4s, v3.4s 1169; CHECK-ISEL-CSSC-NEXT: smin v0.4s, v0.4s, v2.4s 1170; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 1171; CHECK-ISEL-CSSC-NEXT: ret 1172; 1173; CHECK-GLOBAL-LABEL: smin8i32: 1174; CHECK-GLOBAL: // %bb.0: 1175; CHECK-GLOBAL-NEXT: smin v0.4s, v0.4s, v2.4s 1176; CHECK-GLOBAL-NEXT: smin v1.4s, v1.4s, v3.4s 1177; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 1178; CHECK-GLOBAL-NEXT: ret 1179; 1180; CHECK-GLOBAL-CSSC-LABEL: smin8i32: 1181; CHECK-GLOBAL-CSSC: // %bb.0: 1182; CHECK-GLOBAL-CSSC-NEXT: smin v0.4s, v0.4s, v2.4s 1183; CHECK-GLOBAL-CSSC-NEXT: smin v1.4s, v1.4s, v3.4s 1184; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 1185; CHECK-GLOBAL-CSSC-NEXT: ret 1186 %c = call <8 x i32>@llvm.smin.v8i32(<8 x i32> %a, <8 x i32> %b) 1187 store <8 x i32> %c, ptr %p 1188 ret void 1189} 1190 1191declare <1 x i64> @llvm.smin.v1i64(<1 x i64> %a, <1 x i64> %b) readnone 1192 1193define <1 x i64> @smin1i64(<1 x i64> %a, <1 x i64> %b) { 1194; CHECK-ISEL-LABEL: smin1i64: 1195; CHECK-ISEL: // %bb.0: 1196; CHECK-ISEL-NEXT: cmgt d2, d1, d0 1197; CHECK-ISEL-NEXT: bif v0.8b, v1.8b, v2.8b 1198; CHECK-ISEL-NEXT: ret 1199; 1200; CHECK-ISEL-CSSC-LABEL: smin1i64: 1201; CHECK-ISEL-CSSC: // %bb.0: 1202; CHECK-ISEL-CSSC-NEXT: cmgt d2, d1, d0 1203; CHECK-ISEL-CSSC-NEXT: bif v0.8b, v1.8b, v2.8b 1204; CHECK-ISEL-CSSC-NEXT: ret 1205; 1206; CHECK-GLOBAL-LABEL: smin1i64: 1207; CHECK-GLOBAL: // %bb.0: 1208; CHECK-GLOBAL-NEXT: fmov x8, d0 1209; CHECK-GLOBAL-NEXT: fmov x9, d1 1210; CHECK-GLOBAL-NEXT: cmp x8, x9 1211; CHECK-GLOBAL-NEXT: fcsel d0, d0, d1, lt 1212; CHECK-GLOBAL-NEXT: ret 1213; 1214; CHECK-GLOBAL-CSSC-LABEL: smin1i64: 1215; CHECK-GLOBAL-CSSC: // %bb.0: 1216; CHECK-GLOBAL-CSSC-NEXT: fmov x8, d0 1217; CHECK-GLOBAL-CSSC-NEXT: fmov x9, d1 1218; CHECK-GLOBAL-CSSC-NEXT: smin x8, x8, x9 1219; CHECK-GLOBAL-CSSC-NEXT: fmov d0, x8 1220; CHECK-GLOBAL-CSSC-NEXT: ret 1221 %c = call <1 x i64> @llvm.smin.v1i64(<1 x i64> %a, <1 x i64> %b) 1222 ret <1 x i64> %c 1223} 1224 1225declare <2 x i64> @llvm.smin.v2i64(<2 x i64> %a, <2 x i64> %b) readnone 1226 1227define <2 x i64> @smin2i64(<2 x i64> %a, <2 x i64> %b) { 1228; CHECK-LABEL: smin2i64: 1229; CHECK: // %bb.0: 1230; CHECK-NEXT: cmgt v2.2d, v1.2d, v0.2d 1231; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b 1232; CHECK-NEXT: ret 1233 %c = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %a, <2 x i64> %b) 1234 ret <2 x i64> %c 1235} 1236 1237declare <4 x i64> @llvm.smin.v4i64(<4 x i64> %a, <4 x i64> %b) readnone 1238 1239define void @smin4i64(<4 x i64> %a, <4 x i64> %b, ptr %p) { 1240; CHECK-ISEL-LABEL: smin4i64: 1241; CHECK-ISEL: // %bb.0: 1242; CHECK-ISEL-NEXT: cmgt v4.2d, v3.2d, v1.2d 1243; CHECK-ISEL-NEXT: cmgt v5.2d, v2.2d, v0.2d 1244; CHECK-ISEL-NEXT: bif v1.16b, v3.16b, v4.16b 1245; CHECK-ISEL-NEXT: bif v0.16b, v2.16b, v5.16b 1246; CHECK-ISEL-NEXT: stp q0, q1, [x0] 1247; CHECK-ISEL-NEXT: ret 1248; 1249; CHECK-ISEL-CSSC-LABEL: smin4i64: 1250; CHECK-ISEL-CSSC: // %bb.0: 1251; CHECK-ISEL-CSSC-NEXT: cmgt v4.2d, v3.2d, v1.2d 1252; CHECK-ISEL-CSSC-NEXT: cmgt v5.2d, v2.2d, v0.2d 1253; CHECK-ISEL-CSSC-NEXT: bif v1.16b, v3.16b, v4.16b 1254; CHECK-ISEL-CSSC-NEXT: bif v0.16b, v2.16b, v5.16b 1255; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 1256; CHECK-ISEL-CSSC-NEXT: ret 1257; 1258; CHECK-GLOBAL-LABEL: smin4i64: 1259; CHECK-GLOBAL: // %bb.0: 1260; CHECK-GLOBAL-NEXT: cmgt v4.2d, v2.2d, v0.2d 1261; CHECK-GLOBAL-NEXT: cmgt v5.2d, v3.2d, v1.2d 1262; CHECK-GLOBAL-NEXT: bif v0.16b, v2.16b, v4.16b 1263; CHECK-GLOBAL-NEXT: bif v1.16b, v3.16b, v5.16b 1264; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 1265; CHECK-GLOBAL-NEXT: ret 1266; 1267; CHECK-GLOBAL-CSSC-LABEL: smin4i64: 1268; CHECK-GLOBAL-CSSC: // %bb.0: 1269; CHECK-GLOBAL-CSSC-NEXT: cmgt v4.2d, v2.2d, v0.2d 1270; CHECK-GLOBAL-CSSC-NEXT: cmgt v5.2d, v3.2d, v1.2d 1271; CHECK-GLOBAL-CSSC-NEXT: bif v0.16b, v2.16b, v4.16b 1272; CHECK-GLOBAL-CSSC-NEXT: bif v1.16b, v3.16b, v5.16b 1273; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 1274; CHECK-GLOBAL-CSSC-NEXT: ret 1275 %c = call <4 x i64> @llvm.smin.v4i64(<4 x i64> %a, <4 x i64> %b) 1276 store <4 x i64> %c, ptr %p 1277 ret void 1278} 1279 1280declare i8 @llvm.umin.i8(i8 %a, i8 %b) readnone 1281 1282define i8 @umini8(i8 %a, i8 %b) { 1283; CHECK-ISEL-LABEL: umini8: 1284; CHECK-ISEL: // %bb.0: 1285; CHECK-ISEL-NEXT: and w8, w1, #0xff 1286; CHECK-ISEL-NEXT: and w9, w0, #0xff 1287; CHECK-ISEL-NEXT: cmp w9, w8 1288; CHECK-ISEL-NEXT: csel w0, w9, w8, lo 1289; CHECK-ISEL-NEXT: ret 1290; 1291; CHECK-ISEL-CSSC-LABEL: umini8: 1292; CHECK-ISEL-CSSC: // %bb.0: 1293; CHECK-ISEL-CSSC-NEXT: and w8, w1, #0xff 1294; CHECK-ISEL-CSSC-NEXT: and w9, w0, #0xff 1295; CHECK-ISEL-CSSC-NEXT: umin w0, w9, w8 1296; CHECK-ISEL-CSSC-NEXT: ret 1297; 1298; CHECK-GLOBAL-LABEL: umini8: 1299; CHECK-GLOBAL: // %bb.0: 1300; CHECK-GLOBAL-NEXT: and w8, w0, #0xff 1301; CHECK-GLOBAL-NEXT: cmp w8, w1, uxtb 1302; CHECK-GLOBAL-NEXT: csel w0, w0, w1, lo 1303; CHECK-GLOBAL-NEXT: ret 1304; 1305; CHECK-GLOBAL-CSSC-LABEL: umini8: 1306; CHECK-GLOBAL-CSSC: // %bb.0: 1307; CHECK-GLOBAL-CSSC-NEXT: and w8, w0, #0xff 1308; CHECK-GLOBAL-CSSC-NEXT: and w9, w1, #0xff 1309; CHECK-GLOBAL-CSSC-NEXT: umin w0, w8, w9 1310; CHECK-GLOBAL-CSSC-NEXT: ret 1311 %c = call i8 @llvm.umin.i8(i8 %a, i8 %b) 1312 ret i8 %c 1313} 1314 1315declare i16 @llvm.umin.i16(i16 %a, i16 %b) readnone 1316 1317define i16 @umini16(i16 %a, i16 %b) { 1318; CHECK-ISEL-LABEL: umini16: 1319; CHECK-ISEL: // %bb.0: 1320; CHECK-ISEL-NEXT: and w8, w1, #0xffff 1321; CHECK-ISEL-NEXT: and w9, w0, #0xffff 1322; CHECK-ISEL-NEXT: cmp w9, w8 1323; CHECK-ISEL-NEXT: csel w0, w9, w8, lo 1324; CHECK-ISEL-NEXT: ret 1325; 1326; CHECK-ISEL-CSSC-LABEL: umini16: 1327; CHECK-ISEL-CSSC: // %bb.0: 1328; CHECK-ISEL-CSSC-NEXT: and w8, w1, #0xffff 1329; CHECK-ISEL-CSSC-NEXT: and w9, w0, #0xffff 1330; CHECK-ISEL-CSSC-NEXT: umin w0, w9, w8 1331; CHECK-ISEL-CSSC-NEXT: ret 1332; 1333; CHECK-GLOBAL-LABEL: umini16: 1334; CHECK-GLOBAL: // %bb.0: 1335; CHECK-GLOBAL-NEXT: and w8, w0, #0xffff 1336; CHECK-GLOBAL-NEXT: cmp w8, w1, uxth 1337; CHECK-GLOBAL-NEXT: csel w0, w0, w1, lo 1338; CHECK-GLOBAL-NEXT: ret 1339; 1340; CHECK-GLOBAL-CSSC-LABEL: umini16: 1341; CHECK-GLOBAL-CSSC: // %bb.0: 1342; CHECK-GLOBAL-CSSC-NEXT: and w8, w0, #0xffff 1343; CHECK-GLOBAL-CSSC-NEXT: and w9, w1, #0xffff 1344; CHECK-GLOBAL-CSSC-NEXT: umin w0, w8, w9 1345; CHECK-GLOBAL-CSSC-NEXT: ret 1346 %c = call i16 @llvm.umin.i16(i16 %a, i16 %b) 1347 ret i16 %c 1348} 1349 1350declare i32 @llvm.umin.i32(i32 %a, i32 %b) readnone 1351 1352define i32 @umini32(i32 %a, i32 %b) { 1353; CHECK-ISEL-LABEL: umini32: 1354; CHECK-ISEL: // %bb.0: 1355; CHECK-ISEL-NEXT: cmp w0, w1 1356; CHECK-ISEL-NEXT: csel w0, w0, w1, lo 1357; CHECK-ISEL-NEXT: ret 1358; 1359; CHECK-ISEL-CSSC-LABEL: umini32: 1360; CHECK-ISEL-CSSC: // %bb.0: 1361; CHECK-ISEL-CSSC-NEXT: umin w0, w0, w1 1362; CHECK-ISEL-CSSC-NEXT: ret 1363; 1364; CHECK-GLOBAL-LABEL: umini32: 1365; CHECK-GLOBAL: // %bb.0: 1366; CHECK-GLOBAL-NEXT: cmp w0, w1 1367; CHECK-GLOBAL-NEXT: csel w0, w0, w1, lo 1368; CHECK-GLOBAL-NEXT: ret 1369; 1370; CHECK-GLOBAL-CSSC-LABEL: umini32: 1371; CHECK-GLOBAL-CSSC: // %bb.0: 1372; CHECK-GLOBAL-CSSC-NEXT: umin w0, w0, w1 1373; CHECK-GLOBAL-CSSC-NEXT: ret 1374 %c = call i32 @llvm.umin.i32(i32 %a, i32 %b) 1375 ret i32 %c 1376} 1377 1378declare i64 @llvm.umin.i64(i64 %a, i64 %b) readnone 1379 1380define i64 @umini64(i64 %a, i64 %b) { 1381; CHECK-ISEL-LABEL: umini64: 1382; CHECK-ISEL: // %bb.0: 1383; CHECK-ISEL-NEXT: cmp x0, x1 1384; CHECK-ISEL-NEXT: csel x0, x0, x1, lo 1385; CHECK-ISEL-NEXT: ret 1386; 1387; CHECK-ISEL-CSSC-LABEL: umini64: 1388; CHECK-ISEL-CSSC: // %bb.0: 1389; CHECK-ISEL-CSSC-NEXT: umin x0, x0, x1 1390; CHECK-ISEL-CSSC-NEXT: ret 1391; 1392; CHECK-GLOBAL-LABEL: umini64: 1393; CHECK-GLOBAL: // %bb.0: 1394; CHECK-GLOBAL-NEXT: cmp x0, x1 1395; CHECK-GLOBAL-NEXT: csel x0, x0, x1, lo 1396; CHECK-GLOBAL-NEXT: ret 1397; 1398; CHECK-GLOBAL-CSSC-LABEL: umini64: 1399; CHECK-GLOBAL-CSSC: // %bb.0: 1400; CHECK-GLOBAL-CSSC-NEXT: umin x0, x0, x1 1401; CHECK-GLOBAL-CSSC-NEXT: ret 1402 %c = call i64 @llvm.umin.i64(i64 %a, i64 %b) 1403 ret i64 %c 1404} 1405 1406declare <8 x i8> @llvm.umin.v8i8(<8 x i8> %a, <8 x i8> %b) readnone 1407 1408define <8 x i8> @umin8i8(<8 x i8> %a, <8 x i8> %b) { 1409; CHECK-LABEL: umin8i8: 1410; CHECK: // %bb.0: 1411; CHECK-NEXT: umin v0.8b, v0.8b, v1.8b 1412; CHECK-NEXT: ret 1413 %c = call <8 x i8> @llvm.umin.v8i8(<8 x i8> %a, <8 x i8> %b) 1414 ret <8 x i8> %c 1415} 1416 1417declare <16 x i8> @llvm.umin.v16i8(<16 x i8> %a, <16 x i8> %b) readnone 1418 1419define <16 x i8> @umin16i8(<16 x i8> %a, <16 x i8> %b) { 1420; CHECK-LABEL: umin16i8: 1421; CHECK: // %bb.0: 1422; CHECK-NEXT: umin v0.16b, v0.16b, v1.16b 1423; CHECK-NEXT: ret 1424 %c = call <16 x i8> @llvm.umin.v16i8(<16 x i8> %a, <16 x i8> %b) 1425 ret <16 x i8> %c 1426} 1427 1428declare <32 x i8> @llvm.umin.v32i8(<32 x i8> %a, <32 x i8> %b) readnone 1429 1430define void @umin32i8(<32 x i8> %a, <32 x i8> %b, ptr %p) { 1431; CHECK-ISEL-LABEL: umin32i8: 1432; CHECK-ISEL: // %bb.0: 1433; CHECK-ISEL-NEXT: umin v1.16b, v1.16b, v3.16b 1434; CHECK-ISEL-NEXT: umin v0.16b, v0.16b, v2.16b 1435; CHECK-ISEL-NEXT: stp q0, q1, [x0] 1436; CHECK-ISEL-NEXT: ret 1437; 1438; CHECK-ISEL-CSSC-LABEL: umin32i8: 1439; CHECK-ISEL-CSSC: // %bb.0: 1440; CHECK-ISEL-CSSC-NEXT: umin v1.16b, v1.16b, v3.16b 1441; CHECK-ISEL-CSSC-NEXT: umin v0.16b, v0.16b, v2.16b 1442; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 1443; CHECK-ISEL-CSSC-NEXT: ret 1444; 1445; CHECK-GLOBAL-LABEL: umin32i8: 1446; CHECK-GLOBAL: // %bb.0: 1447; CHECK-GLOBAL-NEXT: umin v0.16b, v0.16b, v2.16b 1448; CHECK-GLOBAL-NEXT: umin v1.16b, v1.16b, v3.16b 1449; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 1450; CHECK-GLOBAL-NEXT: ret 1451; 1452; CHECK-GLOBAL-CSSC-LABEL: umin32i8: 1453; CHECK-GLOBAL-CSSC: // %bb.0: 1454; CHECK-GLOBAL-CSSC-NEXT: umin v0.16b, v0.16b, v2.16b 1455; CHECK-GLOBAL-CSSC-NEXT: umin v1.16b, v1.16b, v3.16b 1456; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 1457; CHECK-GLOBAL-CSSC-NEXT: ret 1458 %c = call <32 x i8> @llvm.umin.v32i8(<32 x i8> %a, <32 x i8> %b) 1459 store <32 x i8> %c, ptr %p 1460 ret void 1461} 1462 1463declare <4 x i16> @llvm.umin.v4i16(<4 x i16> %a, <4 x i16> %b) readnone 1464 1465define <4 x i16> @umin4i16(<4 x i16> %a, <4 x i16> %b) { 1466; CHECK-LABEL: umin4i16: 1467; CHECK: // %bb.0: 1468; CHECK-NEXT: umin v0.4h, v0.4h, v1.4h 1469; CHECK-NEXT: ret 1470 %c = call <4 x i16> @llvm.umin.v4i16(<4 x i16> %a, <4 x i16> %b) 1471 ret <4 x i16> %c 1472} 1473 1474declare <8 x i16> @llvm.umin.v8i16(<8 x i16> %a, <8 x i16> %b) readnone 1475 1476define <8 x i16> @umin8i16(<8 x i16> %a, <8 x i16> %b) { 1477; CHECK-LABEL: umin8i16: 1478; CHECK: // %bb.0: 1479; CHECK-NEXT: umin v0.8h, v0.8h, v1.8h 1480; CHECK-NEXT: ret 1481 %c = call <8 x i16> @llvm.umin.v8i16(<8 x i16> %a, <8 x i16> %b) 1482 ret <8 x i16> %c 1483} 1484 1485declare <16 x i16> @llvm.umin.v16i16(<16 x i16> %a, <16 x i16> %b) readnone 1486 1487define void @umin16i16(<16 x i16> %a, <16 x i16> %b, ptr %p) { 1488; CHECK-ISEL-LABEL: umin16i16: 1489; CHECK-ISEL: // %bb.0: 1490; CHECK-ISEL-NEXT: umin v1.8h, v1.8h, v3.8h 1491; CHECK-ISEL-NEXT: umin v0.8h, v0.8h, v2.8h 1492; CHECK-ISEL-NEXT: stp q0, q1, [x0] 1493; CHECK-ISEL-NEXT: ret 1494; 1495; CHECK-ISEL-CSSC-LABEL: umin16i16: 1496; CHECK-ISEL-CSSC: // %bb.0: 1497; CHECK-ISEL-CSSC-NEXT: umin v1.8h, v1.8h, v3.8h 1498; CHECK-ISEL-CSSC-NEXT: umin v0.8h, v0.8h, v2.8h 1499; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 1500; CHECK-ISEL-CSSC-NEXT: ret 1501; 1502; CHECK-GLOBAL-LABEL: umin16i16: 1503; CHECK-GLOBAL: // %bb.0: 1504; CHECK-GLOBAL-NEXT: umin v0.8h, v0.8h, v2.8h 1505; CHECK-GLOBAL-NEXT: umin v1.8h, v1.8h, v3.8h 1506; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 1507; CHECK-GLOBAL-NEXT: ret 1508; 1509; CHECK-GLOBAL-CSSC-LABEL: umin16i16: 1510; CHECK-GLOBAL-CSSC: // %bb.0: 1511; CHECK-GLOBAL-CSSC-NEXT: umin v0.8h, v0.8h, v2.8h 1512; CHECK-GLOBAL-CSSC-NEXT: umin v1.8h, v1.8h, v3.8h 1513; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 1514; CHECK-GLOBAL-CSSC-NEXT: ret 1515 %c = call <16 x i16> @llvm.umin.v16i16(<16 x i16> %a, <16 x i16> %b) 1516 store <16 x i16> %c, ptr %p 1517 ret void 1518} 1519 1520declare <2 x i32> @llvm.umin.v2i32(<2 x i32> %a, <2 x i32> %b) readnone 1521 1522define <2 x i32> @umin2i32(<2 x i32> %a, <2 x i32> %b) { 1523; CHECK-LABEL: umin2i32: 1524; CHECK: // %bb.0: 1525; CHECK-NEXT: umin v0.2s, v0.2s, v1.2s 1526; CHECK-NEXT: ret 1527 %c = call <2 x i32> @llvm.umin.v2i32(<2 x i32> %a, <2 x i32> %b) 1528 ret <2 x i32> %c 1529} 1530 1531declare <4 x i32> @llvm.umin.v4i32(<4 x i32> %a, <4 x i32> %b) readnone 1532 1533define <4 x i32> @umin4i32(<4 x i32> %a, <4 x i32> %b) { 1534; CHECK-LABEL: umin4i32: 1535; CHECK: // %bb.0: 1536; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s 1537; CHECK-NEXT: ret 1538 %c = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %a, <4 x i32> %b) 1539 ret <4 x i32> %c 1540} 1541 1542declare <8 x i32> @llvm.umin.v8i32(<8 x i32> %a, <8 x i32> %b) readnone 1543 1544define void @umin8i32(<8 x i32> %a, <8 x i32> %b, ptr %p) { 1545; CHECK-ISEL-LABEL: umin8i32: 1546; CHECK-ISEL: // %bb.0: 1547; CHECK-ISEL-NEXT: umin v1.4s, v1.4s, v3.4s 1548; CHECK-ISEL-NEXT: umin v0.4s, v0.4s, v2.4s 1549; CHECK-ISEL-NEXT: stp q0, q1, [x0] 1550; CHECK-ISEL-NEXT: ret 1551; 1552; CHECK-ISEL-CSSC-LABEL: umin8i32: 1553; CHECK-ISEL-CSSC: // %bb.0: 1554; CHECK-ISEL-CSSC-NEXT: umin v1.4s, v1.4s, v3.4s 1555; CHECK-ISEL-CSSC-NEXT: umin v0.4s, v0.4s, v2.4s 1556; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 1557; CHECK-ISEL-CSSC-NEXT: ret 1558; 1559; CHECK-GLOBAL-LABEL: umin8i32: 1560; CHECK-GLOBAL: // %bb.0: 1561; CHECK-GLOBAL-NEXT: umin v0.4s, v0.4s, v2.4s 1562; CHECK-GLOBAL-NEXT: umin v1.4s, v1.4s, v3.4s 1563; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 1564; CHECK-GLOBAL-NEXT: ret 1565; 1566; CHECK-GLOBAL-CSSC-LABEL: umin8i32: 1567; CHECK-GLOBAL-CSSC: // %bb.0: 1568; CHECK-GLOBAL-CSSC-NEXT: umin v0.4s, v0.4s, v2.4s 1569; CHECK-GLOBAL-CSSC-NEXT: umin v1.4s, v1.4s, v3.4s 1570; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 1571; CHECK-GLOBAL-CSSC-NEXT: ret 1572 %c = call <8 x i32>@llvm.umin.v8i32(<8 x i32> %a, <8 x i32> %b) 1573 store <8 x i32> %c, ptr %p 1574 ret void 1575} 1576 1577declare <1 x i64> @llvm.umin.v1i64(<1 x i64> %a, <1 x i64> %b) readnone 1578 1579define <1 x i64> @umin1i64(<1 x i64> %a, <1 x i64> %b) { 1580; CHECK-ISEL-LABEL: umin1i64: 1581; CHECK-ISEL: // %bb.0: 1582; CHECK-ISEL-NEXT: cmhi d2, d1, d0 1583; CHECK-ISEL-NEXT: bif v0.8b, v1.8b, v2.8b 1584; CHECK-ISEL-NEXT: ret 1585; 1586; CHECK-ISEL-CSSC-LABEL: umin1i64: 1587; CHECK-ISEL-CSSC: // %bb.0: 1588; CHECK-ISEL-CSSC-NEXT: cmhi d2, d1, d0 1589; CHECK-ISEL-CSSC-NEXT: bif v0.8b, v1.8b, v2.8b 1590; CHECK-ISEL-CSSC-NEXT: ret 1591; 1592; CHECK-GLOBAL-LABEL: umin1i64: 1593; CHECK-GLOBAL: // %bb.0: 1594; CHECK-GLOBAL-NEXT: fmov x8, d0 1595; CHECK-GLOBAL-NEXT: fmov x9, d1 1596; CHECK-GLOBAL-NEXT: cmp x8, x9 1597; CHECK-GLOBAL-NEXT: fcsel d0, d0, d1, lo 1598; CHECK-GLOBAL-NEXT: ret 1599; 1600; CHECK-GLOBAL-CSSC-LABEL: umin1i64: 1601; CHECK-GLOBAL-CSSC: // %bb.0: 1602; CHECK-GLOBAL-CSSC-NEXT: fmov x8, d0 1603; CHECK-GLOBAL-CSSC-NEXT: fmov x9, d1 1604; CHECK-GLOBAL-CSSC-NEXT: umin x8, x8, x9 1605; CHECK-GLOBAL-CSSC-NEXT: fmov d0, x8 1606; CHECK-GLOBAL-CSSC-NEXT: ret 1607 %c = call <1 x i64> @llvm.umin.v1i64(<1 x i64> %a, <1 x i64> %b) 1608 ret <1 x i64> %c 1609} 1610 1611declare <2 x i64> @llvm.umin.v2i64(<2 x i64> %a, <2 x i64> %b) readnone 1612 1613define <2 x i64> @umin2i64(<2 x i64> %a, <2 x i64> %b) { 1614; CHECK-LABEL: umin2i64: 1615; CHECK: // %bb.0: 1616; CHECK-NEXT: cmhi v2.2d, v1.2d, v0.2d 1617; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b 1618; CHECK-NEXT: ret 1619 %c = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %a, <2 x i64> %b) 1620 ret <2 x i64> %c 1621} 1622 1623declare <4 x i64> @llvm.umin.v4i64(<4 x i64> %a, <4 x i64> %b) readnone 1624 1625define void @umin4i64(<4 x i64> %a, <4 x i64> %b, ptr %p) { 1626; CHECK-ISEL-LABEL: umin4i64: 1627; CHECK-ISEL: // %bb.0: 1628; CHECK-ISEL-NEXT: cmhi v4.2d, v3.2d, v1.2d 1629; CHECK-ISEL-NEXT: cmhi v5.2d, v2.2d, v0.2d 1630; CHECK-ISEL-NEXT: bif v1.16b, v3.16b, v4.16b 1631; CHECK-ISEL-NEXT: bif v0.16b, v2.16b, v5.16b 1632; CHECK-ISEL-NEXT: stp q0, q1, [x0] 1633; CHECK-ISEL-NEXT: ret 1634; 1635; CHECK-ISEL-CSSC-LABEL: umin4i64: 1636; CHECK-ISEL-CSSC: // %bb.0: 1637; CHECK-ISEL-CSSC-NEXT: cmhi v4.2d, v3.2d, v1.2d 1638; CHECK-ISEL-CSSC-NEXT: cmhi v5.2d, v2.2d, v0.2d 1639; CHECK-ISEL-CSSC-NEXT: bif v1.16b, v3.16b, v4.16b 1640; CHECK-ISEL-CSSC-NEXT: bif v0.16b, v2.16b, v5.16b 1641; CHECK-ISEL-CSSC-NEXT: stp q0, q1, [x0] 1642; CHECK-ISEL-CSSC-NEXT: ret 1643; 1644; CHECK-GLOBAL-LABEL: umin4i64: 1645; CHECK-GLOBAL: // %bb.0: 1646; CHECK-GLOBAL-NEXT: cmhi v4.2d, v2.2d, v0.2d 1647; CHECK-GLOBAL-NEXT: cmhi v5.2d, v3.2d, v1.2d 1648; CHECK-GLOBAL-NEXT: bif v0.16b, v2.16b, v4.16b 1649; CHECK-GLOBAL-NEXT: bif v1.16b, v3.16b, v5.16b 1650; CHECK-GLOBAL-NEXT: stp q0, q1, [x0] 1651; CHECK-GLOBAL-NEXT: ret 1652; 1653; CHECK-GLOBAL-CSSC-LABEL: umin4i64: 1654; CHECK-GLOBAL-CSSC: // %bb.0: 1655; CHECK-GLOBAL-CSSC-NEXT: cmhi v4.2d, v2.2d, v0.2d 1656; CHECK-GLOBAL-CSSC-NEXT: cmhi v5.2d, v3.2d, v1.2d 1657; CHECK-GLOBAL-CSSC-NEXT: bif v0.16b, v2.16b, v4.16b 1658; CHECK-GLOBAL-CSSC-NEXT: bif v1.16b, v3.16b, v5.16b 1659; CHECK-GLOBAL-CSSC-NEXT: stp q0, q1, [x0] 1660; CHECK-GLOBAL-CSSC-NEXT: ret 1661 %c = call <4 x i64> @llvm.umin.v4i64(<4 x i64> %a, <4 x i64> %b) 1662 store <4 x i64> %c, ptr %p 1663 ret void 1664} 1665