1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64-unknown-linux-gnu -mattr=-neon | FileCheck %s --check-prefixes=ALL,GPR 3; RUN: llc < %s -mtriple=aarch64-unknown-linux-gnu -mattr=neon | FileCheck %s --check-prefixes=ALL,NEON 4 5declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind 6declare void @llvm.memset.inline.p0.i64(ptr nocapture, i8, i64, i1) nounwind 7 8; ///////////////////////////////////////////////////////////////////////////// 9 10define void @memset_1(ptr %a, i8 %value) nounwind { 11; ALL-LABEL: memset_1: 12; ALL: // %bb.0: 13; ALL-NEXT: strb w1, [x0] 14; ALL-NEXT: ret 15 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 1, i1 0) 16 ret void 17} 18 19define void @memset_2(ptr %a, i8 %value) nounwind { 20; ALL-LABEL: memset_2: 21; ALL: // %bb.0: 22; ALL-NEXT: bfi w1, w1, #8, #24 23; ALL-NEXT: strh w1, [x0] 24; ALL-NEXT: ret 25 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 2, i1 0) 26 ret void 27} 28 29define void @memset_4(ptr %a, i8 %value) nounwind { 30; ALL-LABEL: memset_4: 31; ALL: // %bb.0: 32; ALL-NEXT: mov w8, #16843009 33; ALL-NEXT: and w9, w1, #0xff 34; ALL-NEXT: mul w8, w9, w8 35; ALL-NEXT: str w8, [x0] 36; ALL-NEXT: ret 37 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 4, i1 0) 38 ret void 39} 40 41define void @memset_8(ptr %a, i8 %value) nounwind { 42; ALL-LABEL: memset_8: 43; ALL: // %bb.0: 44; ALL-NEXT: // kill: def $w1 killed $w1 def $x1 45; ALL-NEXT: mov x8, #72340172838076673 46; ALL-NEXT: and x9, x1, #0xff 47; ALL-NEXT: mul x8, x9, x8 48; ALL-NEXT: str x8, [x0] 49; ALL-NEXT: ret 50 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 8, i1 0) 51 ret void 52} 53 54define void @memset_16(ptr %a, i8 %value) nounwind { 55; ALL-LABEL: memset_16: 56; ALL: // %bb.0: 57; ALL-NEXT: // kill: def $w1 killed $w1 def $x1 58; ALL-NEXT: mov x8, #72340172838076673 59; ALL-NEXT: and x9, x1, #0xff 60; ALL-NEXT: mul x8, x9, x8 61; ALL-NEXT: stp x8, x8, [x0] 62; ALL-NEXT: ret 63 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 16, i1 0) 64 ret void 65} 66 67define void @memset_32(ptr %a, i8 %value) nounwind { 68; GPR-LABEL: memset_32: 69; GPR: // %bb.0: 70; GPR-NEXT: // kill: def $w1 killed $w1 def $x1 71; GPR-NEXT: mov x8, #72340172838076673 72; GPR-NEXT: and x9, x1, #0xff 73; GPR-NEXT: mul x8, x9, x8 74; GPR-NEXT: stp x8, x8, [x0, #16] 75; GPR-NEXT: stp x8, x8, [x0] 76; GPR-NEXT: ret 77; 78; NEON-LABEL: memset_32: 79; NEON: // %bb.0: 80; NEON-NEXT: dup v0.16b, w1 81; NEON-NEXT: stp q0, q0, [x0] 82; NEON-NEXT: ret 83 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 32, i1 0) 84 ret void 85} 86 87define void @memset_64(ptr %a, i8 %value) nounwind { 88; GPR-LABEL: memset_64: 89; GPR: // %bb.0: 90; GPR-NEXT: // kill: def $w1 killed $w1 def $x1 91; GPR-NEXT: mov x8, #72340172838076673 92; GPR-NEXT: and x9, x1, #0xff 93; GPR-NEXT: mul x8, x9, x8 94; GPR-NEXT: stp x8, x8, [x0, #48] 95; GPR-NEXT: stp x8, x8, [x0, #32] 96; GPR-NEXT: stp x8, x8, [x0, #16] 97; GPR-NEXT: stp x8, x8, [x0] 98; GPR-NEXT: ret 99; 100; NEON-LABEL: memset_64: 101; NEON: // %bb.0: 102; NEON-NEXT: dup v0.16b, w1 103; NEON-NEXT: stp q0, q0, [x0] 104; NEON-NEXT: stp q0, q0, [x0, #32] 105; NEON-NEXT: ret 106 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 64, i1 0) 107 ret void 108} 109 110; ///////////////////////////////////////////////////////////////////////////// 111 112define void @aligned_memset_16(ptr align 16 %a, i8 %value) nounwind { 113; ALL-LABEL: aligned_memset_16: 114; ALL: // %bb.0: 115; ALL-NEXT: // kill: def $w1 killed $w1 def $x1 116; ALL-NEXT: mov x8, #72340172838076673 117; ALL-NEXT: and x9, x1, #0xff 118; ALL-NEXT: mul x8, x9, x8 119; ALL-NEXT: stp x8, x8, [x0] 120; ALL-NEXT: ret 121 tail call void @llvm.memset.inline.p0.i64(ptr align 16 %a, i8 %value, i64 16, i1 0) 122 ret void 123} 124 125define void @aligned_memset_32(ptr align 32 %a, i8 %value) nounwind { 126; GPR-LABEL: aligned_memset_32: 127; GPR: // %bb.0: 128; GPR-NEXT: // kill: def $w1 killed $w1 def $x1 129; GPR-NEXT: mov x8, #72340172838076673 130; GPR-NEXT: and x9, x1, #0xff 131; GPR-NEXT: mul x8, x9, x8 132; GPR-NEXT: stp x8, x8, [x0, #16] 133; GPR-NEXT: stp x8, x8, [x0] 134; GPR-NEXT: ret 135; 136; NEON-LABEL: aligned_memset_32: 137; NEON: // %bb.0: 138; NEON-NEXT: dup v0.16b, w1 139; NEON-NEXT: stp q0, q0, [x0] 140; NEON-NEXT: ret 141 tail call void @llvm.memset.inline.p0.i64(ptr align 32 %a, i8 %value, i64 32, i1 0) 142 ret void 143} 144 145define void @aligned_memset_64(ptr align 64 %a, i8 %value) nounwind { 146; GPR-LABEL: aligned_memset_64: 147; GPR: // %bb.0: 148; GPR-NEXT: // kill: def $w1 killed $w1 def $x1 149; GPR-NEXT: mov x8, #72340172838076673 150; GPR-NEXT: and x9, x1, #0xff 151; GPR-NEXT: mul x8, x9, x8 152; GPR-NEXT: stp x8, x8, [x0, #48] 153; GPR-NEXT: stp x8, x8, [x0, #32] 154; GPR-NEXT: stp x8, x8, [x0, #16] 155; GPR-NEXT: stp x8, x8, [x0] 156; GPR-NEXT: ret 157; 158; NEON-LABEL: aligned_memset_64: 159; NEON: // %bb.0: 160; NEON-NEXT: dup v0.16b, w1 161; NEON-NEXT: stp q0, q0, [x0] 162; NEON-NEXT: stp q0, q0, [x0, #32] 163; NEON-NEXT: ret 164 tail call void @llvm.memset.inline.p0.i64(ptr align 64 %a, i8 %value, i64 64, i1 0) 165 ret void 166} 167 168; ///////////////////////////////////////////////////////////////////////////// 169 170define void @bzero_1(ptr %a) nounwind { 171; ALL-LABEL: bzero_1: 172; ALL: // %bb.0: 173; ALL-NEXT: strb wzr, [x0] 174; ALL-NEXT: ret 175 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 1, i1 0) 176 ret void 177} 178 179define void @bzero_2(ptr %a) nounwind { 180; ALL-LABEL: bzero_2: 181; ALL: // %bb.0: 182; ALL-NEXT: strh wzr, [x0] 183; ALL-NEXT: ret 184 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 2, i1 0) 185 ret void 186} 187 188define void @bzero_4(ptr %a) nounwind { 189; ALL-LABEL: bzero_4: 190; ALL: // %bb.0: 191; ALL-NEXT: str wzr, [x0] 192; ALL-NEXT: ret 193 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 4, i1 0) 194 ret void 195} 196 197define void @bzero_8(ptr %a) nounwind { 198; ALL-LABEL: bzero_8: 199; ALL: // %bb.0: 200; ALL-NEXT: str xzr, [x0] 201; ALL-NEXT: ret 202 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 8, i1 0) 203 ret void 204} 205 206define void @bzero_16(ptr %a) nounwind { 207; ALL-LABEL: bzero_16: 208; ALL: // %bb.0: 209; ALL-NEXT: stp xzr, xzr, [x0] 210; ALL-NEXT: ret 211 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 16, i1 0) 212 ret void 213} 214 215define void @bzero_32(ptr %a) nounwind { 216; GPR-LABEL: bzero_32: 217; GPR: // %bb.0: 218; GPR-NEXT: adrp x8, .LCPI15_0 219; GPR-NEXT: ldr q0, [x8, :lo12:.LCPI15_0] 220; GPR-NEXT: stp q0, q0, [x0] 221; GPR-NEXT: ret 222; 223; NEON-LABEL: bzero_32: 224; NEON: // %bb.0: 225; NEON-NEXT: movi v0.2d, #0000000000000000 226; NEON-NEXT: stp q0, q0, [x0] 227; NEON-NEXT: ret 228 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 32, i1 0) 229 ret void 230} 231 232define void @bzero_64(ptr %a) nounwind { 233; GPR-LABEL: bzero_64: 234; GPR: // %bb.0: 235; GPR-NEXT: adrp x8, .LCPI16_0 236; GPR-NEXT: ldr q0, [x8, :lo12:.LCPI16_0] 237; GPR-NEXT: stp q0, q0, [x0] 238; GPR-NEXT: stp q0, q0, [x0, #32] 239; GPR-NEXT: ret 240; 241; NEON-LABEL: bzero_64: 242; NEON: // %bb.0: 243; NEON-NEXT: movi v0.2d, #0000000000000000 244; NEON-NEXT: stp q0, q0, [x0] 245; NEON-NEXT: stp q0, q0, [x0, #32] 246; NEON-NEXT: ret 247 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 64, i1 0) 248 ret void 249} 250 251; ///////////////////////////////////////////////////////////////////////////// 252 253define void @aligned_bzero_16(ptr %a) nounwind { 254; ALL-LABEL: aligned_bzero_16: 255; ALL: // %bb.0: 256; ALL-NEXT: stp xzr, xzr, [x0] 257; ALL-NEXT: ret 258 tail call void @llvm.memset.inline.p0.i64(ptr align 16 %a, i8 0, i64 16, i1 0) 259 ret void 260} 261 262define void @aligned_bzero_32(ptr %a) nounwind { 263; GPR-LABEL: aligned_bzero_32: 264; GPR: // %bb.0: 265; GPR-NEXT: adrp x8, .LCPI18_0 266; GPR-NEXT: ldr q0, [x8, :lo12:.LCPI18_0] 267; GPR-NEXT: stp q0, q0, [x0] 268; GPR-NEXT: ret 269; 270; NEON-LABEL: aligned_bzero_32: 271; NEON: // %bb.0: 272; NEON-NEXT: movi v0.2d, #0000000000000000 273; NEON-NEXT: stp q0, q0, [x0] 274; NEON-NEXT: ret 275 tail call void @llvm.memset.inline.p0.i64(ptr align 32 %a, i8 0, i64 32, i1 0) 276 ret void 277} 278 279define void @aligned_bzero_64(ptr %a) nounwind { 280; GPR-LABEL: aligned_bzero_64: 281; GPR: // %bb.0: 282; GPR-NEXT: adrp x8, .LCPI19_0 283; GPR-NEXT: ldr q0, [x8, :lo12:.LCPI19_0] 284; GPR-NEXT: stp q0, q0, [x0] 285; GPR-NEXT: stp q0, q0, [x0, #32] 286; GPR-NEXT: ret 287; 288; NEON-LABEL: aligned_bzero_64: 289; NEON: // %bb.0: 290; NEON-NEXT: movi v0.2d, #0000000000000000 291; NEON-NEXT: stp q0, q0, [x0] 292; NEON-NEXT: stp q0, q0, [x0, #32] 293; NEON-NEXT: ret 294 tail call void @llvm.memset.inline.p0.i64(ptr align 64 %a, i8 0, i64 64, i1 0) 295 ret void 296} 297