1; RUN: llc -verify-machineinstrs -enable-machine-outliner -aarch64-load-store-renaming=true -mtriple=aarch64-apple-darwin < %s | FileCheck %s 2; RUN: llc -verify-machineinstrs -enable-machine-outliner -aarch64-load-store-renaming=true -mtriple=aarch64-apple-darwin -mcpu=cortex-a53 -enable-misched=false < %s | FileCheck %s 3; RUN: llc -verify-machineinstrs -enable-machine-outliner -enable-linkonceodr-outlining -mtriple=aarch64-apple-darwin < %s | FileCheck %s -check-prefix=ODR 4; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple=aarch64-apple-darwin -stop-after=machine-outliner < %s | FileCheck %s -check-prefix=TARGET_FEATURES 5 6; Make sure that we inherit target features from functions and make sure we have 7; the right function attributes. 8; TARGET_FEATURES: define internal void @OUTLINED_FUNCTION_{{[0-9]+}}() 9; TARGET_FEATURES-SAME: #[[ATTR_NUM:[0-9]+]] 10; TARGET_FEATURES-DAG: attributes #[[ATTR_NUM]] = { 11; TARGET_FEATURES-SAME: minsize 12; TARGET_FEATURES-SAME: nounwind 13; TARGET_FEATURES-SAME: optsize 14; TARGET_FEATURES-SAME: "target-cpu"="cyclone" 15; TARGET_FEATURES-SAME: "target-features"="+sse" 16 17define linkonce_odr void @fish() #0 { 18 ; CHECK-LABEL: _fish: 19 ; CHECK-NOT: OUTLINED 20 ; ODR: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]] 21 %1 = alloca i32, align 4 22 %2 = alloca i32, align 4 23 %3 = alloca i32, align 4 24 %4 = alloca i32, align 4 25 %5 = alloca i32, align 4 26 %6 = alloca i32, align 4 27 store i32 1, ptr %1, align 4 28 store i32 2, ptr %2, align 4 29 store i32 3, ptr %3, align 4 30 store i32 4, ptr %4, align 4 31 store i32 5, ptr %5, align 4 32 store i32 6, ptr %6, align 4 33 ret void 34} 35 36define void @turtle() section "TURTLE,turtle" { 37 ; CHECK-LABEL: _turtle: 38 ; ODR-LABEL: _turtle: 39 ; CHECK-NOT: OUTLINED 40 %1 = alloca i32, align 4 41 %2 = alloca i32, align 4 42 %3 = alloca i32, align 4 43 %4 = alloca i32, align 4 44 %5 = alloca i32, align 4 45 %6 = alloca i32, align 4 46 store i32 1, ptr %1, align 4 47 store i32 2, ptr %2, align 4 48 store i32 3, ptr %3, align 4 49 store i32 4, ptr %4, align 4 50 store i32 5, ptr %5, align 4 51 store i32 6, ptr %6, align 4 52 ret void 53} 54 55define void @cat() #0 { 56 ; CHECK-LABEL: _cat: 57 ; CHECK: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]] 58 ; ODR: [[OUTLINED]] 59 %1 = alloca i32, align 4 60 %2 = alloca i32, align 4 61 %3 = alloca i32, align 4 62 %4 = alloca i32, align 4 63 %5 = alloca i32, align 4 64 %6 = alloca i32, align 4 65 store i32 1, ptr %1, align 4 66 store i32 2, ptr %2, align 4 67 store i32 3, ptr %3, align 4 68 store i32 4, ptr %4, align 4 69 store i32 5, ptr %5, align 4 70 store i32 6, ptr %6, align 4 71 ret void 72} 73 74define void @dog() #0 { 75 ; CHECK-LABEL: _dog: 76 ; CHECK: [[OUTLINED]] 77 ; ODR: [[OUTLINED]] 78 %1 = alloca i32, align 4 79 %2 = alloca i32, align 4 80 %3 = alloca i32, align 4 81 %4 = alloca i32, align 4 82 %5 = alloca i32, align 4 83 %6 = alloca i32, align 4 84 store i32 1, ptr %1, align 4 85 store i32 2, ptr %2, align 4 86 store i32 3, ptr %3, align 4 87 store i32 4, ptr %4, align 4 88 store i32 5, ptr %5, align 4 89 store i32 6, ptr %6, align 4 90 ret void 91} 92 93; ODR: [[OUTLINED]]: 94; CHECK: .p2align 2 95; CHECK-NEXT: [[OUTLINED]]: 96; CHECK: mov w9, #1 97; CHECK-DAG: mov w8, #2 98; CHECK-DAG: stp w8, w9, [sp, #24] 99; CHECK-DAG: mov w9, #3 100; CHECK-DAG: mov w8, #4 101; CHECK-DAG: stp w8, w9, [sp, #16] 102; CHECK-DAG: mov w9, #5 103; CHECK-DAG: mov w8, #6 104; CHECK-DAG: stp w8, w9, [sp, #8] 105; CHECK-DAG: add sp, sp, #32 106; CHECK-DAG: ret 107 108attributes #0 = { nounwind noredzone "target-cpu"="cyclone" "target-features"="+sse" } 109