1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 %s -o - | \ 3; RUN: FileCheck %s --check-prefixes CHECK,V8A 4; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 -mattr=+v8.3a %s -o - | \ 5; RUN: FileCheck %s --check-prefixes CHECK,V83A 6 7define void @a() "sign-return-address"="all" { 8; V8A-LABEL: a: 9; V8A: // %bb.0: 10; V8A-NEXT: .cfi_negate_ra_state 11; V8A-NEXT: hint #25 12; V8A-NEXT: sub sp, sp, #32 13; V8A-NEXT: .cfi_def_cfa_offset 32 14; V8A-NEXT: mov w8, #1 // =0x1 15; V8A-NEXT: mov w9, #2 // =0x2 16; V8A-NEXT: stp w9, w8, [sp, #24] 17; V8A-NEXT: mov w9, #3 // =0x3 18; V8A-NEXT: mov w8, #4 // =0x4 19; V8A-NEXT: stp w8, w9, [sp, #16] 20; V8A-NEXT: mov w9, #5 // =0x5 21; V8A-NEXT: mov w8, #6 // =0x6 22; V8A-NEXT: stp w8, w9, [sp, #8] 23; V8A-NEXT: add sp, sp, #32 24; V8A-NEXT: hint #29 25; V8A-NEXT: ret 26; 27; V83A-LABEL: a: 28; V83A: // %bb.0: 29; V83A-NEXT: .cfi_negate_ra_state 30; V83A-NEXT: paciasp 31; V83A-NEXT: sub sp, sp, #32 32; V83A-NEXT: .cfi_def_cfa_offset 32 33; V83A-NEXT: mov w8, #1 // =0x1 34; V83A-NEXT: mov w9, #2 // =0x2 35; V83A-NEXT: stp w9, w8, [sp, #24] 36; V83A-NEXT: mov w9, #3 // =0x3 37; V83A-NEXT: mov w8, #4 // =0x4 38; V83A-NEXT: stp w8, w9, [sp, #16] 39; V83A-NEXT: mov w9, #5 // =0x5 40; V83A-NEXT: mov w8, #6 // =0x6 41; V83A-NEXT: stp w8, w9, [sp, #8] 42; V83A-NEXT: add sp, sp, #32 43; V83A-NEXT: retaa 44 %1 = alloca i32, align 4 45 %2 = alloca i32, align 4 46 %3 = alloca i32, align 4 47 %4 = alloca i32, align 4 48 %5 = alloca i32, align 4 49 %6 = alloca i32, align 4 50 store i32 1, ptr %1, align 4 51 store i32 2, ptr %2, align 4 52 store i32 3, ptr %3, align 4 53 store i32 4, ptr %4, align 4 54 store i32 5, ptr %5, align 4 55 store i32 6, ptr %6, align 4 56 ret void 57} 58 59define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" { 60; V8A-LABEL: b: 61; V8A: // %bb.0: 62; V8A-NEXT: .cfi_b_key_frame 63; V8A-NEXT: .cfi_negate_ra_state 64; V8A-NEXT: hint #27 65; V8A-NEXT: sub sp, sp, #32 66; V8A-NEXT: .cfi_def_cfa_offset 32 67; V8A-NEXT: mov w8, #1 // =0x1 68; V8A-NEXT: mov w9, #2 // =0x2 69; V8A-NEXT: stp w9, w8, [sp, #24] 70; V8A-NEXT: mov w9, #3 // =0x3 71; V8A-NEXT: mov w8, #4 // =0x4 72; V8A-NEXT: stp w8, w9, [sp, #16] 73; V8A-NEXT: mov w9, #5 // =0x5 74; V8A-NEXT: mov w8, #6 // =0x6 75; V8A-NEXT: stp w8, w9, [sp, #8] 76; V8A-NEXT: add sp, sp, #32 77; V8A-NEXT: hint #31 78; V8A-NEXT: ret 79; 80; V83A-LABEL: b: 81; V83A: // %bb.0: 82; V83A-NEXT: .cfi_b_key_frame 83; V83A-NEXT: .cfi_negate_ra_state 84; V83A-NEXT: pacibsp 85; V83A-NEXT: sub sp, sp, #32 86; V83A-NEXT: .cfi_def_cfa_offset 32 87; V83A-NEXT: mov w8, #1 // =0x1 88; V83A-NEXT: mov w9, #2 // =0x2 89; V83A-NEXT: stp w9, w8, [sp, #24] 90; V83A-NEXT: mov w9, #3 // =0x3 91; V83A-NEXT: mov w8, #4 // =0x4 92; V83A-NEXT: stp w8, w9, [sp, #16] 93; V83A-NEXT: mov w9, #5 // =0x5 94; V83A-NEXT: mov w8, #6 // =0x6 95; V83A-NEXT: stp w8, w9, [sp, #8] 96; V83A-NEXT: add sp, sp, #32 97; V83A-NEXT: retab 98 %1 = alloca i32, align 4 99 %2 = alloca i32, align 4 100 %3 = alloca i32, align 4 101 %4 = alloca i32, align 4 102 %5 = alloca i32, align 4 103 %6 = alloca i32, align 4 104 store i32 1, ptr %1, align 4 105 store i32 2, ptr %2, align 4 106 store i32 3, ptr %3, align 4 107 store i32 4, ptr %4, align 4 108 store i32 5, ptr %5, align 4 109 store i32 6, ptr %6, align 4 110 ret void 111} 112 113define void @c() "sign-return-address"="all" { 114; V8A-LABEL: c: 115; V8A: // %bb.0: 116; V8A-NEXT: .cfi_negate_ra_state 117; V8A-NEXT: hint #25 118; V8A-NEXT: sub sp, sp, #32 119; V8A-NEXT: .cfi_def_cfa_offset 32 120; V8A-NEXT: mov w8, #1 // =0x1 121; V8A-NEXT: mov w9, #2 // =0x2 122; V8A-NEXT: stp w9, w8, [sp, #24] 123; V8A-NEXT: mov w9, #3 // =0x3 124; V8A-NEXT: mov w8, #4 // =0x4 125; V8A-NEXT: stp w8, w9, [sp, #16] 126; V8A-NEXT: mov w9, #5 // =0x5 127; V8A-NEXT: mov w8, #6 // =0x6 128; V8A-NEXT: stp w8, w9, [sp, #8] 129; V8A-NEXT: add sp, sp, #32 130; V8A-NEXT: hint #29 131; V8A-NEXT: ret 132; 133; V83A-LABEL: c: 134; V83A: // %bb.0: 135; V83A-NEXT: .cfi_negate_ra_state 136; V83A-NEXT: paciasp 137; V83A-NEXT: sub sp, sp, #32 138; V83A-NEXT: .cfi_def_cfa_offset 32 139; V83A-NEXT: mov w8, #1 // =0x1 140; V83A-NEXT: mov w9, #2 // =0x2 141; V83A-NEXT: stp w9, w8, [sp, #24] 142; V83A-NEXT: mov w9, #3 // =0x3 143; V83A-NEXT: mov w8, #4 // =0x4 144; V83A-NEXT: stp w8, w9, [sp, #16] 145; V83A-NEXT: mov w9, #5 // =0x5 146; V83A-NEXT: mov w8, #6 // =0x6 147; V83A-NEXT: stp w8, w9, [sp, #8] 148; V83A-NEXT: add sp, sp, #32 149; V83A-NEXT: retaa 150 %1 = alloca i32, align 4 151 %2 = alloca i32, align 4 152 %3 = alloca i32, align 4 153 %4 = alloca i32, align 4 154 %5 = alloca i32, align 4 155 %6 = alloca i32, align 4 156 store i32 1, ptr %1, align 4 157 store i32 2, ptr %2, align 4 158 store i32 3, ptr %3, align 4 159 store i32 4, ptr %4, align 4 160 store i32 5, ptr %5, align 4 161 store i32 6, ptr %6, align 4 162 ret void 163} 164 165; CHECK-NOT: OUTLINED_FUNCTION_0: 166; CHECK-NOT: // -- Begin function 167;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 168; CHECK: {{.*}} 169