1; Test all AArch64 subarches with scheduling models. 2; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=a64fx < %s | FileCheck %s 3; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cortex-a57 < %s | FileCheck %s 4; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cortex-a72 < %s | FileCheck %s 5; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cortex-a73 < %s | FileCheck %s 6; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cyclone < %s | FileCheck %s 7; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=exynos-m3 < %s | FileCheck %s 8; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=kryo < %s | FileCheck %s 9; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=thunderx2t99 < %s | FileCheck %s 10; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=thunderx3t110 < %s | FileCheck %s 11; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=tsv110 < %s | FileCheck %s 12 13; Make sure that inst-combine fuses the multiply add in the addressing mode of 14; the load. 15 16; CHECK-LABEL: fun: 17; CHECK-NOT: mul 18; CHECK: madd 19; CHECK-NOT: mul 20 21%class.D = type { %class.basic_string.base, [4 x i8] } 22%class.basic_string.base = type <{ i64, i64, i32 }> 23@a = global ptr zeroinitializer, align 8 24declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) 25define internal void @fun() section ".text.startup" { 26entry: 27 %tmp.i.i = alloca %class.D, align 8 28 br label %loop 29loop: 30 %conv11.i.i = phi i64 [ 0, %entry ], [ %inc.i.i, %loop ] 31 %i = phi i64 [ undef, %entry ], [ %inc.i.i, %loop ] 32 %x = load ptr, ptr @a, align 8 33 %arrayidx.i.i.i = getelementptr inbounds %class.D, ptr %x, i64 %conv11.i.i 34 call void @llvm.memcpy.p0.p0.i64(ptr align 8 nonnull %tmp.i.i, ptr align 8 %arrayidx.i.i.i, i64 24, i1 false) 35 %inc.i.i = add i64 %i, 1 36 %cmp.i.i = icmp slt i64 %inc.i.i, 0 37 br i1 %cmp.i.i, label %loop, label %exit 38exit: 39 ret void 40} 41