1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s 3; RUN: llc < %s -mtriple=aarch64 -global-isel | FileCheck %s 4 5define i32 @testmsws(float %x) { 6; CHECK-LABEL: testmsws: 7; CHECK: // %bb.0: // %entry 8; CHECK-NEXT: frintx s0, s0 9; CHECK-NEXT: fcvtzs x0, s0 10; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0 11; CHECK-NEXT: ret 12entry: 13 %0 = tail call i64 @llvm.lrint.i64.f32(float %x) 14 %conv = trunc i64 %0 to i32 15 ret i32 %conv 16} 17 18define i64 @testmsxs(float %x) { 19; CHECK-LABEL: testmsxs: 20; CHECK: // %bb.0: // %entry 21; CHECK-NEXT: frintx s0, s0 22; CHECK-NEXT: fcvtzs x0, s0 23; CHECK-NEXT: ret 24entry: 25 %0 = tail call i64 @llvm.lrint.i64.f32(float %x) 26 ret i64 %0 27} 28 29define i32 @testmswd(double %x) { 30; CHECK-LABEL: testmswd: 31; CHECK: // %bb.0: // %entry 32; CHECK-NEXT: frintx d0, d0 33; CHECK-NEXT: fcvtzs x0, d0 34; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0 35; CHECK-NEXT: ret 36entry: 37 %0 = tail call i64 @llvm.lrint.i64.f64(double %x) 38 %conv = trunc i64 %0 to i32 39 ret i32 %conv 40} 41 42define i64 @testmsxd(double %x) { 43; CHECK-LABEL: testmsxd: 44; CHECK: // %bb.0: // %entry 45; CHECK-NEXT: frintx d0, d0 46; CHECK-NEXT: fcvtzs x0, d0 47; CHECK-NEXT: ret 48entry: 49 %0 = tail call i64 @llvm.lrint.i64.f64(double %x) 50 ret i64 %0 51} 52 53define dso_local i32 @testmswl(fp128 %x) { 54; CHECK-LABEL: testmswl: 55; CHECK: // %bb.0: // %entry 56; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill 57; CHECK-NEXT: .cfi_def_cfa_offset 16 58; CHECK-NEXT: .cfi_offset w30, -16 59; CHECK-NEXT: bl lrintl 60; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0 61; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload 62; CHECK-NEXT: ret 63entry: 64 %0 = tail call i64 @llvm.lrint.i64.f128(fp128 %x) 65 %conv = trunc i64 %0 to i32 66 ret i32 %conv 67} 68 69define dso_local i64 @testmsll(fp128 %x) { 70; CHECK-LABEL: testmsll: 71; CHECK: // %bb.0: // %entry 72; CHECK-NEXT: b lrintl 73entry: 74 %0 = tail call i64 @llvm.lrint.i64.f128(fp128 %x) 75 ret i64 %0 76} 77 78declare i64 @llvm.lrint.i64.f32(float) nounwind readnone 79declare i64 @llvm.lrint.i64.f64(double) nounwind readnone 80declare i64 @llvm.lrint.i64.f128(fp128) nounwind readnone 81