1; RUN: llc < %s -mtriple=aarch64-windows -mattr=+neon | FileCheck %s 2 3; CHECK-LABEL: testmsxs: 4; CHECK: frintx [[SREG:s[0-9]+]], s0 5; CHECK-NEXT: fcvtzs [[WREG:w[0-9]+]], [[SREG]] 6; CHECK-NEXT: sxtw x0, [[WREG]] 7; CHECK-NEXT: ret 8define i64 @testmsxs(float %x) { 9entry: 10 %0 = tail call i32 @llvm.lrint.i32.f32(float %x) 11 %conv = sext i32 %0 to i64 12 ret i64 %conv 13} 14 15; CHECK-LABEL: testmsws: 16; CHECK: frintx [[SREG:s[0-9]+]], s0 17; CHECK-NEXT: fcvtzs [[WREG:w[0-9]+]], [[SREG]] 18; CHECK-NEXT: ret 19define i32 @testmsws(float %x) { 20entry: 21 %0 = tail call i32 @llvm.lrint.i32.f32(float %x) 22 ret i32 %0 23} 24 25; CHECK-LABEL: testmsxd: 26; CHECK: frintx [[DREG:d[0-9]+]], d0 27; CHECK-NEXT: fcvtzs [[WREG:w[0-9]+]], [[DREG]] 28; CHECK-NEXT: sxtw x0, [[WREG]] 29; CHECK-NEXT: ret 30define i64 @testmsxd(double %x) { 31entry: 32 %0 = tail call i32 @llvm.lrint.i32.f64(double %x) 33 %conv = sext i32 %0 to i64 34 ret i64 %conv 35} 36 37; CHECK-LABEL: testmswd: 38; CHECK: frintx [[DREG:d[0-9]+]], d0 39; CHECK-NEXT: fcvtzs [[WREG:w[0-9]+]], [[DREG]] 40; CHECK-NEXT: ret 41define i32 @testmswd(double %x) { 42entry: 43 %0 = tail call i32 @llvm.lrint.i32.f64(double %x) 44 ret i32 %0 45} 46 47declare i32 @llvm.lrint.i32.f32(float) nounwind readnone 48declare i32 @llvm.lrint.i32.f64(double) nounwind readnone 49