xref: /llvm-project/llvm/test/CodeGen/AArch64/logic-reassociate.ll (revision db158c7c830807caeeb0691739c41f1d522029e9)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-- -o - %s | FileCheck %s
3
4define i32 @and_commute0(i32 %x, i32 %y) {
5; CHECK-LABEL: and_commute0:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    and w0, w0, w1
8; CHECK-NEXT:    ret
9  %b = and i32 %x, %y
10  %b2 = and i32 %x, %b
11  ret i32 %b2
12}
13
14define i128 @and_commute1(i128 %x, i128 %y) {
15; CHECK-LABEL: and_commute1:
16; CHECK:       // %bb.0:
17; CHECK-NEXT:    and x1, x3, x1
18; CHECK-NEXT:    and x0, x2, x0
19; CHECK-NEXT:    ret
20  %b = and i128 %y, %x
21  %b2 = and i128 %x, %b
22  ret i128 %b2
23}
24
25define <4 x i32> @and_commute2(<4 x i32> %x, <4 x i32> %y) {
26; CHECK-LABEL: and_commute2:
27; CHECK:       // %bb.0:
28; CHECK-NEXT:    and v0.16b, v0.16b, v1.16b
29; CHECK-NEXT:    ret
30  %b = and <4 x i32> %x, %y
31  %b2 = and <4 x i32> %b, %x
32  ret <4 x i32> %b2
33}
34
35define <8 x i16> @and_commute3(<8 x i16> %x, <8 x i16> %y) {
36; CHECK-LABEL: and_commute3:
37; CHECK:       // %bb.0:
38; CHECK-NEXT:    and v0.16b, v1.16b, v0.16b
39; CHECK-NEXT:    ret
40  %b = and <8 x i16> %y, %x
41  %b2 = and <8 x i16> %b, %x
42  ret <8 x i16> %b2
43}
44
45define i16 @or_commute0(i16 %x, i16 %y) {
46; CHECK-LABEL: or_commute0:
47; CHECK:       // %bb.0:
48; CHECK-NEXT:    orr w0, w0, w1
49; CHECK-NEXT:    ret
50  %b = or i16 %x, %y
51  %b2 = or i16 %x, %b
52  ret i16 %b2
53}
54
55define i8 @or_commute1(i8 %x, i8 %y) {
56; CHECK-LABEL: or_commute1:
57; CHECK:       // %bb.0:
58; CHECK-NEXT:    orr w0, w1, w0
59; CHECK-NEXT:    ret
60  %b = or i8 %y, %x
61  %b2 = or i8 %x, %b
62  ret i8 %b2
63}
64
65define <2 x i64> @or_commute2(<2 x i64> %x, <2 x i64> %y) {
66; CHECK-LABEL: or_commute2:
67; CHECK:       // %bb.0:
68; CHECK-NEXT:    orr v0.16b, v0.16b, v1.16b
69; CHECK-NEXT:    ret
70  %b = or <2 x i64> %x, %y
71  %b2 = or <2 x i64> %b, %x
72  ret <2 x i64> %b2
73}
74
75define <8 x i64> @or_commute3(<8 x i64> %x, <8 x i64> %y) {
76; CHECK-LABEL: or_commute3:
77; CHECK:       // %bb.0:
78; CHECK-NEXT:    orr v2.16b, v6.16b, v2.16b
79; CHECK-NEXT:    orr v0.16b, v4.16b, v0.16b
80; CHECK-NEXT:    orr v1.16b, v5.16b, v1.16b
81; CHECK-NEXT:    orr v3.16b, v7.16b, v3.16b
82; CHECK-NEXT:    ret
83  %b = or <8 x i64> %y, %x
84  %b2 = or <8 x i64> %b, %x
85  ret <8 x i64> %b2
86}
87
88define <16 x i8> @xor_commute0(<16 x i8> %x, <16 x i8> %y) {
89; CHECK-LABEL: xor_commute0:
90; CHECK:       // %bb.0:
91; CHECK-NEXT:    mov v0.16b, v1.16b
92; CHECK-NEXT:    ret
93  %b = xor <16 x i8> %x, %y
94  %b2 = xor <16 x i8> %x, %b
95  ret <16 x i8> %b2
96}
97
98define <8 x i32> @xor_commute1(<8 x i32> %x, <8 x i32> %y) {
99; CHECK-LABEL: xor_commute1:
100; CHECK:       // %bb.0:
101; CHECK-NEXT:    mov v1.16b, v3.16b
102; CHECK-NEXT:    mov v0.16b, v2.16b
103; CHECK-NEXT:    ret
104  %b = xor <8 x i32> %y, %x
105  %b2 = xor <8 x i32> %x, %b
106  ret <8 x i32> %b2
107}
108
109define i64 @xor_commute2(i64 %x, i64 %y) {
110; CHECK-LABEL: xor_commute2:
111; CHECK:       // %bb.0:
112; CHECK-NEXT:    mov x0, x1
113; CHECK-NEXT:    ret
114  %b = xor i64 %x, %y
115  %b2 = xor i64 %b, %x
116  ret i64 %b2
117}
118
119define i78 @xor_commute3(i78 %x, i78 %y) {
120; CHECK-LABEL: xor_commute3:
121; CHECK:       // %bb.0:
122; CHECK-NEXT:    mov x1, x3
123; CHECK-NEXT:    mov x0, x2
124; CHECK-NEXT:    ret
125  %b = xor i78 %y, %x
126  %b2 = xor i78 %b, %x
127  ret i78 %b2
128}
129