xref: /llvm-project/llvm/test/CodeGen/AArch64/llround-conv-fp16.ll (revision adc550918667c35b8f6066603faad97e2975ed76)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK-NOFP16
3; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK-FP16
4
5define i16 @testmhhs(half %x) {
6; CHECK-NOFP16-LABEL: testmhhs:
7; CHECK-NOFP16:       // %bb.0: // %entry
8; CHECK-NOFP16-NEXT:    fcvt s0, h0
9; CHECK-NOFP16-NEXT:    fcvtas x0, s0
10; CHECK-NOFP16-NEXT:    // kill: def $w0 killed $w0 killed $x0
11; CHECK-NOFP16-NEXT:    ret
12;
13; CHECK-FP16-LABEL: testmhhs:
14; CHECK-FP16:       // %bb.0: // %entry
15; CHECK-FP16-NEXT:    fcvtas x0, h0
16; CHECK-FP16-NEXT:    // kill: def $w0 killed $w0 killed $x0
17; CHECK-FP16-NEXT:    ret
18entry:
19  %0 = tail call i64 @llvm.llround.i64.f16(half %x)
20  %conv = trunc i64 %0 to i16
21  ret i16 %conv
22}
23
24define i32 @testmhws(half %x) {
25; CHECK-NOFP16-LABEL: testmhws:
26; CHECK-NOFP16:       // %bb.0: // %entry
27; CHECK-NOFP16-NEXT:    fcvt s0, h0
28; CHECK-NOFP16-NEXT:    fcvtas x0, s0
29; CHECK-NOFP16-NEXT:    // kill: def $w0 killed $w0 killed $x0
30; CHECK-NOFP16-NEXT:    ret
31;
32; CHECK-FP16-LABEL: testmhws:
33; CHECK-FP16:       // %bb.0: // %entry
34; CHECK-FP16-NEXT:    fcvtas x0, h0
35; CHECK-FP16-NEXT:    // kill: def $w0 killed $w0 killed $x0
36; CHECK-FP16-NEXT:    ret
37entry:
38  %0 = tail call i64 @llvm.llround.i64.f16(half %x)
39  %conv = trunc i64 %0 to i32
40  ret i32 %conv
41}
42
43define i64 @testmhxs(half %x) {
44; CHECK-NOFP16-LABEL: testmhxs:
45; CHECK-NOFP16:       // %bb.0: // %entry
46; CHECK-NOFP16-NEXT:    fcvt s0, h0
47; CHECK-NOFP16-NEXT:    fcvtas x0, s0
48; CHECK-NOFP16-NEXT:    ret
49;
50; CHECK-FP16-LABEL: testmhxs:
51; CHECK-FP16:       // %bb.0: // %entry
52; CHECK-FP16-NEXT:    fcvtas x0, h0
53; CHECK-FP16-NEXT:    ret
54entry:
55  %0 = tail call i64 @llvm.llround.i64.f16(half %x)
56  ret i64 %0
57}
58
59declare i64 @llvm.llround.i64.f16(half) nounwind readnone
60