1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mcpu cortex-a53 < %s | FileCheck %s 3target datalayout = "e-m:e-i64:64-i128:128-n8:16:32:64-S128" 4target triple = "aarch64--linux-gnu" 5 6declare void @f(ptr, ptr) 7declare void @f2(ptr, ptr) 8declare void @_Z5setupv() 9declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) #3 10 11define i32 @main() local_unnamed_addr #1 { 12; Make sure the stores happen in the correct order (the exact instructions could change). 13; CHECK-LABEL: main: 14; CHECK: // %bb.0: // %for.body.lr.ph.i.i.i.i.i.i63 15; CHECK-NEXT: sub sp, sp, #112 16; CHECK-NEXT: str x30, [sp, #96] // 8-byte Folded Spill 17; CHECK-NEXT: .cfi_def_cfa_offset 112 18; CHECK-NEXT: .cfi_offset w30, -16 19; CHECK-NEXT: bl _Z5setupv 20; CHECK-NEXT: movi v0.4s, #1 21; CHECK-NEXT: mov w9, #1 22; CHECK-NEXT: add x0, sp, #48 23; CHECK-NEXT: mov x1, sp 24; CHECK-NEXT: str xzr, [sp, #80] 25; CHECK-NEXT: str w9, [sp, #80] 26; CHECK-NEXT: stp q0, q0, [sp, #48] 27; CHECK-NEXT: ldr w8, [sp, #48] 28; CHECK-NEXT: cmp w8, #1 29; CHECK-NEXT: b.ne .LBB0_2 30; CHECK-NEXT: // %bb.1: // %for.inc 31; CHECK-NEXT: bl f 32; CHECK-NEXT: b .LBB0_3 33; CHECK-NEXT: .LBB0_2: // %if.then 34; CHECK-NEXT: bl f2 35; CHECK-NEXT: .LBB0_3: // %common.ret 36; CHECK-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload 37; CHECK-NEXT: mov w0, wzr 38; CHECK-NEXT: add sp, sp, #112 39; CHECK-NEXT: ret 40 41 42for.body.lr.ph.i.i.i.i.i.i63: 43 %b1 = alloca [10 x i32], align 16 44 %b2 = alloca [10 x i32], align 16 45 tail call void @_Z5setupv() 46 %x2 = getelementptr inbounds [10 x i32], ptr %b1, i64 0, i64 6 47 call void @llvm.memset.p0.i64(ptr align 8 %x2, i8 0, i64 16, i1 false) 48 store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, ptr %b1, align 16 49 %incdec.ptr.i7.i.i.i.i.i.i64.3 = getelementptr inbounds [10 x i32], ptr %b1, i64 0, i64 4 50 store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, ptr %incdec.ptr.i7.i.i.i.i.i.i64.3, align 16 51 %incdec.ptr.i7.i.i.i.i.i.i64.7 = getelementptr inbounds [10 x i32], ptr %b1, i64 0, i64 8 52 store i32 1, ptr %incdec.ptr.i7.i.i.i.i.i.i64.7, align 16 53 %x6 = load i32, ptr %b1, align 16 54 %cmp6 = icmp eq i32 %x6, 1 55 br i1 %cmp6, label %for.inc, label %if.then 56 57for.inc: 58 call void @f(ptr %b1, ptr %b2) 59 ret i32 0 60 61if.then: 62 call void @f2(ptr %b1, ptr %b2) 63 ret i32 0 64} 65