1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2;; These test functions previously triggered the following error when emitting machine code: 3;; LLVM ERROR: Attempting to emit UCVTFv1i64 instruction but the Feature_HasNEON predicate(s) are not met 4; RUN: llc -mtriple=aarch64 -mattr=+neon,+fullfp16,+alternate-sextload-cvt-f32-pattern < %s | FileCheck %s --check-prefixes=CHECK,NEON-ENABLED 5; RUN: llc -mtriple=aarch64 -mattr=-neon,+fullfp16,+alternate-sextload-cvt-f32-pattern < %s | FileCheck %s --check-prefixes=CHECK,NEON-DISABLED 6;; Emit an object file so that verifyPredicates is called (it is not used for ASM output). 7; RUN: llc -mtriple=aarch64 -mattr=-neon,+fullfp16 -o /dev/null %s --asm-show-inst -filetype=obj 8 9define double @ui8_to_double(ptr %i, ptr %f) { 10; NEON-ENABLED-LABEL: ui8_to_double: 11; NEON-ENABLED: // %bb.0: // %entry 12; NEON-ENABLED-NEXT: ldr b0, [x0] 13; NEON-ENABLED-NEXT: ucvtf d0, d0 14; NEON-ENABLED-NEXT: ret 15; 16; NEON-DISABLED-LABEL: ui8_to_double: 17; NEON-DISABLED: // %bb.0: // %entry 18; NEON-DISABLED-NEXT: ldrb w8, [x0] 19; NEON-DISABLED-NEXT: ucvtf d0, w8 20; NEON-DISABLED-NEXT: ret 21entry: 22 %ld = load i8, ptr %i, align 1 23 %conv = uitofp i8 %ld to double 24 ret double %conv 25} 26 27define float @ui8_to_float(ptr %i, ptr %f) { 28; NEON-ENABLED-LABEL: ui8_to_float: 29; NEON-ENABLED: // %bb.0: // %entry 30; NEON-ENABLED-NEXT: ldr b0, [x0] 31; NEON-ENABLED-NEXT: ucvtf s0, s0 32; NEON-ENABLED-NEXT: ret 33; 34; NEON-DISABLED-LABEL: ui8_to_float: 35; NEON-DISABLED: // %bb.0: // %entry 36; NEON-DISABLED-NEXT: ldrb w8, [x0] 37; NEON-DISABLED-NEXT: ucvtf s0, w8 38; NEON-DISABLED-NEXT: ret 39entry: 40 %ld = load i8, ptr %i, align 1 41 %conv = uitofp i8 %ld to float 42 ret float %conv 43} 44 45define half @ui8_to_half(ptr %i, ptr %f) { 46; CHECK-LABEL: ui8_to_half: 47; CHECK: // %bb.0: // %entry 48; CHECK-NEXT: ldrb w8, [x0] 49; CHECK-NEXT: ucvtf h0, w8 50; CHECK-NEXT: ret 51entry: 52 %ld = load i8, ptr %i, align 1 53 %conv = uitofp i8 %ld to half 54 ret half %conv 55} 56 57define double @ui16_to_double(ptr %i, ptr %f) { 58; NEON-ENABLED-LABEL: ui16_to_double: 59; NEON-ENABLED: // %bb.0: // %entry 60; NEON-ENABLED-NEXT: ldr h0, [x0] 61; NEON-ENABLED-NEXT: ucvtf d0, d0 62; NEON-ENABLED-NEXT: ret 63; 64; NEON-DISABLED-LABEL: ui16_to_double: 65; NEON-DISABLED: // %bb.0: // %entry 66; NEON-DISABLED-NEXT: ldrh w8, [x0] 67; NEON-DISABLED-NEXT: ucvtf d0, w8 68; NEON-DISABLED-NEXT: ret 69entry: 70 %ld = load i16, ptr %i, align 1 71 %conv = uitofp i16 %ld to double 72 ret double %conv 73} 74 75define float @ui16_to_float(ptr %i, ptr %f) { 76; NEON-ENABLED-LABEL: ui16_to_float: 77; NEON-ENABLED: // %bb.0: // %entry 78; NEON-ENABLED-NEXT: ldr h0, [x0] 79; NEON-ENABLED-NEXT: ucvtf s0, s0 80; NEON-ENABLED-NEXT: ret 81; 82; NEON-DISABLED-LABEL: ui16_to_float: 83; NEON-DISABLED: // %bb.0: // %entry 84; NEON-DISABLED-NEXT: ldrh w8, [x0] 85; NEON-DISABLED-NEXT: ucvtf s0, w8 86; NEON-DISABLED-NEXT: ret 87entry: 88 %ld = load i16, ptr %i, align 1 89 %conv = uitofp i16 %ld to float 90 ret float %conv 91} 92 93define half @ui16_to_half(ptr %i, ptr %f) { 94; CHECK-LABEL: ui16_to_half: 95; CHECK: // %bb.0: // %entry 96; CHECK-NEXT: ldrh w8, [x0] 97; CHECK-NEXT: ucvtf h0, w8 98; CHECK-NEXT: ret 99entry: 100 %ld = load i16, ptr %i, align 1 101 %conv = uitofp i16 %ld to half 102 ret half %conv 103} 104 105define double @ui32_to_double(ptr %i, ptr %f) { 106; NEON-ENABLED-LABEL: ui32_to_double: 107; NEON-ENABLED: // %bb.0: // %entry 108; NEON-ENABLED-NEXT: ldr s0, [x0] 109; NEON-ENABLED-NEXT: ucvtf d0, d0 110; NEON-ENABLED-NEXT: ret 111; 112; NEON-DISABLED-LABEL: ui32_to_double: 113; NEON-DISABLED: // %bb.0: // %entry 114; NEON-DISABLED-NEXT: ldr w8, [x0] 115; NEON-DISABLED-NEXT: ucvtf d0, w8 116; NEON-DISABLED-NEXT: ret 117entry: 118 %ld = load i32, ptr %i, align 1 119 %conv = uitofp i32 %ld to double 120 ret double %conv 121} 122 123define float @ui32_to_float(ptr %i, ptr %f) { 124; NEON-ENABLED-LABEL: ui32_to_float: 125; NEON-ENABLED: // %bb.0: // %entry 126; NEON-ENABLED-NEXT: ldr s0, [x0] 127; NEON-ENABLED-NEXT: ucvtf s0, s0 128; NEON-ENABLED-NEXT: ret 129; 130; NEON-DISABLED-LABEL: ui32_to_float: 131; NEON-DISABLED: // %bb.0: // %entry 132; NEON-DISABLED-NEXT: ldr w8, [x0] 133; NEON-DISABLED-NEXT: ucvtf s0, w8 134; NEON-DISABLED-NEXT: ret 135entry: 136 %ld = load i32, ptr %i, align 1 137 %conv = uitofp i32 %ld to float 138 ret float %conv 139} 140 141define half @ui32_to_half(ptr %i, ptr %f) { 142; CHECK-LABEL: ui32_to_half: 143; CHECK: // %bb.0: // %entry 144; CHECK-NEXT: ldr w8, [x0] 145; CHECK-NEXT: ucvtf h0, w8 146; CHECK-NEXT: ret 147entry: 148 %ld = load i32, ptr %i, align 1 149 %conv = uitofp i32 %ld to half 150 ret half %conv 151} 152 153define double @ui64_to_double(ptr %i, ptr %f) { 154; NEON-ENABLED-LABEL: ui64_to_double: 155; NEON-ENABLED: // %bb.0: // %entry 156; NEON-ENABLED-NEXT: ldr d0, [x0] 157; NEON-ENABLED-NEXT: ucvtf d0, d0 158; NEON-ENABLED-NEXT: ret 159; 160; NEON-DISABLED-LABEL: ui64_to_double: 161; NEON-DISABLED: // %bb.0: // %entry 162; NEON-DISABLED-NEXT: ldr x8, [x0] 163; NEON-DISABLED-NEXT: ucvtf d0, x8 164; NEON-DISABLED-NEXT: ret 165entry: 166 %ld = load i64, ptr %i, align 1 167 %conv = uitofp i64 %ld to double 168 ret double %conv 169} 170 171define float @ui64_to_float(ptr %i, ptr %f) { 172; CHECK-LABEL: ui64_to_float: 173; CHECK: // %bb.0: // %entry 174; CHECK-NEXT: ldr x8, [x0] 175; CHECK-NEXT: ucvtf s0, x8 176; CHECK-NEXT: ret 177entry: 178 %ld = load i64, ptr %i, align 1 179 %conv = uitofp i64 %ld to float 180 ret float %conv 181} 182 183define half @ui64_to_half(ptr %i, ptr %f) { 184; CHECK-LABEL: ui64_to_half: 185; CHECK: // %bb.0: // %entry 186; CHECK-NEXT: ldr x8, [x0] 187; CHECK-NEXT: ucvtf h0, x8 188; CHECK-NEXT: ret 189entry: 190 %ld = load i64, ptr %i, align 1 191 %conv = uitofp i64 %ld to half 192 ret half %conv 193} 194 195 196define double @si8_to_double(ptr %i, ptr %f) { 197; CHECK-LABEL: si8_to_double: 198; CHECK: // %bb.0: // %entry 199; CHECK-NEXT: ldrsb w8, [x0] 200; CHECK-NEXT: scvtf d0, w8 201; CHECK-NEXT: ret 202entry: 203 %ld = load i8, ptr %i, align 1 204 %conv = sitofp i8 %ld to double 205 ret double %conv 206} 207 208define float @si8_to_float(ptr %i, ptr %f) { 209; NEON-ENABLED-LABEL: si8_to_float: 210; NEON-ENABLED: // %bb.0: // %entry 211; NEON-ENABLED-NEXT: ldr b0, [x0] 212; NEON-ENABLED-NEXT: sshll v0.8h, v0.8b, #0 213; NEON-ENABLED-NEXT: sshll v0.4s, v0.4h, #0 214; NEON-ENABLED-NEXT: scvtf s0, s0 215; NEON-ENABLED-NEXT: ret 216; 217; NEON-DISABLED-LABEL: si8_to_float: 218; NEON-DISABLED: // %bb.0: // %entry 219; NEON-DISABLED-NEXT: ldrsb w8, [x0] 220; NEON-DISABLED-NEXT: scvtf s0, w8 221; NEON-DISABLED-NEXT: ret 222entry: 223 %ld = load i8, ptr %i, align 1 224 %conv = sitofp i8 %ld to float 225 ret float %conv 226} 227 228define half @si8_to_half(ptr %i, ptr %f) { 229; CHECK-LABEL: si8_to_half: 230; CHECK: // %bb.0: // %entry 231; CHECK-NEXT: ldrsb w8, [x0] 232; CHECK-NEXT: scvtf h0, w8 233; CHECK-NEXT: ret 234entry: 235 %ld = load i8, ptr %i, align 1 236 %conv = sitofp i8 %ld to half 237 ret half %conv 238} 239 240define double @si16_to_double(ptr %i, ptr %f) { 241; NEON-ENABLED-LABEL: si16_to_double: 242; NEON-ENABLED: // %bb.0: // %entry 243; NEON-ENABLED-NEXT: ldr h0, [x0] 244; NEON-ENABLED-NEXT: sshll v0.4s, v0.4h, #0 245; NEON-ENABLED-NEXT: sshll v0.2d, v0.2s, #0 246; NEON-ENABLED-NEXT: scvtf d0, d0 247; NEON-ENABLED-NEXT: ret 248; 249; NEON-DISABLED-LABEL: si16_to_double: 250; NEON-DISABLED: // %bb.0: // %entry 251; NEON-DISABLED-NEXT: ldrsh w8, [x0] 252; NEON-DISABLED-NEXT: scvtf d0, w8 253; NEON-DISABLED-NEXT: ret 254entry: 255 %ld = load i16, ptr %i, align 1 256 %conv = sitofp i16 %ld to double 257 ret double %conv 258} 259 260define float @si16_to_float(ptr %i, ptr %f) { 261; NEON-ENABLED-LABEL: si16_to_float: 262; NEON-ENABLED: // %bb.0: // %entry 263; NEON-ENABLED-NEXT: ldr h0, [x0] 264; NEON-ENABLED-NEXT: sshll v0.4s, v0.4h, #0 265; NEON-ENABLED-NEXT: scvtf s0, s0 266; NEON-ENABLED-NEXT: ret 267; 268; NEON-DISABLED-LABEL: si16_to_float: 269; NEON-DISABLED: // %bb.0: // %entry 270; NEON-DISABLED-NEXT: ldrsh w8, [x0] 271; NEON-DISABLED-NEXT: scvtf s0, w8 272; NEON-DISABLED-NEXT: ret 273entry: 274 %ld = load i16, ptr %i, align 1 275 %conv = sitofp i16 %ld to float 276 ret float %conv 277} 278 279define half @si16_to_half(ptr %i, ptr %f) { 280; CHECK-LABEL: si16_to_half: 281; CHECK: // %bb.0: // %entry 282; CHECK-NEXT: ldrsh w8, [x0] 283; CHECK-NEXT: scvtf h0, w8 284; CHECK-NEXT: ret 285entry: 286 %ld = load i16, ptr %i, align 1 287 %conv = sitofp i16 %ld to half 288 ret half %conv 289} 290 291define double @si32_to_double(ptr %i, ptr %f) { 292; NEON-ENABLED-LABEL: si32_to_double: 293; NEON-ENABLED: // %bb.0: // %entry 294; NEON-ENABLED-NEXT: ldr s0, [x0] 295; NEON-ENABLED-NEXT: sshll v0.2d, v0.2s, #0 296; NEON-ENABLED-NEXT: scvtf d0, d0 297; NEON-ENABLED-NEXT: ret 298; 299; NEON-DISABLED-LABEL: si32_to_double: 300; NEON-DISABLED: // %bb.0: // %entry 301; NEON-DISABLED-NEXT: ldr w8, [x0] 302; NEON-DISABLED-NEXT: scvtf d0, w8 303; NEON-DISABLED-NEXT: ret 304entry: 305 %ld = load i32, ptr %i, align 1 306 %conv = sitofp i32 %ld to double 307 ret double %conv 308} 309 310define float @si32_to_float(ptr %i, ptr %f) { 311; NEON-ENABLED-LABEL: si32_to_float: 312; NEON-ENABLED: // %bb.0: // %entry 313; NEON-ENABLED-NEXT: ldr s0, [x0] 314; NEON-ENABLED-NEXT: scvtf s0, s0 315; NEON-ENABLED-NEXT: ret 316; 317; NEON-DISABLED-LABEL: si32_to_float: 318; NEON-DISABLED: // %bb.0: // %entry 319; NEON-DISABLED-NEXT: ldr w8, [x0] 320; NEON-DISABLED-NEXT: scvtf s0, w8 321; NEON-DISABLED-NEXT: ret 322entry: 323 %ld = load i32, ptr %i, align 1 324 %conv = sitofp i32 %ld to float 325 ret float %conv 326} 327 328define half @si32_to_half(ptr %i, ptr %f) { 329; CHECK-LABEL: si32_to_half: 330; CHECK: // %bb.0: // %entry 331; CHECK-NEXT: ldr w8, [x0] 332; CHECK-NEXT: scvtf h0, w8 333; CHECK-NEXT: ret 334entry: 335 %ld = load i32, ptr %i, align 1 336 %conv = sitofp i32 %ld to half 337 ret half %conv 338} 339 340define double @si64_to_double(ptr %i, ptr %f) { 341; NEON-ENABLED-LABEL: si64_to_double: 342; NEON-ENABLED: // %bb.0: // %entry 343; NEON-ENABLED-NEXT: ldr d0, [x0] 344; NEON-ENABLED-NEXT: scvtf d0, d0 345; NEON-ENABLED-NEXT: ret 346; 347; NEON-DISABLED-LABEL: si64_to_double: 348; NEON-DISABLED: // %bb.0: // %entry 349; NEON-DISABLED-NEXT: ldr x8, [x0] 350; NEON-DISABLED-NEXT: scvtf d0, x8 351; NEON-DISABLED-NEXT: ret 352entry: 353 %ld = load i64, ptr %i, align 1 354 %conv = sitofp i64 %ld to double 355 ret double %conv 356} 357 358define float @si64_to_float(ptr %i, ptr %f) { 359; CHECK-LABEL: si64_to_float: 360; CHECK: // %bb.0: // %entry 361; CHECK-NEXT: ldr x8, [x0] 362; CHECK-NEXT: scvtf s0, x8 363; CHECK-NEXT: ret 364entry: 365 %ld = load i64, ptr %i, align 1 366 %conv = sitofp i64 %ld to float 367 ret float %conv 368} 369 370define half @si64_to_half(ptr %i, ptr %f) { 371; CHECK-LABEL: si64_to_half: 372; CHECK: // %bb.0: // %entry 373; CHECK-NEXT: ldr x8, [x0] 374; CHECK-NEXT: scvtf h0, x8 375; CHECK-NEXT: ret 376entry: 377 %ld = load i64, ptr %i, align 1 378 %conv = sitofp i64 %ld to half 379 ret half %conv 380} 381