1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2; RUN: llc < %s -o - | FileCheck %s 3 4target triple = "arm64-none-linux-gnu" 5 6define void @test_constraints_Uci_w(i32 %a) { 7; CHECK-LABEL: test_constraints_Uci_w: 8; CHECK: // %bb.0: 9; CHECK-NEXT: mov w8, w0 10; CHECK-NEXT: //APP 11; CHECK-NEXT: add x0, x0, x8 12; CHECK-NEXT: //NO_APP 13; CHECK-NEXT: ret 14 call void asm sideeffect "add x0, x0, $0", "@3Uci,~{x0}"(i32 %a) 15 ret void 16} 17 18; As test_constraints_Uci_w but ensures non-legal types are also covered. 19define void @test_constraints_Uci_w_i8(i8 %a) { 20; CHECK-LABEL: test_constraints_Uci_w_i8: 21; CHECK: // %bb.0: 22; CHECK-NEXT: mov w8, w0 23; CHECK-NEXT: //APP 24; CHECK-NEXT: add x0, x0, x8 25; CHECK-NEXT: //NO_APP 26; CHECK-NEXT: ret 27 call void asm sideeffect "add x0, x0, $0", "@3Uci,~{x0}"(i8 %a) 28 ret void 29} 30 31define void @test_constraints_Uci_x(i64 %a) { 32; CHECK-LABEL: test_constraints_Uci_x: 33; CHECK: // %bb.0: 34; CHECK-NEXT: mov x8, x0 35; CHECK-NEXT: //APP 36; CHECK-NEXT: add x0, x0, x8 37; CHECK-NEXT: //NO_APP 38; CHECK-NEXT: ret 39 call void asm sideeffect "add x0, x0, $0", "@3Uci,~{x0}"(i64 %a) 40 ret void 41} 42 43define void @test_constraint_Ucj_w(i32 %a) { 44; CHECK-LABEL: test_constraint_Ucj_w: 45; CHECK: // %bb.0: 46; CHECK-NEXT: mov w12, w0 47; CHECK-NEXT: //APP 48; CHECK-NEXT: add x0, x0, x12 49; CHECK-NEXT: //NO_APP 50; CHECK-NEXT: ret 51 call void asm sideeffect "add x0, x0, $0", "@3Ucj,~{x0}"(i32 %a) 52 ret void 53} 54 55; As test_constraints_Ucj_w but ensures non-legal types are also covered. 56define void @test_constraint_Ucj_w_i8(i8 %a) { 57; CHECK-LABEL: test_constraint_Ucj_w_i8: 58; CHECK: // %bb.0: 59; CHECK-NEXT: mov w12, w0 60; CHECK-NEXT: //APP 61; CHECK-NEXT: add x0, x0, x12 62; CHECK-NEXT: //NO_APP 63; CHECK-NEXT: ret 64 call void asm sideeffect "add x0, x0, $0", "@3Ucj,~{x0}"(i8 %a) 65 ret void 66} 67 68define void @test_constraint_Ucj_x(i64 %a) { 69; CHECK-LABEL: test_constraint_Ucj_x: 70; CHECK: // %bb.0: 71; CHECK-NEXT: mov x12, x0 72; CHECK-NEXT: //APP 73; CHECK-NEXT: add x0, x0, x12 74; CHECK-NEXT: //NO_APP 75; CHECK-NEXT: ret 76 call void asm sideeffect "add x0, x0, $0", "@3Ucj,~{x0}"(i64 %a) 77 ret void 78} 79