xref: /llvm-project/llvm/test/CodeGen/AArch64/inlineasm-S-constraint.ll (revision d4de4c3eafa9b70c255a4d6d5a14dccff79d10e9)
1;RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s
2@var = global i32 0
3@a = external global [2 x [2 x i32]], align 4
4
5define void @test_inline_constraint_S() {
6; CHECK-LABEL: test_inline_constraint_S:
7  call void asm sideeffect "adrp x0, $0", "S"(ptr @var)
8  call void asm sideeffect "add x0, x0, :lo12:$0", "S"(ptr @var)
9  call void asm sideeffect "// $0", "S"(ptr getelementptr inbounds ([2 x [2 x i32]], ptr @a, i64 0, i64 1, i64 1))
10; CHECK: adrp x0, var
11; CHECK: add x0, x0, :lo12:var
12; CHECK: // a+12
13  ret void
14}
15define i32 @test_inline_constraint_S_label(i1 %in) {
16; CHECK-LABEL: test_inline_constraint_S_label:
17  call void asm sideeffect "adr x0, $0", "S"(ptr blockaddress(@test_inline_constraint_S_label, %loc))
18; CHECK: adr x0, .Ltmp{{[0-9]+}}
19br i1 %in, label %loc, label %loc2
20loc:
21  ret i32 0
22loc2:
23  ret i32 42
24}
25define i32 @test_inline_constraint_S_label_tailmerged(i1 %in) {
26; CHECK-LABEL: test_inline_constraint_S_label_tailmerged:
27  call void asm sideeffect "adr x0, $0", "S"(ptr blockaddress(@test_inline_constraint_S_label_tailmerged, %loc))
28; CHECK: adr x0, .Ltmp{{[0-9]+}}
29br i1 %in, label %loc, label %loc2
30loc:
31  br label %common.ret
32loc2:
33  br label %common.ret
34common.ret:
35  %common.retval = phi i32 [ 0, %loc ], [ 42, %loc2 ]
36  ret i32 %common.retval
37}
38
39define i32 @test_inline_constraint_S_label_tailmerged2(i1 %in) {
40; CHECK-LABEL: test_inline_constraint_S_label_tailmerged2:
41  call void asm sideeffect "adr x0, $0", "S"(ptr blockaddress(@test_inline_constraint_S_label_tailmerged2, %loc))
42; CHECK: adr x0, .Ltmp{{[0-9]+}}
43  br i1 %in, label %loc, label %loc2
44common.ret:
45  %common.retval = phi i32 [ 0, %loc ], [ 42, %loc2 ]
46  ret i32 %common.retval
47loc:
48  br label %common.ret
49loc2:
50  br label %common.ret
51}
52