xref: /llvm-project/llvm/test/CodeGen/AArch64/inline-asm-constraints-bad-sve.ll (revision 1ee315ae7964c8433b772e0b5d667834994ba753)
1; RUN: not llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -o - %s 2>&1 | FileCheck %s
2
3target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
4target triple = "aarch64-unknown-linux-gnu"
5
6; CHECK: error: couldn't allocate input reg for constraint 'Upa'
7; CHECK: error: couldn't allocate input reg for constraint 'r'
8; CHECK: error: couldn't allocate output register for constraint 'w'
9; CHECK: error: unknown token in expression
10
11define <vscale x 16 x i1> @foo1(ptr %in) {
12entry:
13  %0 = load i32, ptr %in, align 4
14  %1 = call <vscale x 16 x i1> asm sideeffect "mov $0.b, $1.b \0A", "=@3Upa,@3Upa"(i32 %0)
15  ret <vscale x 16 x i1> %1
16}
17
18define <vscale x 4 x float> @foo2(ptr %in) {
19entry:
20  %0 = load <vscale x 4 x i32>, ptr %in, align 16
21  %1 = call <vscale x 4 x float> asm sideeffect "ptrue p0.s, #1 \0Afabs $0.s, p0/m, $1.s \0A", "=w,r"(<vscale x 4 x i32> %0)
22  ret <vscale x 4 x float> %1
23}
24
25define <vscale x 16 x i1> @foo3(ptr %in) {
26entry:
27  %0 = load <vscale x 16 x i1>, ptr %in, align 2
28  %1 = call <vscale x 16 x i1> asm sideeffect "mov $0.b, $1.b \0A", "=&w,w"(<vscale x 16 x i1> %0)
29  ret <vscale x 16 x i1> %1
30}
31
32define half @foo4(ptr %inp, ptr %inv) {
33entry:
34  %0 = load <vscale x 16 x i1>, ptr %inp, align 2
35  %1 = load <vscale x 8 x half>, ptr %inv, align 16
36  %2 = call half asm "fminv ${0:h}, $1, $2.h", "=r,@3Upl,w"(<vscale x 16 x i1> %0, <vscale x 8 x half> %1)
37  ret half %2
38}
39