xref: /llvm-project/llvm/test/CodeGen/AArch64/icmp-cst.ll (revision 46c05dfb6c98870f8416eeb9bf787d54ac806b12) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=0 < %s | FileCheck %s --check-prefix=CHECK-SD
3; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck %s --check-prefix=CHECK-GI
4
5define i1 @ule_11111111(i32 noundef %in) {
6; CHECK-SD-LABEL: ule_11111111:
7; CHECK-SD:       // %bb.0:
8; CHECK-SD-NEXT:    mov w8, #4370 // =0x1112
9; CHECK-SD-NEXT:    movk w8, #4369, lsl #16
10; CHECK-SD-NEXT:    cmp w0, w8
11; CHECK-SD-NEXT:    cset w0, lo
12; CHECK-SD-NEXT:    ret
13;
14; CHECK-GI-LABEL: ule_11111111:
15; CHECK-GI:       // %bb.0:
16; CHECK-GI-NEXT:    mov w8, #286331153 // =0x11111111
17; CHECK-GI-NEXT:    cmp w0, w8
18; CHECK-GI-NEXT:    cset w0, ls
19; CHECK-GI-NEXT:    ret
20  %out = icmp ult i32 %in, 286331154
21  ret i1 %out
22}
23
24define i1 @ule_22222222(i32 noundef %in) {
25; CHECK-SD-LABEL: ule_22222222:
26; CHECK-SD:       // %bb.0:
27; CHECK-SD-NEXT:    mov w8, #8739 // =0x2223
28; CHECK-SD-NEXT:    movk w8, #8738, lsl #16
29; CHECK-SD-NEXT:    cmp w0, w8
30; CHECK-SD-NEXT:    cset w0, lo
31; CHECK-SD-NEXT:    ret
32;
33; CHECK-GI-LABEL: ule_22222222:
34; CHECK-GI:       // %bb.0:
35; CHECK-GI-NEXT:    mov w8, #572662306 // =0x22222222
36; CHECK-GI-NEXT:    cmp w0, w8
37; CHECK-GI-NEXT:    cset w0, ls
38; CHECK-GI-NEXT:    ret
39  %out = icmp ult i32 %in, 572662307
40  ret i1 %out
41}
42
43define i1 @ule_33333333(i32 noundef %in) {
44; CHECK-SD-LABEL: ule_33333333:
45; CHECK-SD:       // %bb.0:
46; CHECK-SD-NEXT:    mov w8, #13108 // =0x3334
47; CHECK-SD-NEXT:    movk w8, #13107, lsl #16
48; CHECK-SD-NEXT:    cmp w0, w8
49; CHECK-SD-NEXT:    cset w0, lo
50; CHECK-SD-NEXT:    ret
51;
52; CHECK-GI-LABEL: ule_33333333:
53; CHECK-GI:       // %bb.0:
54; CHECK-GI-NEXT:    mov w8, #858993459 // =0x33333333
55; CHECK-GI-NEXT:    cmp w0, w8
56; CHECK-GI-NEXT:    cset w0, ls
57; CHECK-GI-NEXT:    ret
58  %out = icmp ult i32 %in, 858993460
59  ret i1 %out
60}
61
62define i1 @ule_44444444(i32 noundef %in) {
63; CHECK-SD-LABEL: ule_44444444:
64; CHECK-SD:       // %bb.0:
65; CHECK-SD-NEXT:    mov w8, #17477 // =0x4445
66; CHECK-SD-NEXT:    movk w8, #17476, lsl #16
67; CHECK-SD-NEXT:    cmp w0, w8
68; CHECK-SD-NEXT:    cset w0, lo
69; CHECK-SD-NEXT:    ret
70;
71; CHECK-GI-LABEL: ule_44444444:
72; CHECK-GI:       // %bb.0:
73; CHECK-GI-NEXT:    mov w8, #1145324612 // =0x44444444
74; CHECK-GI-NEXT:    cmp w0, w8
75; CHECK-GI-NEXT:    cset w0, ls
76; CHECK-GI-NEXT:    ret
77  %out = icmp ult i32 %in, 1145324613
78  ret i1 %out
79}
80
81define i1 @ule_55555555(i32 noundef %in) {
82; CHECK-SD-LABEL: ule_55555555:
83; CHECK-SD:       // %bb.0:
84; CHECK-SD-NEXT:    mov w8, #21846 // =0x5556
85; CHECK-SD-NEXT:    movk w8, #21845, lsl #16
86; CHECK-SD-NEXT:    cmp w0, w8
87; CHECK-SD-NEXT:    cset w0, lo
88; CHECK-SD-NEXT:    ret
89;
90; CHECK-GI-LABEL: ule_55555555:
91; CHECK-GI:       // %bb.0:
92; CHECK-GI-NEXT:    mov w8, #1431655765 // =0x55555555
93; CHECK-GI-NEXT:    cmp w0, w8
94; CHECK-GI-NEXT:    cset w0, ls
95; CHECK-GI-NEXT:    ret
96  %out = icmp ult i32 %in, 1431655766
97  ret i1 %out
98}
99
100define i1 @ule_66666666(i32 noundef %in) {
101; CHECK-SD-LABEL: ule_66666666:
102; CHECK-SD:       // %bb.0:
103; CHECK-SD-NEXT:    mov w8, #26215 // =0x6667
104; CHECK-SD-NEXT:    movk w8, #26214, lsl #16
105; CHECK-SD-NEXT:    cmp w0, w8
106; CHECK-SD-NEXT:    cset w0, lo
107; CHECK-SD-NEXT:    ret
108;
109; CHECK-GI-LABEL: ule_66666666:
110; CHECK-GI:       // %bb.0:
111; CHECK-GI-NEXT:    mov w8, #1717986918 // =0x66666666
112; CHECK-GI-NEXT:    cmp w0, w8
113; CHECK-GI-NEXT:    cset w0, ls
114; CHECK-GI-NEXT:    ret
115  %out = icmp ult i32 %in, 1717986919
116  ret i1 %out
117}
118
119define i1 @ule_77777777(i32 noundef %in) {
120; CHECK-SD-LABEL: ule_77777777:
121; CHECK-SD:       // %bb.0:
122; CHECK-SD-NEXT:    mov w8, #30584 // =0x7778
123; CHECK-SD-NEXT:    movk w8, #30583, lsl #16
124; CHECK-SD-NEXT:    cmp w0, w8
125; CHECK-SD-NEXT:    cset w0, lo
126; CHECK-SD-NEXT:    ret
127;
128; CHECK-GI-LABEL: ule_77777777:
129; CHECK-GI:       // %bb.0:
130; CHECK-GI-NEXT:    mov w8, #2004318071 // =0x77777777
131; CHECK-GI-NEXT:    cmp w0, w8
132; CHECK-GI-NEXT:    cset w0, ls
133; CHECK-GI-NEXT:    ret
134  %out = icmp ult i32 %in, 2004318072
135  ret i1 %out
136}
137
138define i1 @ule_88888888(i32 noundef %in) {
139; CHECK-SD-LABEL: ule_88888888:
140; CHECK-SD:       // %bb.0:
141; CHECK-SD-NEXT:    mov w8, #34953 // =0x8889
142; CHECK-SD-NEXT:    movk w8, #34952, lsl #16
143; CHECK-SD-NEXT:    cmp w0, w8
144; CHECK-SD-NEXT:    cset w0, lo
145; CHECK-SD-NEXT:    ret
146;
147; CHECK-GI-LABEL: ule_88888888:
148; CHECK-GI:       // %bb.0:
149; CHECK-GI-NEXT:    mov w8, #-2004318072 // =0x88888888
150; CHECK-GI-NEXT:    cmp w0, w8
151; CHECK-GI-NEXT:    cset w0, ls
152; CHECK-GI-NEXT:    ret
153  %out = icmp ult i32 %in, -2004318071
154  ret i1 %out
155}
156
157define i1 @ule_99999999(i32 noundef %in) {
158; CHECK-SD-LABEL: ule_99999999:
159; CHECK-SD:       // %bb.0:
160; CHECK-SD-NEXT:    mov w8, #39322 // =0x999a
161; CHECK-SD-NEXT:    movk w8, #39321, lsl #16
162; CHECK-SD-NEXT:    cmp w0, w8
163; CHECK-SD-NEXT:    cset w0, lo
164; CHECK-SD-NEXT:    ret
165;
166; CHECK-GI-LABEL: ule_99999999:
167; CHECK-GI:       // %bb.0:
168; CHECK-GI-NEXT:    mov w8, #-1717986919 // =0x99999999
169; CHECK-GI-NEXT:    cmp w0, w8
170; CHECK-GI-NEXT:    cset w0, ls
171; CHECK-GI-NEXT:    ret
172  %out = icmp ult i32 %in, -1717986918
173  ret i1 %out
174}
175
176define i1 @uge_11111111(i32 noundef %in) {
177; CHECK-SD-LABEL: uge_11111111:
178; CHECK-SD:       // %bb.0:
179; CHECK-SD-NEXT:    mov w8, #4368 // =0x1110
180; CHECK-SD-NEXT:    movk w8, #4369, lsl #16
181; CHECK-SD-NEXT:    cmp w0, w8
182; CHECK-SD-NEXT:    cset w0, hi
183; CHECK-SD-NEXT:    ret
184;
185; CHECK-GI-LABEL: uge_11111111:
186; CHECK-GI:       // %bb.0:
187; CHECK-GI-NEXT:    mov w8, #286331153 // =0x11111111
188; CHECK-GI-NEXT:    cmp w0, w8
189; CHECK-GI-NEXT:    cset w0, hs
190; CHECK-GI-NEXT:    ret
191  %out = icmp ugt i32 %in, 286331152
192  ret i1 %out
193}
194
195define i1 @uge_22222222(i32 noundef %in) {
196; CHECK-SD-LABEL: uge_22222222:
197; CHECK-SD:       // %bb.0:
198; CHECK-SD-NEXT:    mov w8, #8737 // =0x2221
199; CHECK-SD-NEXT:    movk w8, #8738, lsl #16
200; CHECK-SD-NEXT:    cmp w0, w8
201; CHECK-SD-NEXT:    cset w0, hi
202; CHECK-SD-NEXT:    ret
203;
204; CHECK-GI-LABEL: uge_22222222:
205; CHECK-GI:       // %bb.0:
206; CHECK-GI-NEXT:    mov w8, #572662306 // =0x22222222
207; CHECK-GI-NEXT:    cmp w0, w8
208; CHECK-GI-NEXT:    cset w0, hs
209; CHECK-GI-NEXT:    ret
210  %out = icmp ugt i32 %in, 572662305
211  ret i1 %out
212}
213
214define i1 @uge_33333333(i32 noundef %in) {
215; CHECK-SD-LABEL: uge_33333333:
216; CHECK-SD:       // %bb.0:
217; CHECK-SD-NEXT:    mov w8, #13106 // =0x3332
218; CHECK-SD-NEXT:    movk w8, #13107, lsl #16
219; CHECK-SD-NEXT:    cmp w0, w8
220; CHECK-SD-NEXT:    cset w0, hi
221; CHECK-SD-NEXT:    ret
222;
223; CHECK-GI-LABEL: uge_33333333:
224; CHECK-GI:       // %bb.0:
225; CHECK-GI-NEXT:    mov w8, #858993459 // =0x33333333
226; CHECK-GI-NEXT:    cmp w0, w8
227; CHECK-GI-NEXT:    cset w0, hs
228; CHECK-GI-NEXT:    ret
229  %out = icmp ugt i32 %in, 858993458
230  ret i1 %out
231}
232
233define i1 @uge_44444444(i32 noundef %in) {
234; CHECK-SD-LABEL: uge_44444444:
235; CHECK-SD:       // %bb.0:
236; CHECK-SD-NEXT:    mov w8, #17475 // =0x4443
237; CHECK-SD-NEXT:    movk w8, #17476, lsl #16
238; CHECK-SD-NEXT:    cmp w0, w8
239; CHECK-SD-NEXT:    cset w0, hi
240; CHECK-SD-NEXT:    ret
241;
242; CHECK-GI-LABEL: uge_44444444:
243; CHECK-GI:       // %bb.0:
244; CHECK-GI-NEXT:    mov w8, #1145324612 // =0x44444444
245; CHECK-GI-NEXT:    cmp w0, w8
246; CHECK-GI-NEXT:    cset w0, hs
247; CHECK-GI-NEXT:    ret
248  %out = icmp ugt i32 %in, 1145324611
249  ret i1 %out
250}
251
252define i1 @uge_55555555(i32 noundef %in) {
253; CHECK-SD-LABEL: uge_55555555:
254; CHECK-SD:       // %bb.0:
255; CHECK-SD-NEXT:    mov w8, #21844 // =0x5554
256; CHECK-SD-NEXT:    movk w8, #21845, lsl #16
257; CHECK-SD-NEXT:    cmp w0, w8
258; CHECK-SD-NEXT:    cset w0, hi
259; CHECK-SD-NEXT:    ret
260;
261; CHECK-GI-LABEL: uge_55555555:
262; CHECK-GI:       // %bb.0:
263; CHECK-GI-NEXT:    mov w8, #1431655765 // =0x55555555
264; CHECK-GI-NEXT:    cmp w0, w8
265; CHECK-GI-NEXT:    cset w0, hs
266; CHECK-GI-NEXT:    ret
267  %out = icmp ugt i32 %in, 1431655764
268  ret i1 %out
269}
270
271define i1 @uge_66666666(i32 noundef %in) {
272; CHECK-SD-LABEL: uge_66666666:
273; CHECK-SD:       // %bb.0:
274; CHECK-SD-NEXT:    mov w8, #26213 // =0x6665
275; CHECK-SD-NEXT:    movk w8, #26214, lsl #16
276; CHECK-SD-NEXT:    cmp w0, w8
277; CHECK-SD-NEXT:    cset w0, hi
278; CHECK-SD-NEXT:    ret
279;
280; CHECK-GI-LABEL: uge_66666666:
281; CHECK-GI:       // %bb.0:
282; CHECK-GI-NEXT:    mov w8, #1717986918 // =0x66666666
283; CHECK-GI-NEXT:    cmp w0, w8
284; CHECK-GI-NEXT:    cset w0, hs
285; CHECK-GI-NEXT:    ret
286  %out = icmp ugt i32 %in, 1717986917
287  ret i1 %out
288}
289
290define i1 @uge_77777777(i32 noundef %in) {
291; CHECK-SD-LABEL: uge_77777777:
292; CHECK-SD:       // %bb.0:
293; CHECK-SD-NEXT:    mov w8, #30582 // =0x7776
294; CHECK-SD-NEXT:    movk w8, #30583, lsl #16
295; CHECK-SD-NEXT:    cmp w0, w8
296; CHECK-SD-NEXT:    cset w0, hi
297; CHECK-SD-NEXT:    ret
298;
299; CHECK-GI-LABEL: uge_77777777:
300; CHECK-GI:       // %bb.0:
301; CHECK-GI-NEXT:    mov w8, #2004318071 // =0x77777777
302; CHECK-GI-NEXT:    cmp w0, w8
303; CHECK-GI-NEXT:    cset w0, hs
304; CHECK-GI-NEXT:    ret
305  %out = icmp ugt i32 %in, 2004318070
306  ret i1 %out
307}
308
309define i1 @uge_88888888(i32 noundef %in) {
310; CHECK-SD-LABEL: uge_88888888:
311; CHECK-SD:       // %bb.0:
312; CHECK-SD-NEXT:    mov w8, #34951 // =0x8887
313; CHECK-SD-NEXT:    movk w8, #34952, lsl #16
314; CHECK-SD-NEXT:    cmp w0, w8
315; CHECK-SD-NEXT:    cset w0, hi
316; CHECK-SD-NEXT:    ret
317;
318; CHECK-GI-LABEL: uge_88888888:
319; CHECK-GI:       // %bb.0:
320; CHECK-GI-NEXT:    mov w8, #-2004318072 // =0x88888888
321; CHECK-GI-NEXT:    cmp w0, w8
322; CHECK-GI-NEXT:    cset w0, hs
323; CHECK-GI-NEXT:    ret
324  %out = icmp ugt i32 %in, -2004318073
325  ret i1 %out
326}
327
328define i1 @uge_99999999(i32 noundef %in) {
329; CHECK-SD-LABEL: uge_99999999:
330; CHECK-SD:       // %bb.0:
331; CHECK-SD-NEXT:    mov w8, #39320 // =0x9998
332; CHECK-SD-NEXT:    movk w8, #39321, lsl #16
333; CHECK-SD-NEXT:    cmp w0, w8
334; CHECK-SD-NEXT:    cset w0, hi
335; CHECK-SD-NEXT:    ret
336;
337; CHECK-GI-LABEL: uge_99999999:
338; CHECK-GI:       // %bb.0:
339; CHECK-GI-NEXT:    mov w8, #-1717986919 // =0x99999999
340; CHECK-GI-NEXT:    cmp w0, w8
341; CHECK-GI-NEXT:    cset w0, hs
342; CHECK-GI-NEXT:    ret
343  %out = icmp ugt i32 %in, -1717986920
344  ret i1 %out
345}
346
347define i1 @sle_11111111(i32 noundef %in) {
348; CHECK-SD-LABEL: sle_11111111:
349; CHECK-SD:       // %bb.0:
350; CHECK-SD-NEXT:    mov w8, #4370 // =0x1112
351; CHECK-SD-NEXT:    movk w8, #4369, lsl #16
352; CHECK-SD-NEXT:    cmp w0, w8
353; CHECK-SD-NEXT:    cset w0, lt
354; CHECK-SD-NEXT:    ret
355;
356; CHECK-GI-LABEL: sle_11111111:
357; CHECK-GI:       // %bb.0:
358; CHECK-GI-NEXT:    mov w8, #286331153 // =0x11111111
359; CHECK-GI-NEXT:    cmp w0, w8
360; CHECK-GI-NEXT:    cset w0, le
361; CHECK-GI-NEXT:    ret
362  %out = icmp slt i32 %in, 286331154
363  ret i1 %out
364}
365
366define i1 @sle_22222222(i32 noundef %in) {
367; CHECK-SD-LABEL: sle_22222222:
368; CHECK-SD:       // %bb.0:
369; CHECK-SD-NEXT:    mov w8, #8739 // =0x2223
370; CHECK-SD-NEXT:    movk w8, #8738, lsl #16
371; CHECK-SD-NEXT:    cmp w0, w8
372; CHECK-SD-NEXT:    cset w0, lt
373; CHECK-SD-NEXT:    ret
374;
375; CHECK-GI-LABEL: sle_22222222:
376; CHECK-GI:       // %bb.0:
377; CHECK-GI-NEXT:    mov w8, #572662306 // =0x22222222
378; CHECK-GI-NEXT:    cmp w0, w8
379; CHECK-GI-NEXT:    cset w0, le
380; CHECK-GI-NEXT:    ret
381  %out = icmp slt i32 %in, 572662307
382  ret i1 %out
383}
384
385define i1 @sle_33333333(i32 noundef %in) {
386; CHECK-SD-LABEL: sle_33333333:
387; CHECK-SD:       // %bb.0:
388; CHECK-SD-NEXT:    mov w8, #13108 // =0x3334
389; CHECK-SD-NEXT:    movk w8, #13107, lsl #16
390; CHECK-SD-NEXT:    cmp w0, w8
391; CHECK-SD-NEXT:    cset w0, lt
392; CHECK-SD-NEXT:    ret
393;
394; CHECK-GI-LABEL: sle_33333333:
395; CHECK-GI:       // %bb.0:
396; CHECK-GI-NEXT:    mov w8, #858993459 // =0x33333333
397; CHECK-GI-NEXT:    cmp w0, w8
398; CHECK-GI-NEXT:    cset w0, le
399; CHECK-GI-NEXT:    ret
400  %out = icmp slt i32 %in, 858993460
401  ret i1 %out
402}
403
404define i1 @sle_44444444(i32 noundef %in) {
405; CHECK-SD-LABEL: sle_44444444:
406; CHECK-SD:       // %bb.0:
407; CHECK-SD-NEXT:    mov w8, #17477 // =0x4445
408; CHECK-SD-NEXT:    movk w8, #17476, lsl #16
409; CHECK-SD-NEXT:    cmp w0, w8
410; CHECK-SD-NEXT:    cset w0, lt
411; CHECK-SD-NEXT:    ret
412;
413; CHECK-GI-LABEL: sle_44444444:
414; CHECK-GI:       // %bb.0:
415; CHECK-GI-NEXT:    mov w8, #1145324612 // =0x44444444
416; CHECK-GI-NEXT:    cmp w0, w8
417; CHECK-GI-NEXT:    cset w0, le
418; CHECK-GI-NEXT:    ret
419  %out = icmp slt i32 %in, 1145324613
420  ret i1 %out
421}
422
423define i1 @sle_55555555(i32 noundef %in) {
424; CHECK-SD-LABEL: sle_55555555:
425; CHECK-SD:       // %bb.0:
426; CHECK-SD-NEXT:    mov w8, #21846 // =0x5556
427; CHECK-SD-NEXT:    movk w8, #21845, lsl #16
428; CHECK-SD-NEXT:    cmp w0, w8
429; CHECK-SD-NEXT:    cset w0, lt
430; CHECK-SD-NEXT:    ret
431;
432; CHECK-GI-LABEL: sle_55555555:
433; CHECK-GI:       // %bb.0:
434; CHECK-GI-NEXT:    mov w8, #1431655765 // =0x55555555
435; CHECK-GI-NEXT:    cmp w0, w8
436; CHECK-GI-NEXT:    cset w0, le
437; CHECK-GI-NEXT:    ret
438  %out = icmp slt i32 %in, 1431655766
439  ret i1 %out
440}
441
442define i1 @sle_66666666(i32 noundef %in) {
443; CHECK-SD-LABEL: sle_66666666:
444; CHECK-SD:       // %bb.0:
445; CHECK-SD-NEXT:    mov w8, #26215 // =0x6667
446; CHECK-SD-NEXT:    movk w8, #26214, lsl #16
447; CHECK-SD-NEXT:    cmp w0, w8
448; CHECK-SD-NEXT:    cset w0, lt
449; CHECK-SD-NEXT:    ret
450;
451; CHECK-GI-LABEL: sle_66666666:
452; CHECK-GI:       // %bb.0:
453; CHECK-GI-NEXT:    mov w8, #1717986918 // =0x66666666
454; CHECK-GI-NEXT:    cmp w0, w8
455; CHECK-GI-NEXT:    cset w0, le
456; CHECK-GI-NEXT:    ret
457  %out = icmp slt i32 %in, 1717986919
458  ret i1 %out
459}
460
461define i1 @sle_77777777(i32 noundef %in) {
462; CHECK-SD-LABEL: sle_77777777:
463; CHECK-SD:       // %bb.0:
464; CHECK-SD-NEXT:    mov w8, #30584 // =0x7778
465; CHECK-SD-NEXT:    movk w8, #30583, lsl #16
466; CHECK-SD-NEXT:    cmp w0, w8
467; CHECK-SD-NEXT:    cset w0, lt
468; CHECK-SD-NEXT:    ret
469;
470; CHECK-GI-LABEL: sle_77777777:
471; CHECK-GI:       // %bb.0:
472; CHECK-GI-NEXT:    mov w8, #2004318071 // =0x77777777
473; CHECK-GI-NEXT:    cmp w0, w8
474; CHECK-GI-NEXT:    cset w0, le
475; CHECK-GI-NEXT:    ret
476  %out = icmp slt i32 %in, 2004318072
477  ret i1 %out
478}
479
480define i1 @sle_88888888(i32 noundef %in) {
481; CHECK-SD-LABEL: sle_88888888:
482; CHECK-SD:       // %bb.0:
483; CHECK-SD-NEXT:    mov w8, #34953 // =0x8889
484; CHECK-SD-NEXT:    movk w8, #34952, lsl #16
485; CHECK-SD-NEXT:    cmp w0, w8
486; CHECK-SD-NEXT:    cset w0, lo
487; CHECK-SD-NEXT:    ret
488;
489; CHECK-GI-LABEL: sle_88888888:
490; CHECK-GI:       // %bb.0:
491; CHECK-GI-NEXT:    mov w8, #-2004318072 // =0x88888888
492; CHECK-GI-NEXT:    cmp w0, w8
493; CHECK-GI-NEXT:    cset w0, ls
494; CHECK-GI-NEXT:    ret
495  %out = icmp ult i32 %in, -2004318071
496  ret i1 %out
497}
498
499define i1 @sle_99999999(i32 noundef %in) {
500; CHECK-SD-LABEL: sle_99999999:
501; CHECK-SD:       // %bb.0:
502; CHECK-SD-NEXT:    mov w8, #39322 // =0x999a
503; CHECK-SD-NEXT:    movk w8, #39321, lsl #16
504; CHECK-SD-NEXT:    cmp w0, w8
505; CHECK-SD-NEXT:    cset w0, lo
506; CHECK-SD-NEXT:    ret
507;
508; CHECK-GI-LABEL: sle_99999999:
509; CHECK-GI:       // %bb.0:
510; CHECK-GI-NEXT:    mov w8, #-1717986919 // =0x99999999
511; CHECK-GI-NEXT:    cmp w0, w8
512; CHECK-GI-NEXT:    cset w0, ls
513; CHECK-GI-NEXT:    ret
514  %out = icmp ult i32 %in, -1717986918
515  ret i1 %out
516}
517
518define i1 @sge_11111111(i32 noundef %in) {
519; CHECK-SD-LABEL: sge_11111111:
520; CHECK-SD:       // %bb.0:
521; CHECK-SD-NEXT:    mov w8, #4368 // =0x1110
522; CHECK-SD-NEXT:    movk w8, #4369, lsl #16
523; CHECK-SD-NEXT:    cmp w0, w8
524; CHECK-SD-NEXT:    cset w0, gt
525; CHECK-SD-NEXT:    ret
526;
527; CHECK-GI-LABEL: sge_11111111:
528; CHECK-GI:       // %bb.0:
529; CHECK-GI-NEXT:    mov w8, #286331153 // =0x11111111
530; CHECK-GI-NEXT:    cmp w0, w8
531; CHECK-GI-NEXT:    cset w0, ge
532; CHECK-GI-NEXT:    ret
533  %out = icmp sgt i32 %in, 286331152
534  ret i1 %out
535}
536
537define i1 @sge_22222222(i32 noundef %in) {
538; CHECK-SD-LABEL: sge_22222222:
539; CHECK-SD:       // %bb.0:
540; CHECK-SD-NEXT:    mov w8, #8737 // =0x2221
541; CHECK-SD-NEXT:    movk w8, #8738, lsl #16
542; CHECK-SD-NEXT:    cmp w0, w8
543; CHECK-SD-NEXT:    cset w0, gt
544; CHECK-SD-NEXT:    ret
545;
546; CHECK-GI-LABEL: sge_22222222:
547; CHECK-GI:       // %bb.0:
548; CHECK-GI-NEXT:    mov w8, #572662306 // =0x22222222
549; CHECK-GI-NEXT:    cmp w0, w8
550; CHECK-GI-NEXT:    cset w0, ge
551; CHECK-GI-NEXT:    ret
552  %out = icmp sgt i32 %in, 572662305
553  ret i1 %out
554}
555
556define i1 @sge_33333333(i32 noundef %in) {
557; CHECK-SD-LABEL: sge_33333333:
558; CHECK-SD:       // %bb.0:
559; CHECK-SD-NEXT:    mov w8, #13106 // =0x3332
560; CHECK-SD-NEXT:    movk w8, #13107, lsl #16
561; CHECK-SD-NEXT:    cmp w0, w8
562; CHECK-SD-NEXT:    cset w0, gt
563; CHECK-SD-NEXT:    ret
564;
565; CHECK-GI-LABEL: sge_33333333:
566; CHECK-GI:       // %bb.0:
567; CHECK-GI-NEXT:    mov w8, #858993459 // =0x33333333
568; CHECK-GI-NEXT:    cmp w0, w8
569; CHECK-GI-NEXT:    cset w0, ge
570; CHECK-GI-NEXT:    ret
571  %out = icmp sgt i32 %in, 858993458
572  ret i1 %out
573}
574
575define i1 @sge_44444444(i32 noundef %in) {
576; CHECK-SD-LABEL: sge_44444444:
577; CHECK-SD:       // %bb.0:
578; CHECK-SD-NEXT:    mov w8, #17475 // =0x4443
579; CHECK-SD-NEXT:    movk w8, #17476, lsl #16
580; CHECK-SD-NEXT:    cmp w0, w8
581; CHECK-SD-NEXT:    cset w0, gt
582; CHECK-SD-NEXT:    ret
583;
584; CHECK-GI-LABEL: sge_44444444:
585; CHECK-GI:       // %bb.0:
586; CHECK-GI-NEXT:    mov w8, #1145324612 // =0x44444444
587; CHECK-GI-NEXT:    cmp w0, w8
588; CHECK-GI-NEXT:    cset w0, ge
589; CHECK-GI-NEXT:    ret
590  %out = icmp sgt i32 %in, 1145324611
591  ret i1 %out
592}
593
594define i1 @sge_55555555(i32 noundef %in) {
595; CHECK-SD-LABEL: sge_55555555:
596; CHECK-SD:       // %bb.0:
597; CHECK-SD-NEXT:    mov w8, #21844 // =0x5554
598; CHECK-SD-NEXT:    movk w8, #21845, lsl #16
599; CHECK-SD-NEXT:    cmp w0, w8
600; CHECK-SD-NEXT:    cset w0, gt
601; CHECK-SD-NEXT:    ret
602;
603; CHECK-GI-LABEL: sge_55555555:
604; CHECK-GI:       // %bb.0:
605; CHECK-GI-NEXT:    mov w8, #1431655765 // =0x55555555
606; CHECK-GI-NEXT:    cmp w0, w8
607; CHECK-GI-NEXT:    cset w0, ge
608; CHECK-GI-NEXT:    ret
609  %out = icmp sgt i32 %in, 1431655764
610  ret i1 %out
611}
612
613define i1 @sge_66666666(i32 noundef %in) {
614; CHECK-SD-LABEL: sge_66666666:
615; CHECK-SD:       // %bb.0:
616; CHECK-SD-NEXT:    mov w8, #26213 // =0x6665
617; CHECK-SD-NEXT:    movk w8, #26214, lsl #16
618; CHECK-SD-NEXT:    cmp w0, w8
619; CHECK-SD-NEXT:    cset w0, gt
620; CHECK-SD-NEXT:    ret
621;
622; CHECK-GI-LABEL: sge_66666666:
623; CHECK-GI:       // %bb.0:
624; CHECK-GI-NEXT:    mov w8, #1717986918 // =0x66666666
625; CHECK-GI-NEXT:    cmp w0, w8
626; CHECK-GI-NEXT:    cset w0, ge
627; CHECK-GI-NEXT:    ret
628  %out = icmp sgt i32 %in, 1717986917
629  ret i1 %out
630}
631
632define i1 @sge_77777777(i32 noundef %in) {
633; CHECK-SD-LABEL: sge_77777777:
634; CHECK-SD:       // %bb.0:
635; CHECK-SD-NEXT:    mov w8, #30582 // =0x7776
636; CHECK-SD-NEXT:    movk w8, #30583, lsl #16
637; CHECK-SD-NEXT:    cmp w0, w8
638; CHECK-SD-NEXT:    cset w0, gt
639; CHECK-SD-NEXT:    ret
640;
641; CHECK-GI-LABEL: sge_77777777:
642; CHECK-GI:       // %bb.0:
643; CHECK-GI-NEXT:    mov w8, #2004318071 // =0x77777777
644; CHECK-GI-NEXT:    cmp w0, w8
645; CHECK-GI-NEXT:    cset w0, ge
646; CHECK-GI-NEXT:    ret
647  %out = icmp sgt i32 %in, 2004318070
648  ret i1 %out
649}
650
651define i1 @sge_88888888(i32 noundef %in) {
652; CHECK-SD-LABEL: sge_88888888:
653; CHECK-SD:       // %bb.0:
654; CHECK-SD-NEXT:    mov w8, #34951 // =0x8887
655; CHECK-SD-NEXT:    movk w8, #34952, lsl #16
656; CHECK-SD-NEXT:    cmp w0, w8
657; CHECK-SD-NEXT:    cset w0, hi
658; CHECK-SD-NEXT:    ret
659;
660; CHECK-GI-LABEL: sge_88888888:
661; CHECK-GI:       // %bb.0:
662; CHECK-GI-NEXT:    mov w8, #-2004318072 // =0x88888888
663; CHECK-GI-NEXT:    cmp w0, w8
664; CHECK-GI-NEXT:    cset w0, hs
665; CHECK-GI-NEXT:    ret
666  %out = icmp ugt i32 %in, -2004318073
667  ret i1 %out
668}
669
670define i1 @sge_99999999(i32 noundef %in) {
671; CHECK-SD-LABEL: sge_99999999:
672; CHECK-SD:       // %bb.0:
673; CHECK-SD-NEXT:    mov w8, #39320 // =0x9998
674; CHECK-SD-NEXT:    movk w8, #39321, lsl #16
675; CHECK-SD-NEXT:    cmp w0, w8
676; CHECK-SD-NEXT:    cset w0, hi
677; CHECK-SD-NEXT:    ret
678;
679; CHECK-GI-LABEL: sge_99999999:
680; CHECK-GI:       // %bb.0:
681; CHECK-GI-NEXT:    mov w8, #-1717986919 // =0x99999999
682; CHECK-GI-NEXT:    cmp w0, w8
683; CHECK-GI-NEXT:    cset w0, hs
684; CHECK-GI-NEXT:    ret
685  %out = icmp ugt i32 %in, -1717986920
686  ret i1 %out
687}
688