1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-CVT 3; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16 4; RUN: llc < %s -mtriple=aarch64 -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-CVT 5; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16 6 7; CHECK-GI: warning: Instruction selection used fallback path for test_signed_v4f32_v4i50 8; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_signed_v4f16_v4i50 9; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_signed_v8f16_v8i19 10; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_signed_v8f16_v8i50 11 12; 13; Float to signed 32-bit -- Vector size variation 14; 15 16declare <1 x i32> @llvm.fptosi.sat.v1f32.v1i32 (<1 x float>) 17declare <2 x i32> @llvm.fptosi.sat.v2f32.v2i32 (<2 x float>) 18declare <3 x i32> @llvm.fptosi.sat.v3f32.v3i32 (<3 x float>) 19declare <4 x i32> @llvm.fptosi.sat.v4f32.v4i32 (<4 x float>) 20declare <5 x i32> @llvm.fptosi.sat.v5f32.v5i32 (<5 x float>) 21declare <6 x i32> @llvm.fptosi.sat.v6f32.v6i32 (<6 x float>) 22declare <7 x i32> @llvm.fptosi.sat.v7f32.v7i32 (<7 x float>) 23declare <8 x i32> @llvm.fptosi.sat.v8f32.v8i32 (<8 x float>) 24 25define <1 x i32> @test_signed_v1f32_v1i32(<1 x float> %f) { 26; CHECK-SD-LABEL: test_signed_v1f32_v1i32: 27; CHECK-SD: // %bb.0: 28; CHECK-SD-NEXT: fcvtzs v0.2s, v0.2s 29; CHECK-SD-NEXT: ret 30; 31; CHECK-GI-LABEL: test_signed_v1f32_v1i32: 32; CHECK-GI: // %bb.0: 33; CHECK-GI-NEXT: fcvtzs w8, s0 34; CHECK-GI-NEXT: mov v0.s[0], w8 35; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 36; CHECK-GI-NEXT: ret 37 %x = call <1 x i32> @llvm.fptosi.sat.v1f32.v1i32(<1 x float> %f) 38 ret <1 x i32> %x 39} 40 41define <2 x i32> @test_signed_v2f32_v2i32(<2 x float> %f) { 42; CHECK-LABEL: test_signed_v2f32_v2i32: 43; CHECK: // %bb.0: 44; CHECK-NEXT: fcvtzs v0.2s, v0.2s 45; CHECK-NEXT: ret 46 %x = call <2 x i32> @llvm.fptosi.sat.v2f32.v2i32(<2 x float> %f) 47 ret <2 x i32> %x 48} 49 50define <3 x i32> @test_signed_v3f32_v3i32(<3 x float> %f) { 51; CHECK-LABEL: test_signed_v3f32_v3i32: 52; CHECK: // %bb.0: 53; CHECK-NEXT: fcvtzs v0.4s, v0.4s 54; CHECK-NEXT: ret 55 %x = call <3 x i32> @llvm.fptosi.sat.v3f32.v3i32(<3 x float> %f) 56 ret <3 x i32> %x 57} 58 59define <4 x i32> @test_signed_v4f32_v4i32(<4 x float> %f) { 60; CHECK-LABEL: test_signed_v4f32_v4i32: 61; CHECK: // %bb.0: 62; CHECK-NEXT: fcvtzs v0.4s, v0.4s 63; CHECK-NEXT: ret 64 %x = call <4 x i32> @llvm.fptosi.sat.v4f32.v4i32(<4 x float> %f) 65 ret <4 x i32> %x 66} 67 68define <5 x i32> @test_signed_v5f32_v5i32(<5 x float> %f) { 69; CHECK-SD-LABEL: test_signed_v5f32_v5i32: 70; CHECK-SD: // %bb.0: 71; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q0 72; CHECK-SD-NEXT: // kill: def $s1 killed $s1 def $q1 73; CHECK-SD-NEXT: // kill: def $s2 killed $s2 def $q2 74; CHECK-SD-NEXT: // kill: def $s3 killed $s3 def $q3 75; CHECK-SD-NEXT: // kill: def $s4 killed $s4 def $q4 76; CHECK-SD-NEXT: mov v0.s[1], v1.s[0] 77; CHECK-SD-NEXT: fcvtzs v4.4s, v4.4s 78; CHECK-SD-NEXT: mov v0.s[2], v2.s[0] 79; CHECK-SD-NEXT: fmov w4, s4 80; CHECK-SD-NEXT: mov v0.s[3], v3.s[0] 81; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 82; CHECK-SD-NEXT: mov w1, v0.s[1] 83; CHECK-SD-NEXT: mov w2, v0.s[2] 84; CHECK-SD-NEXT: mov w3, v0.s[3] 85; CHECK-SD-NEXT: fmov w0, s0 86; CHECK-SD-NEXT: ret 87; 88; CHECK-GI-LABEL: test_signed_v5f32_v5i32: 89; CHECK-GI: // %bb.0: 90; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $q0 91; CHECK-GI-NEXT: // kill: def $s1 killed $s1 def $q1 92; CHECK-GI-NEXT: // kill: def $s2 killed $s2 def $q2 93; CHECK-GI-NEXT: // kill: def $s3 killed $s3 def $q3 94; CHECK-GI-NEXT: // kill: def $s4 killed $s4 def $q4 95; CHECK-GI-NEXT: mov v0.s[1], v1.s[0] 96; CHECK-GI-NEXT: fcvtzs v1.4s, v4.4s 97; CHECK-GI-NEXT: mov v0.s[2], v2.s[0] 98; CHECK-GI-NEXT: fmov w4, s1 99; CHECK-GI-NEXT: mov v0.s[3], v3.s[0] 100; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 101; CHECK-GI-NEXT: mov s2, v0.s[1] 102; CHECK-GI-NEXT: mov s3, v0.s[2] 103; CHECK-GI-NEXT: mov s4, v0.s[3] 104; CHECK-GI-NEXT: fmov w0, s0 105; CHECK-GI-NEXT: fmov w1, s2 106; CHECK-GI-NEXT: fmov w2, s3 107; CHECK-GI-NEXT: fmov w3, s4 108; CHECK-GI-NEXT: ret 109 %x = call <5 x i32> @llvm.fptosi.sat.v5f32.v5i32(<5 x float> %f) 110 ret <5 x i32> %x 111} 112 113define <6 x i32> @test_signed_v6f32_v6i32(<6 x float> %f) { 114; CHECK-SD-LABEL: test_signed_v6f32_v6i32: 115; CHECK-SD: // %bb.0: 116; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q0 117; CHECK-SD-NEXT: // kill: def $s1 killed $s1 def $q1 118; CHECK-SD-NEXT: // kill: def $s2 killed $s2 def $q2 119; CHECK-SD-NEXT: // kill: def $s4 killed $s4 def $q4 120; CHECK-SD-NEXT: // kill: def $s5 killed $s5 def $q5 121; CHECK-SD-NEXT: // kill: def $s3 killed $s3 def $q3 122; CHECK-SD-NEXT: mov v0.s[1], v1.s[0] 123; CHECK-SD-NEXT: mov v4.s[1], v5.s[0] 124; CHECK-SD-NEXT: mov v0.s[2], v2.s[0] 125; CHECK-SD-NEXT: fcvtzs v1.4s, v4.4s 126; CHECK-SD-NEXT: mov v0.s[3], v3.s[0] 127; CHECK-SD-NEXT: mov w5, v1.s[1] 128; CHECK-SD-NEXT: fmov w4, s1 129; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 130; CHECK-SD-NEXT: mov w1, v0.s[1] 131; CHECK-SD-NEXT: mov w2, v0.s[2] 132; CHECK-SD-NEXT: mov w3, v0.s[3] 133; CHECK-SD-NEXT: fmov w0, s0 134; CHECK-SD-NEXT: ret 135; 136; CHECK-GI-LABEL: test_signed_v6f32_v6i32: 137; CHECK-GI: // %bb.0: 138; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $q0 139; CHECK-GI-NEXT: // kill: def $s1 killed $s1 def $q1 140; CHECK-GI-NEXT: // kill: def $s2 killed $s2 def $q2 141; CHECK-GI-NEXT: // kill: def $s4 killed $s4 def $q4 142; CHECK-GI-NEXT: // kill: def $s3 killed $s3 def $q3 143; CHECK-GI-NEXT: // kill: def $s5 killed $s5 def $q5 144; CHECK-GI-NEXT: mov v0.s[1], v1.s[0] 145; CHECK-GI-NEXT: mov v4.s[1], v5.s[0] 146; CHECK-GI-NEXT: mov v0.s[2], v2.s[0] 147; CHECK-GI-NEXT: fcvtzs v1.4s, v4.4s 148; CHECK-GI-NEXT: mov v0.s[3], v3.s[0] 149; CHECK-GI-NEXT: mov s4, v1.s[1] 150; CHECK-GI-NEXT: fmov w4, s1 151; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 152; CHECK-GI-NEXT: fmov w5, s4 153; CHECK-GI-NEXT: mov s2, v0.s[1] 154; CHECK-GI-NEXT: mov s3, v0.s[2] 155; CHECK-GI-NEXT: mov s5, v0.s[3] 156; CHECK-GI-NEXT: fmov w0, s0 157; CHECK-GI-NEXT: fmov w1, s2 158; CHECK-GI-NEXT: fmov w2, s3 159; CHECK-GI-NEXT: fmov w3, s5 160; CHECK-GI-NEXT: ret 161 %x = call <6 x i32> @llvm.fptosi.sat.v6f32.v6i32(<6 x float> %f) 162 ret <6 x i32> %x 163} 164 165define <7 x i32> @test_signed_v7f32_v7i32(<7 x float> %f) { 166; CHECK-SD-LABEL: test_signed_v7f32_v7i32: 167; CHECK-SD: // %bb.0: 168; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q0 169; CHECK-SD-NEXT: // kill: def $s1 killed $s1 def $q1 170; CHECK-SD-NEXT: // kill: def $s4 killed $s4 def $q4 171; CHECK-SD-NEXT: // kill: def $s5 killed $s5 def $q5 172; CHECK-SD-NEXT: // kill: def $s2 killed $s2 def $q2 173; CHECK-SD-NEXT: // kill: def $s6 killed $s6 def $q6 174; CHECK-SD-NEXT: // kill: def $s3 killed $s3 def $q3 175; CHECK-SD-NEXT: mov v0.s[1], v1.s[0] 176; CHECK-SD-NEXT: mov v4.s[1], v5.s[0] 177; CHECK-SD-NEXT: mov v0.s[2], v2.s[0] 178; CHECK-SD-NEXT: mov v4.s[2], v6.s[0] 179; CHECK-SD-NEXT: mov v0.s[3], v3.s[0] 180; CHECK-SD-NEXT: fcvtzs v1.4s, v4.4s 181; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 182; CHECK-SD-NEXT: mov w5, v1.s[1] 183; CHECK-SD-NEXT: mov w6, v1.s[2] 184; CHECK-SD-NEXT: fmov w4, s1 185; CHECK-SD-NEXT: mov w1, v0.s[1] 186; CHECK-SD-NEXT: mov w2, v0.s[2] 187; CHECK-SD-NEXT: mov w3, v0.s[3] 188; CHECK-SD-NEXT: fmov w0, s0 189; CHECK-SD-NEXT: ret 190; 191; CHECK-GI-LABEL: test_signed_v7f32_v7i32: 192; CHECK-GI: // %bb.0: 193; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $q0 194; CHECK-GI-NEXT: // kill: def $s1 killed $s1 def $q1 195; CHECK-GI-NEXT: // kill: def $s4 killed $s4 def $q4 196; CHECK-GI-NEXT: // kill: def $s2 killed $s2 def $q2 197; CHECK-GI-NEXT: // kill: def $s5 killed $s5 def $q5 198; CHECK-GI-NEXT: // kill: def $s3 killed $s3 def $q3 199; CHECK-GI-NEXT: // kill: def $s6 killed $s6 def $q6 200; CHECK-GI-NEXT: mov v0.s[1], v1.s[0] 201; CHECK-GI-NEXT: mov v4.s[1], v5.s[0] 202; CHECK-GI-NEXT: mov v0.s[2], v2.s[0] 203; CHECK-GI-NEXT: mov v4.s[2], v6.s[0] 204; CHECK-GI-NEXT: mov v0.s[3], v3.s[0] 205; CHECK-GI-NEXT: fcvtzs v1.4s, v4.4s 206; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 207; CHECK-GI-NEXT: mov s5, v1.s[1] 208; CHECK-GI-NEXT: mov s6, v1.s[2] 209; CHECK-GI-NEXT: fmov w4, s1 210; CHECK-GI-NEXT: mov s2, v0.s[1] 211; CHECK-GI-NEXT: mov s3, v0.s[2] 212; CHECK-GI-NEXT: mov s4, v0.s[3] 213; CHECK-GI-NEXT: fmov w0, s0 214; CHECK-GI-NEXT: fmov w5, s5 215; CHECK-GI-NEXT: fmov w6, s6 216; CHECK-GI-NEXT: fmov w1, s2 217; CHECK-GI-NEXT: fmov w2, s3 218; CHECK-GI-NEXT: fmov w3, s4 219; CHECK-GI-NEXT: ret 220 %x = call <7 x i32> @llvm.fptosi.sat.v7f32.v7i32(<7 x float> %f) 221 ret <7 x i32> %x 222} 223 224define <8 x i32> @test_signed_v8f32_v8i32(<8 x float> %f) { 225; CHECK-LABEL: test_signed_v8f32_v8i32: 226; CHECK: // %bb.0: 227; CHECK-NEXT: fcvtzs v0.4s, v0.4s 228; CHECK-NEXT: fcvtzs v1.4s, v1.4s 229; CHECK-NEXT: ret 230 %x = call <8 x i32> @llvm.fptosi.sat.v8f32.v8i32(<8 x float> %f) 231 ret <8 x i32> %x 232} 233 234; 235; Double to signed 32-bit -- Vector size variation 236; 237 238declare <1 x i32> @llvm.fptosi.sat.v1f64.v1i32 (<1 x double>) 239declare <2 x i32> @llvm.fptosi.sat.v2f64.v2i32 (<2 x double>) 240declare <3 x i32> @llvm.fptosi.sat.v3f64.v3i32 (<3 x double>) 241declare <4 x i32> @llvm.fptosi.sat.v4f64.v4i32 (<4 x double>) 242declare <5 x i32> @llvm.fptosi.sat.v5f64.v5i32 (<5 x double>) 243declare <6 x i32> @llvm.fptosi.sat.v6f64.v6i32 (<6 x double>) 244 245define <1 x i32> @test_signed_v1f64_v1i32(<1 x double> %f) { 246; CHECK-SD-LABEL: test_signed_v1f64_v1i32: 247; CHECK-SD: // %bb.0: 248; CHECK-SD-NEXT: fcvtzs w8, d0 249; CHECK-SD-NEXT: fmov s0, w8 250; CHECK-SD-NEXT: ret 251; 252; CHECK-GI-LABEL: test_signed_v1f64_v1i32: 253; CHECK-GI: // %bb.0: 254; CHECK-GI-NEXT: fcvtzs w8, d0 255; CHECK-GI-NEXT: mov v0.s[0], w8 256; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 257; CHECK-GI-NEXT: ret 258 %x = call <1 x i32> @llvm.fptosi.sat.v1f64.v1i32(<1 x double> %f) 259 ret <1 x i32> %x 260} 261 262define <2 x i32> @test_signed_v2f64_v2i32(<2 x double> %f) { 263; CHECK-SD-LABEL: test_signed_v2f64_v2i32: 264; CHECK-SD: // %bb.0: 265; CHECK-SD-NEXT: mov d1, v0.d[1] 266; CHECK-SD-NEXT: fcvtzs w8, d0 267; CHECK-SD-NEXT: fcvtzs w9, d1 268; CHECK-SD-NEXT: fmov s0, w8 269; CHECK-SD-NEXT: mov v0.s[1], w9 270; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 271; CHECK-SD-NEXT: ret 272; 273; CHECK-GI-LABEL: test_signed_v2f64_v2i32: 274; CHECK-GI: // %bb.0: 275; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 276; CHECK-GI-NEXT: adrp x8, .LCPI9_1 277; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI9_1] 278; CHECK-GI-NEXT: adrp x8, .LCPI9_0 279; CHECK-GI-NEXT: cmgt v2.2d, v1.2d, v0.2d 280; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 281; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI9_0] 282; CHECK-GI-NEXT: cmgt v2.2d, v0.2d, v1.2d 283; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 284; CHECK-GI-NEXT: xtn v0.2s, v0.2d 285; CHECK-GI-NEXT: ret 286 %x = call <2 x i32> @llvm.fptosi.sat.v2f64.v2i32(<2 x double> %f) 287 ret <2 x i32> %x 288} 289 290define <3 x i32> @test_signed_v3f64_v3i32(<3 x double> %f) { 291; CHECK-SD-LABEL: test_signed_v3f64_v3i32: 292; CHECK-SD: // %bb.0: 293; CHECK-SD-NEXT: fcvtzs w8, d0 294; CHECK-SD-NEXT: fcvtzs w9, d1 295; CHECK-SD-NEXT: fmov s0, w8 296; CHECK-SD-NEXT: fcvtzs w8, d2 297; CHECK-SD-NEXT: mov v0.s[1], w9 298; CHECK-SD-NEXT: mov v0.s[2], w8 299; CHECK-SD-NEXT: fcvtzs w8, d0 300; CHECK-SD-NEXT: mov v0.s[3], w8 301; CHECK-SD-NEXT: ret 302; 303; CHECK-GI-LABEL: test_signed_v3f64_v3i32: 304; CHECK-GI: // %bb.0: 305; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 306; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 307; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2 308; CHECK-GI-NEXT: adrp x8, .LCPI10_1 309; CHECK-GI-NEXT: mov v0.d[1], v1.d[0] 310; CHECK-GI-NEXT: fcvtzs v1.2d, v2.2d 311; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI10_1] 312; CHECK-GI-NEXT: adrp x8, .LCPI10_0 313; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 314; CHECK-GI-NEXT: cmgt v4.2d, v2.2d, v1.2d 315; CHECK-GI-NEXT: bif v1.16b, v2.16b, v4.16b 316; CHECK-GI-NEXT: cmgt v3.2d, v2.2d, v0.2d 317; CHECK-GI-NEXT: bif v0.16b, v2.16b, v3.16b 318; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI10_0] 319; CHECK-GI-NEXT: cmgt v4.2d, v1.2d, v2.2d 320; CHECK-GI-NEXT: cmgt v3.2d, v0.2d, v2.2d 321; CHECK-GI-NEXT: bif v1.16b, v2.16b, v4.16b 322; CHECK-GI-NEXT: bif v0.16b, v2.16b, v3.16b 323; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s 324; CHECK-GI-NEXT: ret 325 %x = call <3 x i32> @llvm.fptosi.sat.v3f64.v3i32(<3 x double> %f) 326 ret <3 x i32> %x 327} 328 329define <4 x i32> @test_signed_v4f64_v4i32(<4 x double> %f) { 330; CHECK-SD-LABEL: test_signed_v4f64_v4i32: 331; CHECK-SD: // %bb.0: 332; CHECK-SD-NEXT: mov d2, v0.d[1] 333; CHECK-SD-NEXT: fcvtzs w8, d0 334; CHECK-SD-NEXT: fcvtzs w9, d2 335; CHECK-SD-NEXT: fmov s0, w8 336; CHECK-SD-NEXT: fcvtzs w8, d1 337; CHECK-SD-NEXT: mov d1, v1.d[1] 338; CHECK-SD-NEXT: mov v0.s[1], w9 339; CHECK-SD-NEXT: mov v0.s[2], w8 340; CHECK-SD-NEXT: fcvtzs w8, d1 341; CHECK-SD-NEXT: mov v0.s[3], w8 342; CHECK-SD-NEXT: ret 343; 344; CHECK-GI-LABEL: test_signed_v4f64_v4i32: 345; CHECK-GI: // %bb.0: 346; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 347; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d 348; CHECK-GI-NEXT: adrp x8, .LCPI11_1 349; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI11_1] 350; CHECK-GI-NEXT: adrp x8, .LCPI11_0 351; CHECK-GI-NEXT: cmgt v3.2d, v2.2d, v0.2d 352; CHECK-GI-NEXT: cmgt v4.2d, v2.2d, v1.2d 353; CHECK-GI-NEXT: bif v0.16b, v2.16b, v3.16b 354; CHECK-GI-NEXT: bif v1.16b, v2.16b, v4.16b 355; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI11_0] 356; CHECK-GI-NEXT: cmgt v3.2d, v0.2d, v2.2d 357; CHECK-GI-NEXT: cmgt v4.2d, v1.2d, v2.2d 358; CHECK-GI-NEXT: bif v0.16b, v2.16b, v3.16b 359; CHECK-GI-NEXT: bif v1.16b, v2.16b, v4.16b 360; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s 361; CHECK-GI-NEXT: ret 362 %x = call <4 x i32> @llvm.fptosi.sat.v4f64.v4i32(<4 x double> %f) 363 ret <4 x i32> %x 364} 365 366define <5 x i32> @test_signed_v5f64_v5i32(<5 x double> %f) { 367; CHECK-SD-LABEL: test_signed_v5f64_v5i32: 368; CHECK-SD: // %bb.0: 369; CHECK-SD-NEXT: fcvtzs w0, d0 370; CHECK-SD-NEXT: fcvtzs w1, d1 371; CHECK-SD-NEXT: fcvtzs w2, d2 372; CHECK-SD-NEXT: fcvtzs w3, d3 373; CHECK-SD-NEXT: fcvtzs w4, d4 374; CHECK-SD-NEXT: ret 375; 376; CHECK-GI-LABEL: test_signed_v5f64_v5i32: 377; CHECK-GI: // %bb.0: 378; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 379; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2 380; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 381; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3 382; CHECK-GI-NEXT: adrp x8, .LCPI12_1 383; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4 384; CHECK-GI-NEXT: mov v0.d[1], v1.d[0] 385; CHECK-GI-NEXT: mov v2.d[1], v3.d[0] 386; CHECK-GI-NEXT: fcvtzs v3.2d, v4.2d 387; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 388; CHECK-GI-NEXT: fcvtzs v1.2d, v2.2d 389; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI12_1] 390; CHECK-GI-NEXT: adrp x8, .LCPI12_0 391; CHECK-GI-NEXT: cmgt v4.2d, v2.2d, v0.2d 392; CHECK-GI-NEXT: cmgt v5.2d, v2.2d, v1.2d 393; CHECK-GI-NEXT: bif v0.16b, v2.16b, v4.16b 394; CHECK-GI-NEXT: bif v1.16b, v2.16b, v5.16b 395; CHECK-GI-NEXT: cmgt v4.2d, v2.2d, v3.2d 396; CHECK-GI-NEXT: ldr q5, [x8, :lo12:.LCPI12_0] 397; CHECK-GI-NEXT: bit v2.16b, v3.16b, v4.16b 398; CHECK-GI-NEXT: cmgt v3.2d, v0.2d, v5.2d 399; CHECK-GI-NEXT: cmgt v4.2d, v1.2d, v5.2d 400; CHECK-GI-NEXT: bif v0.16b, v5.16b, v3.16b 401; CHECK-GI-NEXT: bif v1.16b, v5.16b, v4.16b 402; CHECK-GI-NEXT: cmgt v3.2d, v2.2d, v5.2d 403; CHECK-GI-NEXT: bif v2.16b, v5.16b, v3.16b 404; CHECK-GI-NEXT: mov d3, v0.d[1] 405; CHECK-GI-NEXT: mov d4, v1.d[1] 406; CHECK-GI-NEXT: fmov x0, d0 407; CHECK-GI-NEXT: fmov x2, d1 408; CHECK-GI-NEXT: // kill: def $w0 killed $w0 killed $x0 409; CHECK-GI-NEXT: // kill: def $w2 killed $w2 killed $x2 410; CHECK-GI-NEXT: fmov x4, d2 411; CHECK-GI-NEXT: fmov x1, d3 412; CHECK-GI-NEXT: fmov x3, d4 413; CHECK-GI-NEXT: // kill: def $w4 killed $w4 killed $x4 414; CHECK-GI-NEXT: // kill: def $w1 killed $w1 killed $x1 415; CHECK-GI-NEXT: // kill: def $w3 killed $w3 killed $x3 416; CHECK-GI-NEXT: ret 417 %x = call <5 x i32> @llvm.fptosi.sat.v5f64.v5i32(<5 x double> %f) 418 ret <5 x i32> %x 419} 420 421define <6 x i32> @test_signed_v6f64_v6i32(<6 x double> %f) { 422; CHECK-SD-LABEL: test_signed_v6f64_v6i32: 423; CHECK-SD: // %bb.0: 424; CHECK-SD-NEXT: fcvtzs w0, d0 425; CHECK-SD-NEXT: fcvtzs w1, d1 426; CHECK-SD-NEXT: fcvtzs w2, d2 427; CHECK-SD-NEXT: fcvtzs w3, d3 428; CHECK-SD-NEXT: fcvtzs w4, d4 429; CHECK-SD-NEXT: fcvtzs w5, d5 430; CHECK-SD-NEXT: ret 431; 432; CHECK-GI-LABEL: test_signed_v6f64_v6i32: 433; CHECK-GI: // %bb.0: 434; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 435; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2 436; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4 437; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 438; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3 439; CHECK-GI-NEXT: // kill: def $d5 killed $d5 def $q5 440; CHECK-GI-NEXT: adrp x8, .LCPI13_1 441; CHECK-GI-NEXT: mov v0.d[1], v1.d[0] 442; CHECK-GI-NEXT: mov v2.d[1], v3.d[0] 443; CHECK-GI-NEXT: mov v4.d[1], v5.d[0] 444; CHECK-GI-NEXT: ldr q3, [x8, :lo12:.LCPI13_1] 445; CHECK-GI-NEXT: adrp x8, .LCPI13_0 446; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 447; CHECK-GI-NEXT: fcvtzs v1.2d, v2.2d 448; CHECK-GI-NEXT: fcvtzs v2.2d, v4.2d 449; CHECK-GI-NEXT: cmgt v4.2d, v3.2d, v0.2d 450; CHECK-GI-NEXT: cmgt v5.2d, v3.2d, v1.2d 451; CHECK-GI-NEXT: cmgt v6.2d, v3.2d, v2.2d 452; CHECK-GI-NEXT: bif v0.16b, v3.16b, v4.16b 453; CHECK-GI-NEXT: bif v1.16b, v3.16b, v5.16b 454; CHECK-GI-NEXT: bif v2.16b, v3.16b, v6.16b 455; CHECK-GI-NEXT: ldr q3, [x8, :lo12:.LCPI13_0] 456; CHECK-GI-NEXT: cmgt v4.2d, v0.2d, v3.2d 457; CHECK-GI-NEXT: cmgt v5.2d, v1.2d, v3.2d 458; CHECK-GI-NEXT: cmgt v6.2d, v2.2d, v3.2d 459; CHECK-GI-NEXT: bif v0.16b, v3.16b, v4.16b 460; CHECK-GI-NEXT: bif v1.16b, v3.16b, v5.16b 461; CHECK-GI-NEXT: bif v2.16b, v3.16b, v6.16b 462; CHECK-GI-NEXT: mov d3, v0.d[1] 463; CHECK-GI-NEXT: mov d4, v1.d[1] 464; CHECK-GI-NEXT: mov d5, v2.d[1] 465; CHECK-GI-NEXT: fmov x0, d0 466; CHECK-GI-NEXT: fmov x2, d1 467; CHECK-GI-NEXT: fmov x4, d2 468; CHECK-GI-NEXT: // kill: def $w0 killed $w0 killed $x0 469; CHECK-GI-NEXT: // kill: def $w2 killed $w2 killed $x2 470; CHECK-GI-NEXT: // kill: def $w4 killed $w4 killed $x4 471; CHECK-GI-NEXT: fmov x1, d3 472; CHECK-GI-NEXT: fmov x3, d4 473; CHECK-GI-NEXT: fmov x5, d5 474; CHECK-GI-NEXT: // kill: def $w1 killed $w1 killed $x1 475; CHECK-GI-NEXT: // kill: def $w3 killed $w3 killed $x3 476; CHECK-GI-NEXT: // kill: def $w5 killed $w5 killed $x5 477; CHECK-GI-NEXT: ret 478 %x = call <6 x i32> @llvm.fptosi.sat.v6f64.v6i32(<6 x double> %f) 479 ret <6 x i32> %x 480} 481 482; 483; FP128 to signed 32-bit -- Vector size variation 484; 485 486declare <1 x i32> @llvm.fptosi.sat.v1f128.v1i32 (<1 x fp128>) 487declare <2 x i32> @llvm.fptosi.sat.v2f128.v2i32 (<2 x fp128>) 488declare <3 x i32> @llvm.fptosi.sat.v3f128.v3i32 (<3 x fp128>) 489declare <4 x i32> @llvm.fptosi.sat.v4f128.v4i32 (<4 x fp128>) 490 491define <1 x i32> @test_signed_v1f128_v1i32(<1 x fp128> %f) { 492; CHECK-SD-LABEL: test_signed_v1f128_v1i32: 493; CHECK-SD: // %bb.0: 494; CHECK-SD-NEXT: sub sp, sp, #32 495; CHECK-SD-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill 496; CHECK-SD-NEXT: .cfi_def_cfa_offset 32 497; CHECK-SD-NEXT: .cfi_offset w19, -8 498; CHECK-SD-NEXT: .cfi_offset w30, -16 499; CHECK-SD-NEXT: adrp x8, .LCPI14_0 500; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 501; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI14_0] 502; CHECK-SD-NEXT: bl __getf2 503; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 504; CHECK-SD-NEXT: mov w19, w0 505; CHECK-SD-NEXT: bl __fixtfsi 506; CHECK-SD-NEXT: cmp w19, #0 507; CHECK-SD-NEXT: mov w8, #-2147483648 // =0x80000000 508; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 509; CHECK-SD-NEXT: csel w19, w8, w0, lt 510; CHECK-SD-NEXT: adrp x8, .LCPI14_1 511; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI14_1] 512; CHECK-SD-NEXT: bl __gttf2 513; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 514; CHECK-SD-NEXT: mov w8, #2147483647 // =0x7fffffff 515; CHECK-SD-NEXT: cmp w0, #0 516; CHECK-SD-NEXT: csel w19, w8, w19, gt 517; CHECK-SD-NEXT: mov v1.16b, v0.16b 518; CHECK-SD-NEXT: bl __unordtf2 519; CHECK-SD-NEXT: cmp w0, #0 520; CHECK-SD-NEXT: csel w8, wzr, w19, ne 521; CHECK-SD-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload 522; CHECK-SD-NEXT: fmov s0, w8 523; CHECK-SD-NEXT: add sp, sp, #32 524; CHECK-SD-NEXT: ret 525; 526; CHECK-GI-LABEL: test_signed_v1f128_v1i32: 527; CHECK-GI: // %bb.0: 528; CHECK-GI-NEXT: sub sp, sp, #48 529; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill 530; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill 531; CHECK-GI-NEXT: .cfi_def_cfa_offset 48 532; CHECK-GI-NEXT: .cfi_offset w19, -8 533; CHECK-GI-NEXT: .cfi_offset w20, -16 534; CHECK-GI-NEXT: .cfi_offset w30, -32 535; CHECK-GI-NEXT: adrp x8, .LCPI14_1 536; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill 537; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI14_1] 538; CHECK-GI-NEXT: bl __getf2 539; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 540; CHECK-GI-NEXT: cmp w0, #0 541; CHECK-GI-NEXT: mov x9, #-4603241769126068224 // =0xc01e000000000000 542; CHECK-GI-NEXT: fmov x8, d0 543; CHECK-GI-NEXT: csel x19, x8, xzr, lt 544; CHECK-GI-NEXT: mov x8, v0.d[1] 545; CHECK-GI-NEXT: mov v0.d[0], x19 546; CHECK-GI-NEXT: csel x20, x8, x9, lt 547; CHECK-GI-NEXT: adrp x8, .LCPI14_0 548; CHECK-GI-NEXT: mov v0.d[1], x20 549; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI14_0] 550; CHECK-GI-NEXT: bl __gttf2 551; CHECK-GI-NEXT: cmp w0, #0 552; CHECK-GI-NEXT: csel x8, x19, xzr, gt 553; CHECK-GI-NEXT: mov v0.d[0], x8 554; CHECK-GI-NEXT: mov x8, #281474976448512 // =0xfffffffc0000 555; CHECK-GI-NEXT: movk x8, #16413, lsl #48 556; CHECK-GI-NEXT: csel x8, x20, x8, gt 557; CHECK-GI-NEXT: mov v0.d[1], x8 558; CHECK-GI-NEXT: bl __fixtfsi 559; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 560; CHECK-GI-NEXT: mov w19, w0 561; CHECK-GI-NEXT: mov v1.16b, v0.16b 562; CHECK-GI-NEXT: bl __unordtf2 563; CHECK-GI-NEXT: cmp w0, #0 564; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload 565; CHECK-GI-NEXT: csel w8, wzr, w19, ne 566; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload 567; CHECK-GI-NEXT: mov v0.s[0], w8 568; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 569; CHECK-GI-NEXT: add sp, sp, #48 570; CHECK-GI-NEXT: ret 571 %x = call <1 x i32> @llvm.fptosi.sat.v1f128.v1i32(<1 x fp128> %f) 572 ret <1 x i32> %x 573} 574 575define <2 x i32> @test_signed_v2f128_v2i32(<2 x fp128> %f) { 576; CHECK-SD-LABEL: test_signed_v2f128_v2i32: 577; CHECK-SD: // %bb.0: 578; CHECK-SD-NEXT: sub sp, sp, #112 579; CHECK-SD-NEXT: str x30, [sp, #64] // 8-byte Folded Spill 580; CHECK-SD-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill 581; CHECK-SD-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill 582; CHECK-SD-NEXT: .cfi_def_cfa_offset 112 583; CHECK-SD-NEXT: .cfi_offset w19, -8 584; CHECK-SD-NEXT: .cfi_offset w20, -16 585; CHECK-SD-NEXT: .cfi_offset w21, -24 586; CHECK-SD-NEXT: .cfi_offset w22, -32 587; CHECK-SD-NEXT: .cfi_offset w30, -48 588; CHECK-SD-NEXT: mov v2.16b, v1.16b 589; CHECK-SD-NEXT: stp q1, q0, [sp, #32] // 32-byte Folded Spill 590; CHECK-SD-NEXT: adrp x8, .LCPI15_0 591; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI15_0] 592; CHECK-SD-NEXT: mov v0.16b, v2.16b 593; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill 594; CHECK-SD-NEXT: bl __getf2 595; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 596; CHECK-SD-NEXT: mov w19, w0 597; CHECK-SD-NEXT: bl __fixtfsi 598; CHECK-SD-NEXT: adrp x8, .LCPI15_1 599; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 600; CHECK-SD-NEXT: cmp w19, #0 601; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI15_1] 602; CHECK-SD-NEXT: mov w20, #-2147483648 // =0x80000000 603; CHECK-SD-NEXT: csel w19, w20, w0, lt 604; CHECK-SD-NEXT: str q1, [sp] // 16-byte Folded Spill 605; CHECK-SD-NEXT: bl __gttf2 606; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 607; CHECK-SD-NEXT: mov w21, #2147483647 // =0x7fffffff 608; CHECK-SD-NEXT: cmp w0, #0 609; CHECK-SD-NEXT: csel w19, w21, w19, gt 610; CHECK-SD-NEXT: mov v1.16b, v0.16b 611; CHECK-SD-NEXT: bl __unordtf2 612; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 613; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 614; CHECK-SD-NEXT: cmp w0, #0 615; CHECK-SD-NEXT: csel w22, wzr, w19, ne 616; CHECK-SD-NEXT: bl __getf2 617; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 618; CHECK-SD-NEXT: mov w19, w0 619; CHECK-SD-NEXT: bl __fixtfsi 620; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 621; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Folded Reload 622; CHECK-SD-NEXT: cmp w19, #0 623; CHECK-SD-NEXT: csel w19, w20, w0, lt 624; CHECK-SD-NEXT: bl __gttf2 625; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 626; CHECK-SD-NEXT: cmp w0, #0 627; CHECK-SD-NEXT: csel w19, w21, w19, gt 628; CHECK-SD-NEXT: mov v1.16b, v0.16b 629; CHECK-SD-NEXT: bl __unordtf2 630; CHECK-SD-NEXT: cmp w0, #0 631; CHECK-SD-NEXT: ldr x30, [sp, #64] // 8-byte Folded Reload 632; CHECK-SD-NEXT: csel w8, wzr, w19, ne 633; CHECK-SD-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload 634; CHECK-SD-NEXT: fmov s0, w8 635; CHECK-SD-NEXT: mov v0.s[1], w22 636; CHECK-SD-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload 637; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 638; CHECK-SD-NEXT: add sp, sp, #112 639; CHECK-SD-NEXT: ret 640; 641; CHECK-GI-LABEL: test_signed_v2f128_v2i32: 642; CHECK-GI: // %bb.0: 643; CHECK-GI-NEXT: sub sp, sp, #112 644; CHECK-GI-NEXT: str x30, [sp, #64] // 8-byte Folded Spill 645; CHECK-GI-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill 646; CHECK-GI-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill 647; CHECK-GI-NEXT: .cfi_def_cfa_offset 112 648; CHECK-GI-NEXT: .cfi_offset w19, -8 649; CHECK-GI-NEXT: .cfi_offset w20, -16 650; CHECK-GI-NEXT: .cfi_offset w21, -24 651; CHECK-GI-NEXT: .cfi_offset w22, -32 652; CHECK-GI-NEXT: .cfi_offset w30, -48 653; CHECK-GI-NEXT: adrp x8, .LCPI15_1 654; CHECK-GI-NEXT: str q1, [sp, #48] // 16-byte Folded Spill 655; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI15_1] 656; CHECK-GI-NEXT: str q0, [sp, #32] // 16-byte Folded Spill 657; CHECK-GI-NEXT: mov v1.16b, v2.16b 658; CHECK-GI-NEXT: str q2, [sp, #16] // 16-byte Folded Spill 659; CHECK-GI-NEXT: bl __getf2 660; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 661; CHECK-GI-NEXT: cmp w0, #0 662; CHECK-GI-NEXT: mov x20, #-4603241769126068224 // =0xc01e000000000000 663; CHECK-GI-NEXT: fmov x8, d0 664; CHECK-GI-NEXT: csel x19, x8, xzr, lt 665; CHECK-GI-NEXT: mov x8, v0.d[1] 666; CHECK-GI-NEXT: mov v0.d[0], x19 667; CHECK-GI-NEXT: csel x21, x8, x20, lt 668; CHECK-GI-NEXT: adrp x8, .LCPI15_0 669; CHECK-GI-NEXT: mov v0.d[1], x21 670; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI15_0] 671; CHECK-GI-NEXT: str q1, [sp] // 16-byte Folded Spill 672; CHECK-GI-NEXT: bl __gttf2 673; CHECK-GI-NEXT: cmp w0, #0 674; CHECK-GI-NEXT: mov x22, #281474976448512 // =0xfffffffc0000 675; CHECK-GI-NEXT: csel x8, x19, xzr, gt 676; CHECK-GI-NEXT: movk x22, #16413, lsl #48 677; CHECK-GI-NEXT: mov v0.d[0], x8 678; CHECK-GI-NEXT: csel x8, x21, x22, gt 679; CHECK-GI-NEXT: mov v0.d[1], x8 680; CHECK-GI-NEXT: bl __fixtfsi 681; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 682; CHECK-GI-NEXT: mov w19, w0 683; CHECK-GI-NEXT: mov v1.16b, v0.16b 684; CHECK-GI-NEXT: bl __unordtf2 685; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 686; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 687; CHECK-GI-NEXT: cmp w0, #0 688; CHECK-GI-NEXT: csel w21, wzr, w19, ne 689; CHECK-GI-NEXT: bl __getf2 690; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 691; CHECK-GI-NEXT: cmp w0, #0 692; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Folded Reload 693; CHECK-GI-NEXT: fmov x8, d0 694; CHECK-GI-NEXT: csel x19, x8, xzr, lt 695; CHECK-GI-NEXT: mov x8, v0.d[1] 696; CHECK-GI-NEXT: mov v0.d[0], x19 697; CHECK-GI-NEXT: csel x20, x8, x20, lt 698; CHECK-GI-NEXT: mov v0.d[1], x20 699; CHECK-GI-NEXT: bl __gttf2 700; CHECK-GI-NEXT: cmp w0, #0 701; CHECK-GI-NEXT: csel x8, x19, xzr, gt 702; CHECK-GI-NEXT: mov v0.d[0], x8 703; CHECK-GI-NEXT: csel x8, x20, x22, gt 704; CHECK-GI-NEXT: mov v0.d[1], x8 705; CHECK-GI-NEXT: bl __fixtfsi 706; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 707; CHECK-GI-NEXT: mov w19, w0 708; CHECK-GI-NEXT: mov v1.16b, v0.16b 709; CHECK-GI-NEXT: bl __unordtf2 710; CHECK-GI-NEXT: mov v0.s[0], w21 711; CHECK-GI-NEXT: cmp w0, #0 712; CHECK-GI-NEXT: ldr x30, [sp, #64] // 8-byte Folded Reload 713; CHECK-GI-NEXT: csel w8, wzr, w19, ne 714; CHECK-GI-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload 715; CHECK-GI-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload 716; CHECK-GI-NEXT: mov v0.s[1], w8 717; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 718; CHECK-GI-NEXT: add sp, sp, #112 719; CHECK-GI-NEXT: ret 720 %x = call <2 x i32> @llvm.fptosi.sat.v2f128.v2i32(<2 x fp128> %f) 721 ret <2 x i32> %x 722} 723 724define <3 x i32> @test_signed_v3f128_v3i32(<3 x fp128> %f) { 725; CHECK-SD-LABEL: test_signed_v3f128_v3i32: 726; CHECK-SD: // %bb.0: 727; CHECK-SD-NEXT: sub sp, sp, #128 728; CHECK-SD-NEXT: str x30, [sp, #80] // 8-byte Folded Spill 729; CHECK-SD-NEXT: stp x22, x21, [sp, #96] // 16-byte Folded Spill 730; CHECK-SD-NEXT: stp x20, x19, [sp, #112] // 16-byte Folded Spill 731; CHECK-SD-NEXT: .cfi_def_cfa_offset 128 732; CHECK-SD-NEXT: .cfi_offset w19, -8 733; CHECK-SD-NEXT: .cfi_offset w20, -16 734; CHECK-SD-NEXT: .cfi_offset w21, -24 735; CHECK-SD-NEXT: .cfi_offset w22, -32 736; CHECK-SD-NEXT: .cfi_offset w30, -48 737; CHECK-SD-NEXT: stp q0, q2, [sp, #48] // 32-byte Folded Spill 738; CHECK-SD-NEXT: mov v2.16b, v1.16b 739; CHECK-SD-NEXT: adrp x8, .LCPI16_0 740; CHECK-SD-NEXT: str q1, [sp, #32] // 16-byte Folded Spill 741; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI16_0] 742; CHECK-SD-NEXT: mov v0.16b, v2.16b 743; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill 744; CHECK-SD-NEXT: bl __getf2 745; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 746; CHECK-SD-NEXT: mov w19, w0 747; CHECK-SD-NEXT: bl __fixtfsi 748; CHECK-SD-NEXT: adrp x8, .LCPI16_1 749; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 750; CHECK-SD-NEXT: cmp w19, #0 751; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI16_1] 752; CHECK-SD-NEXT: mov w20, #-2147483648 // =0x80000000 753; CHECK-SD-NEXT: csel w19, w20, w0, lt 754; CHECK-SD-NEXT: str q1, [sp] // 16-byte Folded Spill 755; CHECK-SD-NEXT: bl __gttf2 756; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 757; CHECK-SD-NEXT: mov w21, #2147483647 // =0x7fffffff 758; CHECK-SD-NEXT: cmp w0, #0 759; CHECK-SD-NEXT: csel w19, w21, w19, gt 760; CHECK-SD-NEXT: mov v1.16b, v0.16b 761; CHECK-SD-NEXT: bl __unordtf2 762; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 763; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 764; CHECK-SD-NEXT: cmp w0, #0 765; CHECK-SD-NEXT: csel w22, wzr, w19, ne 766; CHECK-SD-NEXT: bl __getf2 767; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 768; CHECK-SD-NEXT: mov w19, w0 769; CHECK-SD-NEXT: bl __fixtfsi 770; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 771; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Folded Reload 772; CHECK-SD-NEXT: cmp w19, #0 773; CHECK-SD-NEXT: csel w19, w20, w0, lt 774; CHECK-SD-NEXT: bl __gttf2 775; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 776; CHECK-SD-NEXT: cmp w0, #0 777; CHECK-SD-NEXT: csel w19, w21, w19, gt 778; CHECK-SD-NEXT: mov v1.16b, v0.16b 779; CHECK-SD-NEXT: bl __unordtf2 780; CHECK-SD-NEXT: cmp w0, #0 781; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 782; CHECK-SD-NEXT: csel w8, wzr, w19, ne 783; CHECK-SD-NEXT: fmov s0, w8 784; CHECK-SD-NEXT: mov v0.s[1], w22 785; CHECK-SD-NEXT: str q0, [sp, #48] // 16-byte Folded Spill 786; CHECK-SD-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 787; CHECK-SD-NEXT: bl __getf2 788; CHECK-SD-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 789; CHECK-SD-NEXT: mov w19, w0 790; CHECK-SD-NEXT: bl __fixtfsi 791; CHECK-SD-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 792; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Folded Reload 793; CHECK-SD-NEXT: cmp w19, #0 794; CHECK-SD-NEXT: csel w19, w20, w0, lt 795; CHECK-SD-NEXT: bl __gttf2 796; CHECK-SD-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 797; CHECK-SD-NEXT: cmp w0, #0 798; CHECK-SD-NEXT: csel w19, w21, w19, gt 799; CHECK-SD-NEXT: mov v1.16b, v0.16b 800; CHECK-SD-NEXT: bl __unordtf2 801; CHECK-SD-NEXT: cmp w0, #0 802; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 803; CHECK-SD-NEXT: ldr x30, [sp, #80] // 8-byte Folded Reload 804; CHECK-SD-NEXT: csel w8, wzr, w19, ne 805; CHECK-SD-NEXT: ldp x20, x19, [sp, #112] // 16-byte Folded Reload 806; CHECK-SD-NEXT: ldp x22, x21, [sp, #96] // 16-byte Folded Reload 807; CHECK-SD-NEXT: mov v0.s[2], w8 808; CHECK-SD-NEXT: add sp, sp, #128 809; CHECK-SD-NEXT: ret 810; 811; CHECK-GI-LABEL: test_signed_v3f128_v3i32: 812; CHECK-GI: // %bb.0: 813; CHECK-GI-NEXT: sub sp, sp, #128 814; CHECK-GI-NEXT: stp x30, x23, [sp, #80] // 16-byte Folded Spill 815; CHECK-GI-NEXT: stp x22, x21, [sp, #96] // 16-byte Folded Spill 816; CHECK-GI-NEXT: stp x20, x19, [sp, #112] // 16-byte Folded Spill 817; CHECK-GI-NEXT: .cfi_def_cfa_offset 128 818; CHECK-GI-NEXT: .cfi_offset w19, -8 819; CHECK-GI-NEXT: .cfi_offset w20, -16 820; CHECK-GI-NEXT: .cfi_offset w21, -24 821; CHECK-GI-NEXT: .cfi_offset w22, -32 822; CHECK-GI-NEXT: .cfi_offset w23, -40 823; CHECK-GI-NEXT: .cfi_offset w30, -48 824; CHECK-GI-NEXT: adrp x8, .LCPI16_1 825; CHECK-GI-NEXT: str q1, [sp, #48] // 16-byte Folded Spill 826; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI16_1] 827; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill 828; CHECK-GI-NEXT: str q2, [sp, #64] // 16-byte Folded Spill 829; CHECK-GI-NEXT: str q1, [sp, #32] // 16-byte Folded Spill 830; CHECK-GI-NEXT: bl __getf2 831; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 832; CHECK-GI-NEXT: cmp w0, #0 833; CHECK-GI-NEXT: mov x20, #-4603241769126068224 // =0xc01e000000000000 834; CHECK-GI-NEXT: fmov x8, d0 835; CHECK-GI-NEXT: csel x19, x8, xzr, lt 836; CHECK-GI-NEXT: mov x8, v0.d[1] 837; CHECK-GI-NEXT: mov v0.d[0], x19 838; CHECK-GI-NEXT: csel x21, x8, x20, lt 839; CHECK-GI-NEXT: adrp x8, .LCPI16_0 840; CHECK-GI-NEXT: mov v0.d[1], x21 841; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI16_0] 842; CHECK-GI-NEXT: str q1, [sp, #16] // 16-byte Folded Spill 843; CHECK-GI-NEXT: bl __gttf2 844; CHECK-GI-NEXT: cmp w0, #0 845; CHECK-GI-NEXT: mov x22, #281474976448512 // =0xfffffffc0000 846; CHECK-GI-NEXT: csel x8, x19, xzr, gt 847; CHECK-GI-NEXT: movk x22, #16413, lsl #48 848; CHECK-GI-NEXT: mov v0.d[0], x8 849; CHECK-GI-NEXT: csel x8, x21, x22, gt 850; CHECK-GI-NEXT: mov v0.d[1], x8 851; CHECK-GI-NEXT: bl __fixtfsi 852; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 853; CHECK-GI-NEXT: mov w19, w0 854; CHECK-GI-NEXT: mov v1.16b, v0.16b 855; CHECK-GI-NEXT: bl __unordtf2 856; CHECK-GI-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload 857; CHECK-GI-NEXT: cmp w0, #0 858; CHECK-GI-NEXT: csel w21, wzr, w19, ne 859; CHECK-GI-NEXT: bl __getf2 860; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 861; CHECK-GI-NEXT: cmp w0, #0 862; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 863; CHECK-GI-NEXT: fmov x8, d0 864; CHECK-GI-NEXT: csel x19, x8, xzr, lt 865; CHECK-GI-NEXT: mov x8, v0.d[1] 866; CHECK-GI-NEXT: mov v0.d[0], x19 867; CHECK-GI-NEXT: csel x23, x8, x20, lt 868; CHECK-GI-NEXT: mov v0.d[1], x23 869; CHECK-GI-NEXT: bl __gttf2 870; CHECK-GI-NEXT: cmp w0, #0 871; CHECK-GI-NEXT: csel x8, x19, xzr, gt 872; CHECK-GI-NEXT: mov v0.d[0], x8 873; CHECK-GI-NEXT: csel x8, x23, x22, gt 874; CHECK-GI-NEXT: mov v0.d[1], x8 875; CHECK-GI-NEXT: bl __fixtfsi 876; CHECK-GI-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 877; CHECK-GI-NEXT: mov w19, w0 878; CHECK-GI-NEXT: mov v1.16b, v0.16b 879; CHECK-GI-NEXT: bl __unordtf2 880; CHECK-GI-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 881; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload 882; CHECK-GI-NEXT: cmp w0, #0 883; CHECK-GI-NEXT: csel w23, wzr, w19, ne 884; CHECK-GI-NEXT: bl __getf2 885; CHECK-GI-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 886; CHECK-GI-NEXT: cmp w0, #0 887; CHECK-GI-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 888; CHECK-GI-NEXT: fmov x8, d0 889; CHECK-GI-NEXT: csel x19, x8, xzr, lt 890; CHECK-GI-NEXT: mov x8, v0.d[1] 891; CHECK-GI-NEXT: mov v0.d[0], x19 892; CHECK-GI-NEXT: csel x20, x8, x20, lt 893; CHECK-GI-NEXT: mov v0.d[1], x20 894; CHECK-GI-NEXT: bl __gttf2 895; CHECK-GI-NEXT: cmp w0, #0 896; CHECK-GI-NEXT: csel x8, x19, xzr, gt 897; CHECK-GI-NEXT: mov v0.d[0], x8 898; CHECK-GI-NEXT: csel x8, x20, x22, gt 899; CHECK-GI-NEXT: mov v0.d[1], x8 900; CHECK-GI-NEXT: bl __fixtfsi 901; CHECK-GI-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 902; CHECK-GI-NEXT: mov w19, w0 903; CHECK-GI-NEXT: mov v1.16b, v0.16b 904; CHECK-GI-NEXT: bl __unordtf2 905; CHECK-GI-NEXT: mov v0.s[0], w21 906; CHECK-GI-NEXT: cmp w0, #0 907; CHECK-GI-NEXT: csel w8, wzr, w19, ne 908; CHECK-GI-NEXT: ldp x20, x19, [sp, #112] // 16-byte Folded Reload 909; CHECK-GI-NEXT: ldp x22, x21, [sp, #96] // 16-byte Folded Reload 910; CHECK-GI-NEXT: mov v0.s[1], w23 911; CHECK-GI-NEXT: ldp x30, x23, [sp, #80] // 16-byte Folded Reload 912; CHECK-GI-NEXT: mov v0.s[2], w8 913; CHECK-GI-NEXT: add sp, sp, #128 914; CHECK-GI-NEXT: ret 915 %x = call <3 x i32> @llvm.fptosi.sat.v3f128.v3i32(<3 x fp128> %f) 916 ret <3 x i32> %x 917} 918 919define <4 x i32> @test_signed_v4f128_v4i32(<4 x fp128> %f) { 920; CHECK-SD-LABEL: test_signed_v4f128_v4i32: 921; CHECK-SD: // %bb.0: 922; CHECK-SD-NEXT: sub sp, sp, #144 923; CHECK-SD-NEXT: str x30, [sp, #96] // 8-byte Folded Spill 924; CHECK-SD-NEXT: stp x22, x21, [sp, #112] // 16-byte Folded Spill 925; CHECK-SD-NEXT: stp x20, x19, [sp, #128] // 16-byte Folded Spill 926; CHECK-SD-NEXT: .cfi_def_cfa_offset 144 927; CHECK-SD-NEXT: .cfi_offset w19, -8 928; CHECK-SD-NEXT: .cfi_offset w20, -16 929; CHECK-SD-NEXT: .cfi_offset w21, -24 930; CHECK-SD-NEXT: .cfi_offset w22, -32 931; CHECK-SD-NEXT: .cfi_offset w30, -48 932; CHECK-SD-NEXT: stp q2, q3, [sp, #64] // 32-byte Folded Spill 933; CHECK-SD-NEXT: mov v2.16b, v1.16b 934; CHECK-SD-NEXT: adrp x8, .LCPI17_0 935; CHECK-SD-NEXT: str q0, [sp, #48] // 16-byte Folded Spill 936; CHECK-SD-NEXT: str q1, [sp] // 16-byte Folded Spill 937; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI17_0] 938; CHECK-SD-NEXT: mov v0.16b, v2.16b 939; CHECK-SD-NEXT: str q1, [sp, #32] // 16-byte Folded Spill 940; CHECK-SD-NEXT: bl __getf2 941; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 942; CHECK-SD-NEXT: mov w19, w0 943; CHECK-SD-NEXT: bl __fixtfsi 944; CHECK-SD-NEXT: adrp x8, .LCPI17_1 945; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 946; CHECK-SD-NEXT: cmp w19, #0 947; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI17_1] 948; CHECK-SD-NEXT: mov w20, #-2147483648 // =0x80000000 949; CHECK-SD-NEXT: csel w19, w20, w0, lt 950; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill 951; CHECK-SD-NEXT: bl __gttf2 952; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 953; CHECK-SD-NEXT: mov w21, #2147483647 // =0x7fffffff 954; CHECK-SD-NEXT: cmp w0, #0 955; CHECK-SD-NEXT: csel w19, w21, w19, gt 956; CHECK-SD-NEXT: mov v1.16b, v0.16b 957; CHECK-SD-NEXT: bl __unordtf2 958; CHECK-SD-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload 959; CHECK-SD-NEXT: cmp w0, #0 960; CHECK-SD-NEXT: csel w22, wzr, w19, ne 961; CHECK-SD-NEXT: bl __getf2 962; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 963; CHECK-SD-NEXT: mov w19, w0 964; CHECK-SD-NEXT: bl __fixtfsi 965; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 966; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 967; CHECK-SD-NEXT: cmp w19, #0 968; CHECK-SD-NEXT: csel w19, w20, w0, lt 969; CHECK-SD-NEXT: bl __gttf2 970; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 971; CHECK-SD-NEXT: cmp w0, #0 972; CHECK-SD-NEXT: csel w19, w21, w19, gt 973; CHECK-SD-NEXT: mov v1.16b, v0.16b 974; CHECK-SD-NEXT: bl __unordtf2 975; CHECK-SD-NEXT: cmp w0, #0 976; CHECK-SD-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload 977; CHECK-SD-NEXT: csel w8, wzr, w19, ne 978; CHECK-SD-NEXT: fmov s0, w8 979; CHECK-SD-NEXT: mov v0.s[1], w22 980; CHECK-SD-NEXT: str q0, [sp, #48] // 16-byte Folded Spill 981; CHECK-SD-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 982; CHECK-SD-NEXT: bl __getf2 983; CHECK-SD-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 984; CHECK-SD-NEXT: mov w19, w0 985; CHECK-SD-NEXT: bl __fixtfsi 986; CHECK-SD-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 987; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 988; CHECK-SD-NEXT: cmp w19, #0 989; CHECK-SD-NEXT: csel w19, w20, w0, lt 990; CHECK-SD-NEXT: bl __gttf2 991; CHECK-SD-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload 992; CHECK-SD-NEXT: cmp w0, #0 993; CHECK-SD-NEXT: csel w19, w21, w19, gt 994; CHECK-SD-NEXT: mov v1.16b, v0.16b 995; CHECK-SD-NEXT: bl __unordtf2 996; CHECK-SD-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload 997; CHECK-SD-NEXT: cmp w0, #0 998; CHECK-SD-NEXT: csel w8, wzr, w19, ne 999; CHECK-SD-NEXT: mov v0.s[2], w8 1000; CHECK-SD-NEXT: str q0, [sp, #48] // 16-byte Folded Spill 1001; CHECK-SD-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload 1002; CHECK-SD-NEXT: bl __getf2 1003; CHECK-SD-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload 1004; CHECK-SD-NEXT: mov w19, w0 1005; CHECK-SD-NEXT: bl __fixtfsi 1006; CHECK-SD-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload 1007; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 1008; CHECK-SD-NEXT: cmp w19, #0 1009; CHECK-SD-NEXT: csel w19, w20, w0, lt 1010; CHECK-SD-NEXT: bl __gttf2 1011; CHECK-SD-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload 1012; CHECK-SD-NEXT: cmp w0, #0 1013; CHECK-SD-NEXT: csel w19, w21, w19, gt 1014; CHECK-SD-NEXT: mov v1.16b, v0.16b 1015; CHECK-SD-NEXT: bl __unordtf2 1016; CHECK-SD-NEXT: cmp w0, #0 1017; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 1018; CHECK-SD-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload 1019; CHECK-SD-NEXT: csel w8, wzr, w19, ne 1020; CHECK-SD-NEXT: ldp x20, x19, [sp, #128] // 16-byte Folded Reload 1021; CHECK-SD-NEXT: ldp x22, x21, [sp, #112] // 16-byte Folded Reload 1022; CHECK-SD-NEXT: mov v0.s[3], w8 1023; CHECK-SD-NEXT: add sp, sp, #144 1024; CHECK-SD-NEXT: ret 1025; 1026; CHECK-GI-LABEL: test_signed_v4f128_v4i32: 1027; CHECK-GI: // %bb.0: 1028; CHECK-GI-NEXT: sub sp, sp, #160 1029; CHECK-GI-NEXT: str x30, [sp, #96] // 8-byte Folded Spill 1030; CHECK-GI-NEXT: stp x24, x23, [sp, #112] // 16-byte Folded Spill 1031; CHECK-GI-NEXT: stp x22, x21, [sp, #128] // 16-byte Folded Spill 1032; CHECK-GI-NEXT: stp x20, x19, [sp, #144] // 16-byte Folded Spill 1033; CHECK-GI-NEXT: .cfi_def_cfa_offset 160 1034; CHECK-GI-NEXT: .cfi_offset w19, -8 1035; CHECK-GI-NEXT: .cfi_offset w20, -16 1036; CHECK-GI-NEXT: .cfi_offset w21, -24 1037; CHECK-GI-NEXT: .cfi_offset w22, -32 1038; CHECK-GI-NEXT: .cfi_offset w23, -40 1039; CHECK-GI-NEXT: .cfi_offset w24, -48 1040; CHECK-GI-NEXT: .cfi_offset w30, -64 1041; CHECK-GI-NEXT: adrp x8, .LCPI17_1 1042; CHECK-GI-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill 1043; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI17_1] 1044; CHECK-GI-NEXT: str q2, [sp, #32] // 16-byte Folded Spill 1045; CHECK-GI-NEXT: stp q1, q3, [sp, #64] // 32-byte Folded Spill 1046; CHECK-GI-NEXT: bl __getf2 1047; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 1048; CHECK-GI-NEXT: cmp w0, #0 1049; CHECK-GI-NEXT: mov x20, #-4603241769126068224 // =0xc01e000000000000 1050; CHECK-GI-NEXT: fmov x8, d0 1051; CHECK-GI-NEXT: csel x19, x8, xzr, lt 1052; CHECK-GI-NEXT: mov x8, v0.d[1] 1053; CHECK-GI-NEXT: mov v0.d[0], x19 1054; CHECK-GI-NEXT: csel x21, x8, x20, lt 1055; CHECK-GI-NEXT: adrp x8, .LCPI17_0 1056; CHECK-GI-NEXT: mov v0.d[1], x21 1057; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI17_0] 1058; CHECK-GI-NEXT: str q1, [sp, #48] // 16-byte Folded Spill 1059; CHECK-GI-NEXT: bl __gttf2 1060; CHECK-GI-NEXT: cmp w0, #0 1061; CHECK-GI-NEXT: mov x22, #281474976448512 // =0xfffffffc0000 1062; CHECK-GI-NEXT: csel x8, x19, xzr, gt 1063; CHECK-GI-NEXT: movk x22, #16413, lsl #48 1064; CHECK-GI-NEXT: mov v0.d[0], x8 1065; CHECK-GI-NEXT: csel x8, x21, x22, gt 1066; CHECK-GI-NEXT: mov v0.d[1], x8 1067; CHECK-GI-NEXT: bl __fixtfsi 1068; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 1069; CHECK-GI-NEXT: mov w19, w0 1070; CHECK-GI-NEXT: mov v1.16b, v0.16b 1071; CHECK-GI-NEXT: bl __unordtf2 1072; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload 1073; CHECK-GI-NEXT: ldr q1, [sp, #64] // 16-byte Folded Reload 1074; CHECK-GI-NEXT: cmp w0, #0 1075; CHECK-GI-NEXT: csel w21, wzr, w19, ne 1076; CHECK-GI-NEXT: bl __getf2 1077; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload 1078; CHECK-GI-NEXT: cmp w0, #0 1079; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Folded Reload 1080; CHECK-GI-NEXT: fmov x8, d0 1081; CHECK-GI-NEXT: csel x19, x8, xzr, lt 1082; CHECK-GI-NEXT: mov x8, v0.d[1] 1083; CHECK-GI-NEXT: mov v0.d[0], x19 1084; CHECK-GI-NEXT: csel x23, x8, x20, lt 1085; CHECK-GI-NEXT: mov v0.d[1], x23 1086; CHECK-GI-NEXT: bl __gttf2 1087; CHECK-GI-NEXT: cmp w0, #0 1088; CHECK-GI-NEXT: csel x8, x19, xzr, gt 1089; CHECK-GI-NEXT: mov v0.d[0], x8 1090; CHECK-GI-NEXT: csel x8, x23, x22, gt 1091; CHECK-GI-NEXT: mov v0.d[1], x8 1092; CHECK-GI-NEXT: bl __fixtfsi 1093; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload 1094; CHECK-GI-NEXT: mov w19, w0 1095; CHECK-GI-NEXT: mov v1.16b, v0.16b 1096; CHECK-GI-NEXT: bl __unordtf2 1097; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 1098; CHECK-GI-NEXT: ldr q1, [sp, #64] // 16-byte Folded Reload 1099; CHECK-GI-NEXT: cmp w0, #0 1100; CHECK-GI-NEXT: csel w23, wzr, w19, ne 1101; CHECK-GI-NEXT: bl __getf2 1102; CHECK-GI-NEXT: ldp q0, q1, [sp, #32] // 32-byte Folded Reload 1103; CHECK-GI-NEXT: cmp w0, #0 1104; CHECK-GI-NEXT: fmov x8, d0 1105; CHECK-GI-NEXT: csel x19, x8, xzr, lt 1106; CHECK-GI-NEXT: mov x8, v0.d[1] 1107; CHECK-GI-NEXT: mov v0.d[0], x19 1108; CHECK-GI-NEXT: csel x24, x8, x20, lt 1109; CHECK-GI-NEXT: mov v0.d[1], x24 1110; CHECK-GI-NEXT: bl __gttf2 1111; CHECK-GI-NEXT: cmp w0, #0 1112; CHECK-GI-NEXT: csel x8, x19, xzr, gt 1113; CHECK-GI-NEXT: mov v0.d[0], x8 1114; CHECK-GI-NEXT: csel x8, x24, x22, gt 1115; CHECK-GI-NEXT: mov v0.d[1], x8 1116; CHECK-GI-NEXT: bl __fixtfsi 1117; CHECK-GI-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 1118; CHECK-GI-NEXT: mov w19, w0 1119; CHECK-GI-NEXT: mov v1.16b, v0.16b 1120; CHECK-GI-NEXT: bl __unordtf2 1121; CHECK-GI-NEXT: ldp q1, q0, [sp, #64] // 32-byte Folded Reload 1122; CHECK-GI-NEXT: cmp w0, #0 1123; CHECK-GI-NEXT: csel w24, wzr, w19, ne 1124; CHECK-GI-NEXT: bl __getf2 1125; CHECK-GI-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload 1126; CHECK-GI-NEXT: cmp w0, #0 1127; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Folded Reload 1128; CHECK-GI-NEXT: fmov x8, d0 1129; CHECK-GI-NEXT: csel x19, x8, xzr, lt 1130; CHECK-GI-NEXT: mov x8, v0.d[1] 1131; CHECK-GI-NEXT: mov v0.d[0], x19 1132; CHECK-GI-NEXT: csel x20, x8, x20, lt 1133; CHECK-GI-NEXT: mov v0.d[1], x20 1134; CHECK-GI-NEXT: bl __gttf2 1135; CHECK-GI-NEXT: cmp w0, #0 1136; CHECK-GI-NEXT: csel x8, x19, xzr, gt 1137; CHECK-GI-NEXT: mov v0.d[0], x8 1138; CHECK-GI-NEXT: csel x8, x20, x22, gt 1139; CHECK-GI-NEXT: mov v0.d[1], x8 1140; CHECK-GI-NEXT: bl __fixtfsi 1141; CHECK-GI-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload 1142; CHECK-GI-NEXT: mov w19, w0 1143; CHECK-GI-NEXT: mov v1.16b, v0.16b 1144; CHECK-GI-NEXT: bl __unordtf2 1145; CHECK-GI-NEXT: mov v0.s[0], w21 1146; CHECK-GI-NEXT: cmp w0, #0 1147; CHECK-GI-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload 1148; CHECK-GI-NEXT: csel w8, wzr, w19, ne 1149; CHECK-GI-NEXT: ldp x20, x19, [sp, #144] // 16-byte Folded Reload 1150; CHECK-GI-NEXT: ldp x22, x21, [sp, #128] // 16-byte Folded Reload 1151; CHECK-GI-NEXT: mov v0.s[1], w23 1152; CHECK-GI-NEXT: mov v0.s[2], w24 1153; CHECK-GI-NEXT: ldp x24, x23, [sp, #112] // 16-byte Folded Reload 1154; CHECK-GI-NEXT: mov v0.s[3], w8 1155; CHECK-GI-NEXT: add sp, sp, #160 1156; CHECK-GI-NEXT: ret 1157 %x = call <4 x i32> @llvm.fptosi.sat.v4f128.v4i32(<4 x fp128> %f) 1158 ret <4 x i32> %x 1159} 1160 1161; 1162; FP16 to signed 32-bit -- Vector size variation 1163; 1164 1165declare <1 x i32> @llvm.fptosi.sat.v1f16.v1i32 (<1 x half>) 1166declare <2 x i32> @llvm.fptosi.sat.v2f16.v2i32 (<2 x half>) 1167declare <3 x i32> @llvm.fptosi.sat.v3f16.v3i32 (<3 x half>) 1168declare <4 x i32> @llvm.fptosi.sat.v4f16.v4i32 (<4 x half>) 1169declare <5 x i32> @llvm.fptosi.sat.v5f16.v5i32 (<5 x half>) 1170declare <6 x i32> @llvm.fptosi.sat.v6f16.v6i32 (<6 x half>) 1171declare <7 x i32> @llvm.fptosi.sat.v7f16.v7i32 (<7 x half>) 1172declare <8 x i32> @llvm.fptosi.sat.v8f16.v8i32 (<8 x half>) 1173 1174define <1 x i32> @test_signed_v1f16_v1i32(<1 x half> %f) { 1175; CHECK-SD-CVT-LABEL: test_signed_v1f16_v1i32: 1176; CHECK-SD-CVT: // %bb.0: 1177; CHECK-SD-CVT-NEXT: fcvt s0, h0 1178; CHECK-SD-CVT-NEXT: fcvtzs w8, s0 1179; CHECK-SD-CVT-NEXT: fmov s0, w8 1180; CHECK-SD-CVT-NEXT: ret 1181; 1182; CHECK-SD-FP16-LABEL: test_signed_v1f16_v1i32: 1183; CHECK-SD-FP16: // %bb.0: 1184; CHECK-SD-FP16-NEXT: fcvtzs w8, h0 1185; CHECK-SD-FP16-NEXT: fmov s0, w8 1186; CHECK-SD-FP16-NEXT: ret 1187; 1188; CHECK-GI-CVT-LABEL: test_signed_v1f16_v1i32: 1189; CHECK-GI-CVT: // %bb.0: 1190; CHECK-GI-CVT-NEXT: fcvt s0, h0 1191; CHECK-GI-CVT-NEXT: fcvtzs w8, s0 1192; CHECK-GI-CVT-NEXT: mov v0.s[0], w8 1193; CHECK-GI-CVT-NEXT: // kill: def $d0 killed $d0 killed $q0 1194; CHECK-GI-CVT-NEXT: ret 1195; 1196; CHECK-GI-FP16-LABEL: test_signed_v1f16_v1i32: 1197; CHECK-GI-FP16: // %bb.0: 1198; CHECK-GI-FP16-NEXT: fcvtzs w8, h0 1199; CHECK-GI-FP16-NEXT: mov v0.s[0], w8 1200; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 killed $q0 1201; CHECK-GI-FP16-NEXT: ret 1202 %x = call <1 x i32> @llvm.fptosi.sat.v1f16.v1i32(<1 x half> %f) 1203 ret <1 x i32> %x 1204} 1205 1206define <2 x i32> @test_signed_v2f16_v2i32(<2 x half> %f) { 1207; CHECK-SD-LABEL: test_signed_v2f16_v2i32: 1208; CHECK-SD: // %bb.0: 1209; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h 1210; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 1211; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 1212; CHECK-SD-NEXT: ret 1213; 1214; CHECK-GI-LABEL: test_signed_v2f16_v2i32: 1215; CHECK-GI: // %bb.0: 1216; CHECK-GI-NEXT: fcvtl v0.4s, v0.4h 1217; CHECK-GI-NEXT: fcvtzs v0.2s, v0.2s 1218; CHECK-GI-NEXT: ret 1219 %x = call <2 x i32> @llvm.fptosi.sat.v2f16.v2i32(<2 x half> %f) 1220 ret <2 x i32> %x 1221} 1222 1223define <3 x i32> @test_signed_v3f16_v3i32(<3 x half> %f) { 1224; CHECK-LABEL: test_signed_v3f16_v3i32: 1225; CHECK: // %bb.0: 1226; CHECK-NEXT: fcvtl v0.4s, v0.4h 1227; CHECK-NEXT: fcvtzs v0.4s, v0.4s 1228; CHECK-NEXT: ret 1229 %x = call <3 x i32> @llvm.fptosi.sat.v3f16.v3i32(<3 x half> %f) 1230 ret <3 x i32> %x 1231} 1232 1233define <4 x i32> @test_signed_v4f16_v4i32(<4 x half> %f) { 1234; CHECK-LABEL: test_signed_v4f16_v4i32: 1235; CHECK: // %bb.0: 1236; CHECK-NEXT: fcvtl v0.4s, v0.4h 1237; CHECK-NEXT: fcvtzs v0.4s, v0.4s 1238; CHECK-NEXT: ret 1239 %x = call <4 x i32> @llvm.fptosi.sat.v4f16.v4i32(<4 x half> %f) 1240 ret <4 x i32> %x 1241} 1242 1243define <5 x i32> @test_signed_v5f16_v5i32(<5 x half> %f) { 1244; CHECK-SD-LABEL: test_signed_v5f16_v5i32: 1245; CHECK-SD: // %bb.0: 1246; CHECK-SD-NEXT: fcvtl v1.4s, v0.4h 1247; CHECK-SD-NEXT: fcvtl2 v0.4s, v0.8h 1248; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s 1249; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 1250; CHECK-SD-NEXT: mov w1, v1.s[1] 1251; CHECK-SD-NEXT: mov w2, v1.s[2] 1252; CHECK-SD-NEXT: mov w3, v1.s[3] 1253; CHECK-SD-NEXT: fmov w0, s1 1254; CHECK-SD-NEXT: fmov w4, s0 1255; CHECK-SD-NEXT: ret 1256; 1257; CHECK-GI-LABEL: test_signed_v5f16_v5i32: 1258; CHECK-GI: // %bb.0: 1259; CHECK-GI-NEXT: fcvtl v1.4s, v0.4h 1260; CHECK-GI-NEXT: mov v0.h[0], v0.h[4] 1261; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s 1262; CHECK-GI-NEXT: fcvtl v0.4s, v0.4h 1263; CHECK-GI-NEXT: mov s2, v1.s[1] 1264; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 1265; CHECK-GI-NEXT: mov s3, v1.s[2] 1266; CHECK-GI-NEXT: mov s4, v1.s[3] 1267; CHECK-GI-NEXT: fmov w0, s1 1268; CHECK-GI-NEXT: fmov w1, s2 1269; CHECK-GI-NEXT: fmov w2, s3 1270; CHECK-GI-NEXT: fmov w4, s0 1271; CHECK-GI-NEXT: fmov w3, s4 1272; CHECK-GI-NEXT: ret 1273 %x = call <5 x i32> @llvm.fptosi.sat.v5f16.v5i32(<5 x half> %f) 1274 ret <5 x i32> %x 1275} 1276 1277define <6 x i32> @test_signed_v6f16_v6i32(<6 x half> %f) { 1278; CHECK-SD-LABEL: test_signed_v6f16_v6i32: 1279; CHECK-SD: // %bb.0: 1280; CHECK-SD-NEXT: fcvtl v1.4s, v0.4h 1281; CHECK-SD-NEXT: fcvtl2 v0.4s, v0.8h 1282; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s 1283; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 1284; CHECK-SD-NEXT: mov w1, v1.s[1] 1285; CHECK-SD-NEXT: mov w2, v1.s[2] 1286; CHECK-SD-NEXT: mov w5, v0.s[1] 1287; CHECK-SD-NEXT: mov w3, v1.s[3] 1288; CHECK-SD-NEXT: fmov w4, s0 1289; CHECK-SD-NEXT: fmov w0, s1 1290; CHECK-SD-NEXT: ret 1291; 1292; CHECK-GI-LABEL: test_signed_v6f16_v6i32: 1293; CHECK-GI: // %bb.0: 1294; CHECK-GI-NEXT: mov v1.h[0], v0.h[4] 1295; CHECK-GI-NEXT: mov v1.h[1], v0.h[5] 1296; CHECK-GI-NEXT: fcvtl v0.4s, v0.4h 1297; CHECK-GI-NEXT: fcvtl v1.4s, v1.4h 1298; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 1299; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s 1300; CHECK-GI-NEXT: mov s2, v0.s[1] 1301; CHECK-GI-NEXT: mov s3, v0.s[2] 1302; CHECK-GI-NEXT: mov s4, v0.s[3] 1303; CHECK-GI-NEXT: fmov w0, s0 1304; CHECK-GI-NEXT: mov s5, v1.s[1] 1305; CHECK-GI-NEXT: fmov w1, s2 1306; CHECK-GI-NEXT: fmov w2, s3 1307; CHECK-GI-NEXT: fmov w3, s4 1308; CHECK-GI-NEXT: fmov w4, s1 1309; CHECK-GI-NEXT: fmov w5, s5 1310; CHECK-GI-NEXT: ret 1311 %x = call <6 x i32> @llvm.fptosi.sat.v6f16.v6i32(<6 x half> %f) 1312 ret <6 x i32> %x 1313} 1314 1315define <7 x i32> @test_signed_v7f16_v7i32(<7 x half> %f) { 1316; CHECK-SD-LABEL: test_signed_v7f16_v7i32: 1317; CHECK-SD: // %bb.0: 1318; CHECK-SD-NEXT: fcvtl v1.4s, v0.4h 1319; CHECK-SD-NEXT: fcvtl2 v0.4s, v0.8h 1320; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s 1321; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 1322; CHECK-SD-NEXT: mov w1, v1.s[1] 1323; CHECK-SD-NEXT: mov w2, v1.s[2] 1324; CHECK-SD-NEXT: mov w3, v1.s[3] 1325; CHECK-SD-NEXT: mov w5, v0.s[1] 1326; CHECK-SD-NEXT: mov w6, v0.s[2] 1327; CHECK-SD-NEXT: fmov w0, s1 1328; CHECK-SD-NEXT: fmov w4, s0 1329; CHECK-SD-NEXT: ret 1330; 1331; CHECK-GI-LABEL: test_signed_v7f16_v7i32: 1332; CHECK-GI: // %bb.0: 1333; CHECK-GI-NEXT: mov v1.h[0], v0.h[4] 1334; CHECK-GI-NEXT: mov v1.h[1], v0.h[5] 1335; CHECK-GI-NEXT: mov v1.h[2], v0.h[6] 1336; CHECK-GI-NEXT: fcvtl v0.4s, v0.4h 1337; CHECK-GI-NEXT: fcvtl v1.4s, v1.4h 1338; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 1339; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s 1340; CHECK-GI-NEXT: mov s2, v0.s[1] 1341; CHECK-GI-NEXT: mov s3, v0.s[2] 1342; CHECK-GI-NEXT: mov s4, v0.s[3] 1343; CHECK-GI-NEXT: fmov w0, s0 1344; CHECK-GI-NEXT: mov s5, v1.s[1] 1345; CHECK-GI-NEXT: mov s6, v1.s[2] 1346; CHECK-GI-NEXT: fmov w1, s2 1347; CHECK-GI-NEXT: fmov w2, s3 1348; CHECK-GI-NEXT: fmov w3, s4 1349; CHECK-GI-NEXT: fmov w4, s1 1350; CHECK-GI-NEXT: fmov w5, s5 1351; CHECK-GI-NEXT: fmov w6, s6 1352; CHECK-GI-NEXT: ret 1353 %x = call <7 x i32> @llvm.fptosi.sat.v7f16.v7i32(<7 x half> %f) 1354 ret <7 x i32> %x 1355} 1356 1357define <8 x i32> @test_signed_v8f16_v8i32(<8 x half> %f) { 1358; CHECK-SD-LABEL: test_signed_v8f16_v8i32: 1359; CHECK-SD: // %bb.0: 1360; CHECK-SD-NEXT: fcvtl2 v1.4s, v0.8h 1361; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h 1362; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s 1363; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 1364; CHECK-SD-NEXT: ret 1365; 1366; CHECK-GI-LABEL: test_signed_v8f16_v8i32: 1367; CHECK-GI: // %bb.0: 1368; CHECK-GI-NEXT: fcvtl v1.4s, v0.4h 1369; CHECK-GI-NEXT: fcvtl2 v2.4s, v0.8h 1370; CHECK-GI-NEXT: fcvtzs v0.4s, v1.4s 1371; CHECK-GI-NEXT: fcvtzs v1.4s, v2.4s 1372; CHECK-GI-NEXT: ret 1373 %x = call <8 x i32> @llvm.fptosi.sat.v8f16.v8i32(<8 x half> %f) 1374 ret <8 x i32> %x 1375} 1376 1377; 1378; 2-Vector float to signed integer -- result size variation 1379; 1380 1381declare <2 x i1> @llvm.fptosi.sat.v2f32.v2i1 (<2 x float>) 1382declare <2 x i8> @llvm.fptosi.sat.v2f32.v2i8 (<2 x float>) 1383declare <2 x i13> @llvm.fptosi.sat.v2f32.v2i13 (<2 x float>) 1384declare <2 x i16> @llvm.fptosi.sat.v2f32.v2i16 (<2 x float>) 1385declare <2 x i19> @llvm.fptosi.sat.v2f32.v2i19 (<2 x float>) 1386declare <2 x i50> @llvm.fptosi.sat.v2f32.v2i50 (<2 x float>) 1387declare <2 x i64> @llvm.fptosi.sat.v2f32.v2i64 (<2 x float>) 1388declare <2 x i100> @llvm.fptosi.sat.v2f32.v2i100(<2 x float>) 1389declare <2 x i128> @llvm.fptosi.sat.v2f32.v2i128(<2 x float>) 1390 1391define <2 x i1> @test_signed_v2f32_v2i1(<2 x float> %f) { 1392; CHECK-SD-LABEL: test_signed_v2f32_v2i1: 1393; CHECK-SD: // %bb.0: 1394; CHECK-SD-NEXT: movi v1.2d, #0000000000000000 1395; CHECK-SD-NEXT: fcvtzs v0.2s, v0.2s 1396; CHECK-SD-NEXT: movi v2.2d, #0xffffffffffffffff 1397; CHECK-SD-NEXT: smin v0.2s, v0.2s, v1.2s 1398; CHECK-SD-NEXT: smax v0.2s, v0.2s, v2.2s 1399; CHECK-SD-NEXT: ret 1400; 1401; CHECK-GI-LABEL: test_signed_v2f32_v2i1: 1402; CHECK-GI: // %bb.0: 1403; CHECK-GI-NEXT: movi v1.2d, #0000000000000000 1404; CHECK-GI-NEXT: fcvtzs v0.2s, v0.2s 1405; CHECK-GI-NEXT: movi d2, #0xffffffffffffffff 1406; CHECK-GI-NEXT: smin v0.2s, v0.2s, v1.2s 1407; CHECK-GI-NEXT: smax v0.2s, v0.2s, v2.2s 1408; CHECK-GI-NEXT: ret 1409 %x = call <2 x i1> @llvm.fptosi.sat.v2f32.v2i1(<2 x float> %f) 1410 ret <2 x i1> %x 1411} 1412 1413define <2 x i8> @test_signed_v2f32_v2i8(<2 x float> %f) { 1414; CHECK-SD-LABEL: test_signed_v2f32_v2i8: 1415; CHECK-SD: // %bb.0: 1416; CHECK-SD-NEXT: movi v1.2s, #127 1417; CHECK-SD-NEXT: fcvtzs v0.2s, v0.2s 1418; CHECK-SD-NEXT: smin v0.2s, v0.2s, v1.2s 1419; CHECK-SD-NEXT: mvni v1.2s, #127 1420; CHECK-SD-NEXT: smax v0.2s, v0.2s, v1.2s 1421; CHECK-SD-NEXT: ret 1422; 1423; CHECK-GI-LABEL: test_signed_v2f32_v2i8: 1424; CHECK-GI: // %bb.0: 1425; CHECK-GI-NEXT: movi v1.2s, #127 1426; CHECK-GI-NEXT: fcvtzs v0.2s, v0.2s 1427; CHECK-GI-NEXT: mvni v2.2s, #127 1428; CHECK-GI-NEXT: smin v0.2s, v0.2s, v1.2s 1429; CHECK-GI-NEXT: smax v0.2s, v0.2s, v2.2s 1430; CHECK-GI-NEXT: ret 1431 %x = call <2 x i8> @llvm.fptosi.sat.v2f32.v2i8(<2 x float> %f) 1432 ret <2 x i8> %x 1433} 1434 1435define <2 x i13> @test_signed_v2f32_v2i13(<2 x float> %f) { 1436; CHECK-SD-LABEL: test_signed_v2f32_v2i13: 1437; CHECK-SD: // %bb.0: 1438; CHECK-SD-NEXT: movi v1.2s, #15, msl #8 1439; CHECK-SD-NEXT: fcvtzs v0.2s, v0.2s 1440; CHECK-SD-NEXT: smin v0.2s, v0.2s, v1.2s 1441; CHECK-SD-NEXT: mvni v1.2s, #15, msl #8 1442; CHECK-SD-NEXT: smax v0.2s, v0.2s, v1.2s 1443; CHECK-SD-NEXT: ret 1444; 1445; CHECK-GI-LABEL: test_signed_v2f32_v2i13: 1446; CHECK-GI: // %bb.0: 1447; CHECK-GI-NEXT: movi v1.2s, #15, msl #8 1448; CHECK-GI-NEXT: fcvtzs v0.2s, v0.2s 1449; CHECK-GI-NEXT: mvni v2.2s, #15, msl #8 1450; CHECK-GI-NEXT: smin v0.2s, v0.2s, v1.2s 1451; CHECK-GI-NEXT: smax v0.2s, v0.2s, v2.2s 1452; CHECK-GI-NEXT: ret 1453 %x = call <2 x i13> @llvm.fptosi.sat.v2f32.v2i13(<2 x float> %f) 1454 ret <2 x i13> %x 1455} 1456 1457define <2 x i16> @test_signed_v2f32_v2i16(<2 x float> %f) { 1458; CHECK-SD-LABEL: test_signed_v2f32_v2i16: 1459; CHECK-SD: // %bb.0: 1460; CHECK-SD-NEXT: movi v1.2s, #127, msl #8 1461; CHECK-SD-NEXT: fcvtzs v0.2s, v0.2s 1462; CHECK-SD-NEXT: smin v0.2s, v0.2s, v1.2s 1463; CHECK-SD-NEXT: mvni v1.2s, #127, msl #8 1464; CHECK-SD-NEXT: smax v0.2s, v0.2s, v1.2s 1465; CHECK-SD-NEXT: ret 1466; 1467; CHECK-GI-LABEL: test_signed_v2f32_v2i16: 1468; CHECK-GI: // %bb.0: 1469; CHECK-GI-NEXT: movi v1.2s, #127, msl #8 1470; CHECK-GI-NEXT: fcvtzs v0.2s, v0.2s 1471; CHECK-GI-NEXT: mvni v2.2s, #127, msl #8 1472; CHECK-GI-NEXT: smin v0.2s, v0.2s, v1.2s 1473; CHECK-GI-NEXT: smax v0.2s, v0.2s, v2.2s 1474; CHECK-GI-NEXT: ret 1475 %x = call <2 x i16> @llvm.fptosi.sat.v2f32.v2i16(<2 x float> %f) 1476 ret <2 x i16> %x 1477} 1478 1479define <2 x i19> @test_signed_v2f32_v2i19(<2 x float> %f) { 1480; CHECK-SD-LABEL: test_signed_v2f32_v2i19: 1481; CHECK-SD: // %bb.0: 1482; CHECK-SD-NEXT: movi v1.2s, #3, msl #16 1483; CHECK-SD-NEXT: fcvtzs v0.2s, v0.2s 1484; CHECK-SD-NEXT: smin v0.2s, v0.2s, v1.2s 1485; CHECK-SD-NEXT: mvni v1.2s, #3, msl #16 1486; CHECK-SD-NEXT: smax v0.2s, v0.2s, v1.2s 1487; CHECK-SD-NEXT: ret 1488; 1489; CHECK-GI-LABEL: test_signed_v2f32_v2i19: 1490; CHECK-GI: // %bb.0: 1491; CHECK-GI-NEXT: movi v1.2s, #3, msl #16 1492; CHECK-GI-NEXT: fcvtzs v0.2s, v0.2s 1493; CHECK-GI-NEXT: mvni v2.2s, #3, msl #16 1494; CHECK-GI-NEXT: smin v0.2s, v0.2s, v1.2s 1495; CHECK-GI-NEXT: smax v0.2s, v0.2s, v2.2s 1496; CHECK-GI-NEXT: ret 1497 %x = call <2 x i19> @llvm.fptosi.sat.v2f32.v2i19(<2 x float> %f) 1498 ret <2 x i19> %x 1499} 1500 1501define <2 x i32> @test_signed_v2f32_v2i32_duplicate(<2 x float> %f) { 1502; CHECK-LABEL: test_signed_v2f32_v2i32_duplicate: 1503; CHECK: // %bb.0: 1504; CHECK-NEXT: fcvtzs v0.2s, v0.2s 1505; CHECK-NEXT: ret 1506 %x = call <2 x i32> @llvm.fptosi.sat.v2f32.v2i32(<2 x float> %f) 1507 ret <2 x i32> %x 1508} 1509 1510define <2 x i50> @test_signed_v2f32_v2i50(<2 x float> %f) { 1511; CHECK-SD-LABEL: test_signed_v2f32_v2i50: 1512; CHECK-SD: // %bb.0: 1513; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 1514; CHECK-SD-NEXT: mov s1, v0.s[1] 1515; CHECK-SD-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 1516; CHECK-SD-NEXT: fcvtzs x10, s0 1517; CHECK-SD-NEXT: mov x11, #-562949953421312 // =0xfffe000000000000 1518; CHECK-SD-NEXT: fcvtzs x9, s1 1519; CHECK-SD-NEXT: cmp x9, x8 1520; CHECK-SD-NEXT: csel x9, x9, x8, lt 1521; CHECK-SD-NEXT: cmp x9, x11 1522; CHECK-SD-NEXT: csel x9, x9, x11, gt 1523; CHECK-SD-NEXT: cmp x10, x8 1524; CHECK-SD-NEXT: csel x8, x10, x8, lt 1525; CHECK-SD-NEXT: cmp x8, x11 1526; CHECK-SD-NEXT: csel x8, x8, x11, gt 1527; CHECK-SD-NEXT: fmov d0, x8 1528; CHECK-SD-NEXT: mov v0.d[1], x9 1529; CHECK-SD-NEXT: ret 1530; 1531; CHECK-GI-LABEL: test_signed_v2f32_v2i50: 1532; CHECK-GI: // %bb.0: 1533; CHECK-GI-NEXT: fcvtl v0.2d, v0.2s 1534; CHECK-GI-NEXT: adrp x8, .LCPI32_1 1535; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI32_1] 1536; CHECK-GI-NEXT: adrp x8, .LCPI32_0 1537; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 1538; CHECK-GI-NEXT: cmgt v2.2d, v1.2d, v0.2d 1539; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 1540; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI32_0] 1541; CHECK-GI-NEXT: cmgt v2.2d, v0.2d, v1.2d 1542; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 1543; CHECK-GI-NEXT: ret 1544 %x = call <2 x i50> @llvm.fptosi.sat.v2f32.v2i50(<2 x float> %f) 1545 ret <2 x i50> %x 1546} 1547 1548define <2 x i64> @test_signed_v2f32_v2i64(<2 x float> %f) { 1549; CHECK-LABEL: test_signed_v2f32_v2i64: 1550; CHECK: // %bb.0: 1551; CHECK-NEXT: fcvtl v0.2d, v0.2s 1552; CHECK-NEXT: fcvtzs v0.2d, v0.2d 1553; CHECK-NEXT: ret 1554 %x = call <2 x i64> @llvm.fptosi.sat.v2f32.v2i64(<2 x float> %f) 1555 ret <2 x i64> %x 1556} 1557 1558define <2 x i100> @test_signed_v2f32_v2i100(<2 x float> %f) { 1559; CHECK-SD-LABEL: test_signed_v2f32_v2i100: 1560; CHECK-SD: // %bb.0: 1561; CHECK-SD-NEXT: sub sp, sp, #80 1562; CHECK-SD-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 1563; CHECK-SD-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 1564; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 1565; CHECK-SD-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill 1566; CHECK-SD-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill 1567; CHECK-SD-NEXT: .cfi_def_cfa_offset 80 1568; CHECK-SD-NEXT: .cfi_offset w19, -8 1569; CHECK-SD-NEXT: .cfi_offset w20, -16 1570; CHECK-SD-NEXT: .cfi_offset w21, -24 1571; CHECK-SD-NEXT: .cfi_offset w22, -32 1572; CHECK-SD-NEXT: .cfi_offset w30, -40 1573; CHECK-SD-NEXT: .cfi_offset b8, -48 1574; CHECK-SD-NEXT: .cfi_offset b9, -56 1575; CHECK-SD-NEXT: .cfi_offset b10, -64 1576; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 1577; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 1578; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0 1579; CHECK-SD-NEXT: bl __fixsfti 1580; CHECK-SD-NEXT: movi v9.2s, #241, lsl #24 1581; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 1582; CHECK-SD-NEXT: mov w8, #1895825407 // =0x70ffffff 1583; CHECK-SD-NEXT: fmov s10, w8 1584; CHECK-SD-NEXT: mov x21, #-34359738368 // =0xfffffff800000000 1585; CHECK-SD-NEXT: mov x22, #34359738367 // =0x7ffffffff 1586; CHECK-SD-NEXT: mov s8, v0.s[1] 1587; CHECK-SD-NEXT: fcmp s0, s9 1588; CHECK-SD-NEXT: csel x8, xzr, x0, lt 1589; CHECK-SD-NEXT: csel x9, x21, x1, lt 1590; CHECK-SD-NEXT: fcmp s0, s10 1591; CHECK-SD-NEXT: csel x9, x22, x9, gt 1592; CHECK-SD-NEXT: csinv x8, x8, xzr, le 1593; CHECK-SD-NEXT: fcmp s0, s0 1594; CHECK-SD-NEXT: fmov s0, s8 1595; CHECK-SD-NEXT: csel x19, xzr, x8, vs 1596; CHECK-SD-NEXT: csel x20, xzr, x9, vs 1597; CHECK-SD-NEXT: bl __fixsfti 1598; CHECK-SD-NEXT: fcmp s8, s9 1599; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 1600; CHECK-SD-NEXT: csel x8, xzr, x0, lt 1601; CHECK-SD-NEXT: csel x9, x21, x1, lt 1602; CHECK-SD-NEXT: fcmp s8, s10 1603; CHECK-SD-NEXT: mov x0, x19 1604; CHECK-SD-NEXT: mov x1, x20 1605; CHECK-SD-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 1606; CHECK-SD-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload 1607; CHECK-SD-NEXT: csel x9, x22, x9, gt 1608; CHECK-SD-NEXT: csinv x8, x8, xzr, le 1609; CHECK-SD-NEXT: fcmp s8, s8 1610; CHECK-SD-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload 1611; CHECK-SD-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 1612; CHECK-SD-NEXT: csel x2, xzr, x8, vs 1613; CHECK-SD-NEXT: csel x3, xzr, x9, vs 1614; CHECK-SD-NEXT: add sp, sp, #80 1615; CHECK-SD-NEXT: ret 1616; 1617; CHECK-GI-LABEL: test_signed_v2f32_v2i100: 1618; CHECK-GI: // %bb.0: 1619; CHECK-GI-NEXT: sub sp, sp, #80 1620; CHECK-GI-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 1621; CHECK-GI-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 1622; CHECK-GI-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 1623; CHECK-GI-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill 1624; CHECK-GI-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill 1625; CHECK-GI-NEXT: .cfi_def_cfa_offset 80 1626; CHECK-GI-NEXT: .cfi_offset w19, -8 1627; CHECK-GI-NEXT: .cfi_offset w20, -16 1628; CHECK-GI-NEXT: .cfi_offset w21, -24 1629; CHECK-GI-NEXT: .cfi_offset w22, -32 1630; CHECK-GI-NEXT: .cfi_offset w30, -40 1631; CHECK-GI-NEXT: .cfi_offset b8, -48 1632; CHECK-GI-NEXT: .cfi_offset b9, -56 1633; CHECK-GI-NEXT: .cfi_offset b10, -64 1634; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 1635; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill 1636; CHECK-GI-NEXT: mov s8, v0.s[1] 1637; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0 1638; CHECK-GI-NEXT: bl __fixsfti 1639; CHECK-GI-NEXT: movi v9.2s, #241, lsl #24 1640; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 1641; CHECK-GI-NEXT: mov w8, #1895825407 // =0x70ffffff 1642; CHECK-GI-NEXT: fmov s10, w8 1643; CHECK-GI-NEXT: mov x21, #34359738368 // =0x800000000 1644; CHECK-GI-NEXT: mov x22, #34359738367 // =0x7ffffffff 1645; CHECK-GI-NEXT: fcmp s0, s9 1646; CHECK-GI-NEXT: csel x8, xzr, x0, lt 1647; CHECK-GI-NEXT: csel x9, x21, x1, lt 1648; CHECK-GI-NEXT: fcmp s0, s10 1649; CHECK-GI-NEXT: csinv x8, x8, xzr, le 1650; CHECK-GI-NEXT: csel x9, x22, x9, gt 1651; CHECK-GI-NEXT: fcmp s0, s0 1652; CHECK-GI-NEXT: fmov s0, s8 1653; CHECK-GI-NEXT: csel x19, xzr, x8, vs 1654; CHECK-GI-NEXT: csel x20, xzr, x9, vs 1655; CHECK-GI-NEXT: bl __fixsfti 1656; CHECK-GI-NEXT: fcmp s8, s9 1657; CHECK-GI-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 1658; CHECK-GI-NEXT: csel x8, xzr, x0, lt 1659; CHECK-GI-NEXT: csel x9, x21, x1, lt 1660; CHECK-GI-NEXT: fcmp s8, s10 1661; CHECK-GI-NEXT: mov x0, x19 1662; CHECK-GI-NEXT: mov x1, x20 1663; CHECK-GI-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 1664; CHECK-GI-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload 1665; CHECK-GI-NEXT: csinv x8, x8, xzr, le 1666; CHECK-GI-NEXT: csel x9, x22, x9, gt 1667; CHECK-GI-NEXT: fcmp s8, s8 1668; CHECK-GI-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload 1669; CHECK-GI-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 1670; CHECK-GI-NEXT: csel x2, xzr, x8, vs 1671; CHECK-GI-NEXT: csel x3, xzr, x9, vs 1672; CHECK-GI-NEXT: add sp, sp, #80 1673; CHECK-GI-NEXT: ret 1674 %x = call <2 x i100> @llvm.fptosi.sat.v2f32.v2i100(<2 x float> %f) 1675 ret <2 x i100> %x 1676} 1677 1678define <2 x i128> @test_signed_v2f32_v2i128(<2 x float> %f) { 1679; CHECK-SD-LABEL: test_signed_v2f32_v2i128: 1680; CHECK-SD: // %bb.0: 1681; CHECK-SD-NEXT: sub sp, sp, #80 1682; CHECK-SD-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 1683; CHECK-SD-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 1684; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 1685; CHECK-SD-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill 1686; CHECK-SD-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill 1687; CHECK-SD-NEXT: .cfi_def_cfa_offset 80 1688; CHECK-SD-NEXT: .cfi_offset w19, -8 1689; CHECK-SD-NEXT: .cfi_offset w20, -16 1690; CHECK-SD-NEXT: .cfi_offset w21, -24 1691; CHECK-SD-NEXT: .cfi_offset w22, -32 1692; CHECK-SD-NEXT: .cfi_offset w30, -40 1693; CHECK-SD-NEXT: .cfi_offset b8, -48 1694; CHECK-SD-NEXT: .cfi_offset b9, -56 1695; CHECK-SD-NEXT: .cfi_offset b10, -64 1696; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 1697; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 1698; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0 1699; CHECK-SD-NEXT: bl __fixsfti 1700; CHECK-SD-NEXT: movi v9.2s, #255, lsl #24 1701; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 1702; CHECK-SD-NEXT: mov w8, #2130706431 // =0x7effffff 1703; CHECK-SD-NEXT: fmov s10, w8 1704; CHECK-SD-NEXT: mov x21, #-9223372036854775808 // =0x8000000000000000 1705; CHECK-SD-NEXT: mov x22, #9223372036854775807 // =0x7fffffffffffffff 1706; CHECK-SD-NEXT: mov s8, v0.s[1] 1707; CHECK-SD-NEXT: fcmp s0, s9 1708; CHECK-SD-NEXT: csel x8, xzr, x0, lt 1709; CHECK-SD-NEXT: csel x9, x21, x1, lt 1710; CHECK-SD-NEXT: fcmp s0, s10 1711; CHECK-SD-NEXT: csel x9, x22, x9, gt 1712; CHECK-SD-NEXT: csinv x8, x8, xzr, le 1713; CHECK-SD-NEXT: fcmp s0, s0 1714; CHECK-SD-NEXT: fmov s0, s8 1715; CHECK-SD-NEXT: csel x19, xzr, x8, vs 1716; CHECK-SD-NEXT: csel x20, xzr, x9, vs 1717; CHECK-SD-NEXT: bl __fixsfti 1718; CHECK-SD-NEXT: fcmp s8, s9 1719; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 1720; CHECK-SD-NEXT: csel x8, xzr, x0, lt 1721; CHECK-SD-NEXT: csel x9, x21, x1, lt 1722; CHECK-SD-NEXT: fcmp s8, s10 1723; CHECK-SD-NEXT: mov x0, x19 1724; CHECK-SD-NEXT: mov x1, x20 1725; CHECK-SD-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 1726; CHECK-SD-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload 1727; CHECK-SD-NEXT: csel x9, x22, x9, gt 1728; CHECK-SD-NEXT: csinv x8, x8, xzr, le 1729; CHECK-SD-NEXT: fcmp s8, s8 1730; CHECK-SD-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload 1731; CHECK-SD-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 1732; CHECK-SD-NEXT: csel x2, xzr, x8, vs 1733; CHECK-SD-NEXT: csel x3, xzr, x9, vs 1734; CHECK-SD-NEXT: add sp, sp, #80 1735; CHECK-SD-NEXT: ret 1736; 1737; CHECK-GI-LABEL: test_signed_v2f32_v2i128: 1738; CHECK-GI: // %bb.0: 1739; CHECK-GI-NEXT: sub sp, sp, #80 1740; CHECK-GI-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 1741; CHECK-GI-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 1742; CHECK-GI-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 1743; CHECK-GI-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill 1744; CHECK-GI-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill 1745; CHECK-GI-NEXT: .cfi_def_cfa_offset 80 1746; CHECK-GI-NEXT: .cfi_offset w19, -8 1747; CHECK-GI-NEXT: .cfi_offset w20, -16 1748; CHECK-GI-NEXT: .cfi_offset w21, -24 1749; CHECK-GI-NEXT: .cfi_offset w22, -32 1750; CHECK-GI-NEXT: .cfi_offset w30, -40 1751; CHECK-GI-NEXT: .cfi_offset b8, -48 1752; CHECK-GI-NEXT: .cfi_offset b9, -56 1753; CHECK-GI-NEXT: .cfi_offset b10, -64 1754; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 1755; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill 1756; CHECK-GI-NEXT: mov s8, v0.s[1] 1757; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0 1758; CHECK-GI-NEXT: bl __fixsfti 1759; CHECK-GI-NEXT: movi v9.2s, #255, lsl #24 1760; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 1761; CHECK-GI-NEXT: mov w8, #2130706431 // =0x7effffff 1762; CHECK-GI-NEXT: fmov s10, w8 1763; CHECK-GI-NEXT: mov x21, #-9223372036854775808 // =0x8000000000000000 1764; CHECK-GI-NEXT: mov x22, #9223372036854775807 // =0x7fffffffffffffff 1765; CHECK-GI-NEXT: fcmp s0, s9 1766; CHECK-GI-NEXT: csel x8, xzr, x0, lt 1767; CHECK-GI-NEXT: csel x9, x21, x1, lt 1768; CHECK-GI-NEXT: fcmp s0, s10 1769; CHECK-GI-NEXT: csinv x8, x8, xzr, le 1770; CHECK-GI-NEXT: csel x9, x22, x9, gt 1771; CHECK-GI-NEXT: fcmp s0, s0 1772; CHECK-GI-NEXT: fmov s0, s8 1773; CHECK-GI-NEXT: csel x19, xzr, x8, vs 1774; CHECK-GI-NEXT: csel x20, xzr, x9, vs 1775; CHECK-GI-NEXT: bl __fixsfti 1776; CHECK-GI-NEXT: fcmp s8, s9 1777; CHECK-GI-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 1778; CHECK-GI-NEXT: csel x8, xzr, x0, lt 1779; CHECK-GI-NEXT: csel x9, x21, x1, lt 1780; CHECK-GI-NEXT: fcmp s8, s10 1781; CHECK-GI-NEXT: mov x0, x19 1782; CHECK-GI-NEXT: mov x1, x20 1783; CHECK-GI-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 1784; CHECK-GI-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload 1785; CHECK-GI-NEXT: csinv x8, x8, xzr, le 1786; CHECK-GI-NEXT: csel x9, x22, x9, gt 1787; CHECK-GI-NEXT: fcmp s8, s8 1788; CHECK-GI-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload 1789; CHECK-GI-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 1790; CHECK-GI-NEXT: csel x2, xzr, x8, vs 1791; CHECK-GI-NEXT: csel x3, xzr, x9, vs 1792; CHECK-GI-NEXT: add sp, sp, #80 1793; CHECK-GI-NEXT: ret 1794 %x = call <2 x i128> @llvm.fptosi.sat.v2f32.v2i128(<2 x float> %f) 1795 ret <2 x i128> %x 1796} 1797 1798; 1799; 4-Vector float to signed integer -- result size variation 1800; 1801 1802declare <4 x i1> @llvm.fptosi.sat.v4f32.v4i1 (<4 x float>) 1803declare <4 x i8> @llvm.fptosi.sat.v4f32.v4i8 (<4 x float>) 1804declare <4 x i13> @llvm.fptosi.sat.v4f32.v4i13 (<4 x float>) 1805declare <4 x i16> @llvm.fptosi.sat.v4f32.v4i16 (<4 x float>) 1806declare <4 x i19> @llvm.fptosi.sat.v4f32.v4i19 (<4 x float>) 1807declare <4 x i50> @llvm.fptosi.sat.v4f32.v4i50 (<4 x float>) 1808declare <4 x i64> @llvm.fptosi.sat.v4f32.v4i64 (<4 x float>) 1809declare <4 x i100> @llvm.fptosi.sat.v4f32.v4i100(<4 x float>) 1810declare <4 x i128> @llvm.fptosi.sat.v4f32.v4i128(<4 x float>) 1811 1812define <4 x i1> @test_signed_v4f32_v4i1(<4 x float> %f) { 1813; CHECK-SD-LABEL: test_signed_v4f32_v4i1: 1814; CHECK-SD: // %bb.0: 1815; CHECK-SD-NEXT: movi v1.2d, #0000000000000000 1816; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 1817; CHECK-SD-NEXT: smin v0.4s, v0.4s, v1.4s 1818; CHECK-SD-NEXT: movi v1.2d, #0xffffffffffffffff 1819; CHECK-SD-NEXT: smax v0.4s, v0.4s, v1.4s 1820; CHECK-SD-NEXT: xtn v0.4h, v0.4s 1821; CHECK-SD-NEXT: ret 1822; 1823; CHECK-GI-LABEL: test_signed_v4f32_v4i1: 1824; CHECK-GI: // %bb.0: 1825; CHECK-GI-NEXT: movi v1.2d, #0000000000000000 1826; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 1827; CHECK-GI-NEXT: movi v2.2d, #0xffffffffffffffff 1828; CHECK-GI-NEXT: smin v0.4s, v0.4s, v1.4s 1829; CHECK-GI-NEXT: smax v0.4s, v0.4s, v2.4s 1830; CHECK-GI-NEXT: xtn v0.4h, v0.4s 1831; CHECK-GI-NEXT: ret 1832 %x = call <4 x i1> @llvm.fptosi.sat.v4f32.v4i1(<4 x float> %f) 1833 ret <4 x i1> %x 1834} 1835 1836define <4 x i8> @test_signed_v4f32_v4i8(<4 x float> %f) { 1837; CHECK-LABEL: test_signed_v4f32_v4i8: 1838; CHECK: // %bb.0: 1839; CHECK-NEXT: movi v1.4s, #127 1840; CHECK-NEXT: fcvtzs v0.4s, v0.4s 1841; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s 1842; CHECK-NEXT: mvni v1.4s, #127 1843; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s 1844; CHECK-NEXT: xtn v0.4h, v0.4s 1845; CHECK-NEXT: ret 1846 %x = call <4 x i8> @llvm.fptosi.sat.v4f32.v4i8(<4 x float> %f) 1847 ret <4 x i8> %x 1848} 1849 1850define <4 x i13> @test_signed_v4f32_v4i13(<4 x float> %f) { 1851; CHECK-LABEL: test_signed_v4f32_v4i13: 1852; CHECK: // %bb.0: 1853; CHECK-NEXT: movi v1.4s, #15, msl #8 1854; CHECK-NEXT: fcvtzs v0.4s, v0.4s 1855; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s 1856; CHECK-NEXT: mvni v1.4s, #15, msl #8 1857; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s 1858; CHECK-NEXT: xtn v0.4h, v0.4s 1859; CHECK-NEXT: ret 1860 %x = call <4 x i13> @llvm.fptosi.sat.v4f32.v4i13(<4 x float> %f) 1861 ret <4 x i13> %x 1862} 1863 1864define <4 x i16> @test_signed_v4f32_v4i16(<4 x float> %f) { 1865; CHECK-SD-LABEL: test_signed_v4f32_v4i16: 1866; CHECK-SD: // %bb.0: 1867; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 1868; CHECK-SD-NEXT: sqxtn v0.4h, v0.4s 1869; CHECK-SD-NEXT: ret 1870; 1871; CHECK-GI-LABEL: test_signed_v4f32_v4i16: 1872; CHECK-GI: // %bb.0: 1873; CHECK-GI-NEXT: movi v1.4s, #127, msl #8 1874; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 1875; CHECK-GI-NEXT: smin v0.4s, v0.4s, v1.4s 1876; CHECK-GI-NEXT: mvni v1.4s, #127, msl #8 1877; CHECK-GI-NEXT: smax v0.4s, v0.4s, v1.4s 1878; CHECK-GI-NEXT: xtn v0.4h, v0.4s 1879; CHECK-GI-NEXT: ret 1880 %x = call <4 x i16> @llvm.fptosi.sat.v4f32.v4i16(<4 x float> %f) 1881 ret <4 x i16> %x 1882} 1883 1884define <4 x i19> @test_signed_v4f32_v4i19(<4 x float> %f) { 1885; CHECK-LABEL: test_signed_v4f32_v4i19: 1886; CHECK: // %bb.0: 1887; CHECK-NEXT: movi v1.4s, #3, msl #16 1888; CHECK-NEXT: fcvtzs v0.4s, v0.4s 1889; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s 1890; CHECK-NEXT: mvni v1.4s, #3, msl #16 1891; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s 1892; CHECK-NEXT: ret 1893 %x = call <4 x i19> @llvm.fptosi.sat.v4f32.v4i19(<4 x float> %f) 1894 ret <4 x i19> %x 1895} 1896 1897define <4 x i32> @test_signed_v4f32_v4i32_duplicate(<4 x float> %f) { 1898; CHECK-LABEL: test_signed_v4f32_v4i32_duplicate: 1899; CHECK: // %bb.0: 1900; CHECK-NEXT: fcvtzs v0.4s, v0.4s 1901; CHECK-NEXT: ret 1902 %x = call <4 x i32> @llvm.fptosi.sat.v4f32.v4i32(<4 x float> %f) 1903 ret <4 x i32> %x 1904} 1905 1906define <4 x i50> @test_signed_v4f32_v4i50(<4 x float> %f) { 1907; CHECK-LABEL: test_signed_v4f32_v4i50: 1908; CHECK: // %bb.0: 1909; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8 1910; CHECK-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 1911; CHECK-NEXT: mov x11, #-562949953421312 // =0xfffe000000000000 1912; CHECK-NEXT: fcvtzs x12, s0 1913; CHECK-NEXT: mov s2, v1.s[1] 1914; CHECK-NEXT: fcvtzs x9, s1 1915; CHECK-NEXT: mov s1, v0.s[1] 1916; CHECK-NEXT: fcvtzs x10, s2 1917; CHECK-NEXT: cmp x9, x8 1918; CHECK-NEXT: csel x9, x9, x8, lt 1919; CHECK-NEXT: cmp x9, x11 1920; CHECK-NEXT: csel x2, x9, x11, gt 1921; CHECK-NEXT: cmp x10, x8 1922; CHECK-NEXT: csel x9, x10, x8, lt 1923; CHECK-NEXT: fcvtzs x10, s1 1924; CHECK-NEXT: cmp x9, x11 1925; CHECK-NEXT: csel x3, x9, x11, gt 1926; CHECK-NEXT: cmp x12, x8 1927; CHECK-NEXT: csel x9, x12, x8, lt 1928; CHECK-NEXT: cmp x9, x11 1929; CHECK-NEXT: csel x0, x9, x11, gt 1930; CHECK-NEXT: cmp x10, x8 1931; CHECK-NEXT: csel x8, x10, x8, lt 1932; CHECK-NEXT: cmp x8, x11 1933; CHECK-NEXT: csel x1, x8, x11, gt 1934; CHECK-NEXT: ret 1935 %x = call <4 x i50> @llvm.fptosi.sat.v4f32.v4i50(<4 x float> %f) 1936 ret <4 x i50> %x 1937} 1938 1939define <4 x i64> @test_signed_v4f32_v4i64(<4 x float> %f) { 1940; CHECK-SD-LABEL: test_signed_v4f32_v4i64: 1941; CHECK-SD: // %bb.0: 1942; CHECK-SD-NEXT: fcvtl2 v1.2d, v0.4s 1943; CHECK-SD-NEXT: fcvtl v0.2d, v0.2s 1944; CHECK-SD-NEXT: fcvtzs v1.2d, v1.2d 1945; CHECK-SD-NEXT: fcvtzs v0.2d, v0.2d 1946; CHECK-SD-NEXT: ret 1947; 1948; CHECK-GI-LABEL: test_signed_v4f32_v4i64: 1949; CHECK-GI: // %bb.0: 1950; CHECK-GI-NEXT: fcvtl v1.2d, v0.2s 1951; CHECK-GI-NEXT: fcvtl2 v2.2d, v0.4s 1952; CHECK-GI-NEXT: fcvtzs v0.2d, v1.2d 1953; CHECK-GI-NEXT: fcvtzs v1.2d, v2.2d 1954; CHECK-GI-NEXT: ret 1955 %x = call <4 x i64> @llvm.fptosi.sat.v4f32.v4i64(<4 x float> %f) 1956 ret <4 x i64> %x 1957} 1958 1959define <4 x i100> @test_signed_v4f32_v4i100(<4 x float> %f) { 1960; CHECK-SD-LABEL: test_signed_v4f32_v4i100: 1961; CHECK-SD: // %bb.0: 1962; CHECK-SD-NEXT: sub sp, sp, #112 1963; CHECK-SD-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 1964; CHECK-SD-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 1965; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 1966; CHECK-SD-NEXT: stp x26, x25, [sp, #48] // 16-byte Folded Spill 1967; CHECK-SD-NEXT: stp x24, x23, [sp, #64] // 16-byte Folded Spill 1968; CHECK-SD-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill 1969; CHECK-SD-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill 1970; CHECK-SD-NEXT: .cfi_def_cfa_offset 112 1971; CHECK-SD-NEXT: .cfi_offset w19, -8 1972; CHECK-SD-NEXT: .cfi_offset w20, -16 1973; CHECK-SD-NEXT: .cfi_offset w21, -24 1974; CHECK-SD-NEXT: .cfi_offset w22, -32 1975; CHECK-SD-NEXT: .cfi_offset w23, -40 1976; CHECK-SD-NEXT: .cfi_offset w24, -48 1977; CHECK-SD-NEXT: .cfi_offset w25, -56 1978; CHECK-SD-NEXT: .cfi_offset w26, -64 1979; CHECK-SD-NEXT: .cfi_offset w30, -72 1980; CHECK-SD-NEXT: .cfi_offset b8, -80 1981; CHECK-SD-NEXT: .cfi_offset b9, -88 1982; CHECK-SD-NEXT: .cfi_offset b10, -96 1983; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 1984; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0 1985; CHECK-SD-NEXT: bl __fixsfti 1986; CHECK-SD-NEXT: movi v9.2s, #241, lsl #24 1987; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 1988; CHECK-SD-NEXT: mov w8, #1895825407 // =0x70ffffff 1989; CHECK-SD-NEXT: fmov s10, w8 1990; CHECK-SD-NEXT: mov x25, #-34359738368 // =0xfffffff800000000 1991; CHECK-SD-NEXT: mov x26, #34359738367 // =0x7ffffffff 1992; CHECK-SD-NEXT: mov s8, v0.s[1] 1993; CHECK-SD-NEXT: fcmp s0, s9 1994; CHECK-SD-NEXT: csel x8, xzr, x0, lt 1995; CHECK-SD-NEXT: csel x9, x25, x1, lt 1996; CHECK-SD-NEXT: fcmp s0, s10 1997; CHECK-SD-NEXT: csel x9, x26, x9, gt 1998; CHECK-SD-NEXT: csinv x8, x8, xzr, le 1999; CHECK-SD-NEXT: fcmp s0, s0 2000; CHECK-SD-NEXT: fmov s0, s8 2001; CHECK-SD-NEXT: csel x19, xzr, x8, vs 2002; CHECK-SD-NEXT: csel x20, xzr, x9, vs 2003; CHECK-SD-NEXT: bl __fixsfti 2004; CHECK-SD-NEXT: fcmp s8, s9 2005; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2006; CHECK-SD-NEXT: ext v0.16b, v0.16b, v0.16b, #8 2007; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2008; CHECK-SD-NEXT: csel x9, x25, x1, lt 2009; CHECK-SD-NEXT: fcmp s8, s10 2010; CHECK-SD-NEXT: csel x9, x26, x9, gt 2011; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2012; CHECK-SD-NEXT: fcmp s8, s8 2013; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 2014; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0 2015; CHECK-SD-NEXT: csel x21, xzr, x8, vs 2016; CHECK-SD-NEXT: csel x22, xzr, x9, vs 2017; CHECK-SD-NEXT: bl __fixsfti 2018; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2019; CHECK-SD-NEXT: fcmp s0, s9 2020; CHECK-SD-NEXT: mov s8, v0.s[1] 2021; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2022; CHECK-SD-NEXT: csel x9, x25, x1, lt 2023; CHECK-SD-NEXT: fcmp s0, s10 2024; CHECK-SD-NEXT: csel x9, x26, x9, gt 2025; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2026; CHECK-SD-NEXT: fcmp s0, s0 2027; CHECK-SD-NEXT: fmov s0, s8 2028; CHECK-SD-NEXT: csel x23, xzr, x8, vs 2029; CHECK-SD-NEXT: csel x24, xzr, x9, vs 2030; CHECK-SD-NEXT: bl __fixsfti 2031; CHECK-SD-NEXT: fcmp s8, s9 2032; CHECK-SD-NEXT: mov x2, x21 2033; CHECK-SD-NEXT: mov x3, x22 2034; CHECK-SD-NEXT: mov x4, x23 2035; CHECK-SD-NEXT: mov x5, x24 2036; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 2037; CHECK-SD-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload 2038; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2039; CHECK-SD-NEXT: csel x9, x25, x1, lt 2040; CHECK-SD-NEXT: fcmp s8, s10 2041; CHECK-SD-NEXT: mov x0, x19 2042; CHECK-SD-NEXT: mov x1, x20 2043; CHECK-SD-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 2044; CHECK-SD-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload 2045; CHECK-SD-NEXT: csel x9, x26, x9, gt 2046; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2047; CHECK-SD-NEXT: fcmp s8, s8 2048; CHECK-SD-NEXT: ldp x24, x23, [sp, #64] // 16-byte Folded Reload 2049; CHECK-SD-NEXT: ldp x26, x25, [sp, #48] // 16-byte Folded Reload 2050; CHECK-SD-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 2051; CHECK-SD-NEXT: csel x6, xzr, x8, vs 2052; CHECK-SD-NEXT: csel x7, xzr, x9, vs 2053; CHECK-SD-NEXT: add sp, sp, #112 2054; CHECK-SD-NEXT: ret 2055; 2056; CHECK-GI-LABEL: test_signed_v4f32_v4i100: 2057; CHECK-GI: // %bb.0: 2058; CHECK-GI-NEXT: sub sp, sp, #128 2059; CHECK-GI-NEXT: str d12, [sp, #16] // 8-byte Folded Spill 2060; CHECK-GI-NEXT: stp d11, d10, [sp, #24] // 16-byte Folded Spill 2061; CHECK-GI-NEXT: stp d9, d8, [sp, #40] // 16-byte Folded Spill 2062; CHECK-GI-NEXT: str x30, [sp, #56] // 8-byte Folded Spill 2063; CHECK-GI-NEXT: stp x26, x25, [sp, #64] // 16-byte Folded Spill 2064; CHECK-GI-NEXT: stp x24, x23, [sp, #80] // 16-byte Folded Spill 2065; CHECK-GI-NEXT: stp x22, x21, [sp, #96] // 16-byte Folded Spill 2066; CHECK-GI-NEXT: stp x20, x19, [sp, #112] // 16-byte Folded Spill 2067; CHECK-GI-NEXT: .cfi_def_cfa_offset 128 2068; CHECK-GI-NEXT: .cfi_offset w19, -8 2069; CHECK-GI-NEXT: .cfi_offset w20, -16 2070; CHECK-GI-NEXT: .cfi_offset w21, -24 2071; CHECK-GI-NEXT: .cfi_offset w22, -32 2072; CHECK-GI-NEXT: .cfi_offset w23, -40 2073; CHECK-GI-NEXT: .cfi_offset w24, -48 2074; CHECK-GI-NEXT: .cfi_offset w25, -56 2075; CHECK-GI-NEXT: .cfi_offset w26, -64 2076; CHECK-GI-NEXT: .cfi_offset w30, -72 2077; CHECK-GI-NEXT: .cfi_offset b8, -80 2078; CHECK-GI-NEXT: .cfi_offset b9, -88 2079; CHECK-GI-NEXT: .cfi_offset b10, -96 2080; CHECK-GI-NEXT: .cfi_offset b11, -104 2081; CHECK-GI-NEXT: .cfi_offset b12, -112 2082; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill 2083; CHECK-GI-NEXT: mov s9, v0.s[1] 2084; CHECK-GI-NEXT: mov s10, v0.s[2] 2085; CHECK-GI-NEXT: mov s8, v0.s[3] 2086; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0 2087; CHECK-GI-NEXT: bl __fixsfti 2088; CHECK-GI-NEXT: movi v11.2s, #241, lsl #24 2089; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2090; CHECK-GI-NEXT: mov w8, #1895825407 // =0x70ffffff 2091; CHECK-GI-NEXT: fmov s12, w8 2092; CHECK-GI-NEXT: mov x25, #34359738368 // =0x800000000 2093; CHECK-GI-NEXT: mov x26, #34359738367 // =0x7ffffffff 2094; CHECK-GI-NEXT: fcmp s0, s11 2095; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2096; CHECK-GI-NEXT: csel x9, x25, x1, lt 2097; CHECK-GI-NEXT: fcmp s0, s12 2098; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2099; CHECK-GI-NEXT: csel x9, x26, x9, gt 2100; CHECK-GI-NEXT: fcmp s0, s0 2101; CHECK-GI-NEXT: fmov s0, s9 2102; CHECK-GI-NEXT: csel x19, xzr, x8, vs 2103; CHECK-GI-NEXT: csel x20, xzr, x9, vs 2104; CHECK-GI-NEXT: bl __fixsfti 2105; CHECK-GI-NEXT: fcmp s9, s11 2106; CHECK-GI-NEXT: fmov s0, s10 2107; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2108; CHECK-GI-NEXT: csel x9, x25, x1, lt 2109; CHECK-GI-NEXT: fcmp s9, s12 2110; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2111; CHECK-GI-NEXT: csel x9, x26, x9, gt 2112; CHECK-GI-NEXT: fcmp s9, s9 2113; CHECK-GI-NEXT: csel x21, xzr, x8, vs 2114; CHECK-GI-NEXT: csel x22, xzr, x9, vs 2115; CHECK-GI-NEXT: bl __fixsfti 2116; CHECK-GI-NEXT: fcmp s10, s11 2117; CHECK-GI-NEXT: fmov s0, s8 2118; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2119; CHECK-GI-NEXT: csel x9, x25, x1, lt 2120; CHECK-GI-NEXT: fcmp s10, s12 2121; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2122; CHECK-GI-NEXT: csel x9, x26, x9, gt 2123; CHECK-GI-NEXT: fcmp s10, s10 2124; CHECK-GI-NEXT: csel x23, xzr, x8, vs 2125; CHECK-GI-NEXT: csel x24, xzr, x9, vs 2126; CHECK-GI-NEXT: bl __fixsfti 2127; CHECK-GI-NEXT: fcmp s8, s11 2128; CHECK-GI-NEXT: mov x2, x21 2129; CHECK-GI-NEXT: mov x3, x22 2130; CHECK-GI-NEXT: mov x4, x23 2131; CHECK-GI-NEXT: mov x5, x24 2132; CHECK-GI-NEXT: ldr x30, [sp, #56] // 8-byte Folded Reload 2133; CHECK-GI-NEXT: ldp x22, x21, [sp, #96] // 16-byte Folded Reload 2134; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2135; CHECK-GI-NEXT: csel x9, x25, x1, lt 2136; CHECK-GI-NEXT: fcmp s8, s12 2137; CHECK-GI-NEXT: mov x0, x19 2138; CHECK-GI-NEXT: mov x1, x20 2139; CHECK-GI-NEXT: ldr d12, [sp, #16] // 8-byte Folded Reload 2140; CHECK-GI-NEXT: ldp x20, x19, [sp, #112] // 16-byte Folded Reload 2141; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2142; CHECK-GI-NEXT: csel x9, x26, x9, gt 2143; CHECK-GI-NEXT: fcmp s8, s8 2144; CHECK-GI-NEXT: ldp x24, x23, [sp, #80] // 16-byte Folded Reload 2145; CHECK-GI-NEXT: ldp x26, x25, [sp, #64] // 16-byte Folded Reload 2146; CHECK-GI-NEXT: ldp d9, d8, [sp, #40] // 16-byte Folded Reload 2147; CHECK-GI-NEXT: csel x6, xzr, x8, vs 2148; CHECK-GI-NEXT: ldp d11, d10, [sp, #24] // 16-byte Folded Reload 2149; CHECK-GI-NEXT: csel x7, xzr, x9, vs 2150; CHECK-GI-NEXT: add sp, sp, #128 2151; CHECK-GI-NEXT: ret 2152 %x = call <4 x i100> @llvm.fptosi.sat.v4f32.v4i100(<4 x float> %f) 2153 ret <4 x i100> %x 2154} 2155 2156define <4 x i128> @test_signed_v4f32_v4i128(<4 x float> %f) { 2157; CHECK-SD-LABEL: test_signed_v4f32_v4i128: 2158; CHECK-SD: // %bb.0: 2159; CHECK-SD-NEXT: sub sp, sp, #112 2160; CHECK-SD-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 2161; CHECK-SD-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 2162; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 2163; CHECK-SD-NEXT: stp x26, x25, [sp, #48] // 16-byte Folded Spill 2164; CHECK-SD-NEXT: stp x24, x23, [sp, #64] // 16-byte Folded Spill 2165; CHECK-SD-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill 2166; CHECK-SD-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill 2167; CHECK-SD-NEXT: .cfi_def_cfa_offset 112 2168; CHECK-SD-NEXT: .cfi_offset w19, -8 2169; CHECK-SD-NEXT: .cfi_offset w20, -16 2170; CHECK-SD-NEXT: .cfi_offset w21, -24 2171; CHECK-SD-NEXT: .cfi_offset w22, -32 2172; CHECK-SD-NEXT: .cfi_offset w23, -40 2173; CHECK-SD-NEXT: .cfi_offset w24, -48 2174; CHECK-SD-NEXT: .cfi_offset w25, -56 2175; CHECK-SD-NEXT: .cfi_offset w26, -64 2176; CHECK-SD-NEXT: .cfi_offset w30, -72 2177; CHECK-SD-NEXT: .cfi_offset b8, -80 2178; CHECK-SD-NEXT: .cfi_offset b9, -88 2179; CHECK-SD-NEXT: .cfi_offset b10, -96 2180; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 2181; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0 2182; CHECK-SD-NEXT: bl __fixsfti 2183; CHECK-SD-NEXT: movi v9.2s, #255, lsl #24 2184; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2185; CHECK-SD-NEXT: mov w8, #2130706431 // =0x7effffff 2186; CHECK-SD-NEXT: fmov s10, w8 2187; CHECK-SD-NEXT: mov x25, #-9223372036854775808 // =0x8000000000000000 2188; CHECK-SD-NEXT: mov x26, #9223372036854775807 // =0x7fffffffffffffff 2189; CHECK-SD-NEXT: mov s8, v0.s[1] 2190; CHECK-SD-NEXT: fcmp s0, s9 2191; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2192; CHECK-SD-NEXT: csel x9, x25, x1, lt 2193; CHECK-SD-NEXT: fcmp s0, s10 2194; CHECK-SD-NEXT: csel x9, x26, x9, gt 2195; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2196; CHECK-SD-NEXT: fcmp s0, s0 2197; CHECK-SD-NEXT: fmov s0, s8 2198; CHECK-SD-NEXT: csel x19, xzr, x8, vs 2199; CHECK-SD-NEXT: csel x20, xzr, x9, vs 2200; CHECK-SD-NEXT: bl __fixsfti 2201; CHECK-SD-NEXT: fcmp s8, s9 2202; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2203; CHECK-SD-NEXT: ext v0.16b, v0.16b, v0.16b, #8 2204; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2205; CHECK-SD-NEXT: csel x9, x25, x1, lt 2206; CHECK-SD-NEXT: fcmp s8, s10 2207; CHECK-SD-NEXT: csel x9, x26, x9, gt 2208; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2209; CHECK-SD-NEXT: fcmp s8, s8 2210; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 2211; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0 2212; CHECK-SD-NEXT: csel x21, xzr, x8, vs 2213; CHECK-SD-NEXT: csel x22, xzr, x9, vs 2214; CHECK-SD-NEXT: bl __fixsfti 2215; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2216; CHECK-SD-NEXT: fcmp s0, s9 2217; CHECK-SD-NEXT: mov s8, v0.s[1] 2218; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2219; CHECK-SD-NEXT: csel x9, x25, x1, lt 2220; CHECK-SD-NEXT: fcmp s0, s10 2221; CHECK-SD-NEXT: csel x9, x26, x9, gt 2222; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2223; CHECK-SD-NEXT: fcmp s0, s0 2224; CHECK-SD-NEXT: fmov s0, s8 2225; CHECK-SD-NEXT: csel x23, xzr, x8, vs 2226; CHECK-SD-NEXT: csel x24, xzr, x9, vs 2227; CHECK-SD-NEXT: bl __fixsfti 2228; CHECK-SD-NEXT: fcmp s8, s9 2229; CHECK-SD-NEXT: mov x2, x21 2230; CHECK-SD-NEXT: mov x3, x22 2231; CHECK-SD-NEXT: mov x4, x23 2232; CHECK-SD-NEXT: mov x5, x24 2233; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 2234; CHECK-SD-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload 2235; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2236; CHECK-SD-NEXT: csel x9, x25, x1, lt 2237; CHECK-SD-NEXT: fcmp s8, s10 2238; CHECK-SD-NEXT: mov x0, x19 2239; CHECK-SD-NEXT: mov x1, x20 2240; CHECK-SD-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 2241; CHECK-SD-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload 2242; CHECK-SD-NEXT: csel x9, x26, x9, gt 2243; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2244; CHECK-SD-NEXT: fcmp s8, s8 2245; CHECK-SD-NEXT: ldp x24, x23, [sp, #64] // 16-byte Folded Reload 2246; CHECK-SD-NEXT: ldp x26, x25, [sp, #48] // 16-byte Folded Reload 2247; CHECK-SD-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 2248; CHECK-SD-NEXT: csel x6, xzr, x8, vs 2249; CHECK-SD-NEXT: csel x7, xzr, x9, vs 2250; CHECK-SD-NEXT: add sp, sp, #112 2251; CHECK-SD-NEXT: ret 2252; 2253; CHECK-GI-LABEL: test_signed_v4f32_v4i128: 2254; CHECK-GI: // %bb.0: 2255; CHECK-GI-NEXT: sub sp, sp, #128 2256; CHECK-GI-NEXT: str d12, [sp, #16] // 8-byte Folded Spill 2257; CHECK-GI-NEXT: stp d11, d10, [sp, #24] // 16-byte Folded Spill 2258; CHECK-GI-NEXT: stp d9, d8, [sp, #40] // 16-byte Folded Spill 2259; CHECK-GI-NEXT: str x30, [sp, #56] // 8-byte Folded Spill 2260; CHECK-GI-NEXT: stp x26, x25, [sp, #64] // 16-byte Folded Spill 2261; CHECK-GI-NEXT: stp x24, x23, [sp, #80] // 16-byte Folded Spill 2262; CHECK-GI-NEXT: stp x22, x21, [sp, #96] // 16-byte Folded Spill 2263; CHECK-GI-NEXT: stp x20, x19, [sp, #112] // 16-byte Folded Spill 2264; CHECK-GI-NEXT: .cfi_def_cfa_offset 128 2265; CHECK-GI-NEXT: .cfi_offset w19, -8 2266; CHECK-GI-NEXT: .cfi_offset w20, -16 2267; CHECK-GI-NEXT: .cfi_offset w21, -24 2268; CHECK-GI-NEXT: .cfi_offset w22, -32 2269; CHECK-GI-NEXT: .cfi_offset w23, -40 2270; CHECK-GI-NEXT: .cfi_offset w24, -48 2271; CHECK-GI-NEXT: .cfi_offset w25, -56 2272; CHECK-GI-NEXT: .cfi_offset w26, -64 2273; CHECK-GI-NEXT: .cfi_offset w30, -72 2274; CHECK-GI-NEXT: .cfi_offset b8, -80 2275; CHECK-GI-NEXT: .cfi_offset b9, -88 2276; CHECK-GI-NEXT: .cfi_offset b10, -96 2277; CHECK-GI-NEXT: .cfi_offset b11, -104 2278; CHECK-GI-NEXT: .cfi_offset b12, -112 2279; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill 2280; CHECK-GI-NEXT: mov s9, v0.s[1] 2281; CHECK-GI-NEXT: mov s10, v0.s[2] 2282; CHECK-GI-NEXT: mov s8, v0.s[3] 2283; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0 2284; CHECK-GI-NEXT: bl __fixsfti 2285; CHECK-GI-NEXT: movi v11.2s, #255, lsl #24 2286; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2287; CHECK-GI-NEXT: mov w8, #2130706431 // =0x7effffff 2288; CHECK-GI-NEXT: fmov s12, w8 2289; CHECK-GI-NEXT: mov x25, #-9223372036854775808 // =0x8000000000000000 2290; CHECK-GI-NEXT: mov x26, #9223372036854775807 // =0x7fffffffffffffff 2291; CHECK-GI-NEXT: fcmp s0, s11 2292; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2293; CHECK-GI-NEXT: csel x9, x25, x1, lt 2294; CHECK-GI-NEXT: fcmp s0, s12 2295; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2296; CHECK-GI-NEXT: csel x9, x26, x9, gt 2297; CHECK-GI-NEXT: fcmp s0, s0 2298; CHECK-GI-NEXT: fmov s0, s9 2299; CHECK-GI-NEXT: csel x19, xzr, x8, vs 2300; CHECK-GI-NEXT: csel x20, xzr, x9, vs 2301; CHECK-GI-NEXT: bl __fixsfti 2302; CHECK-GI-NEXT: fcmp s9, s11 2303; CHECK-GI-NEXT: fmov s0, s10 2304; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2305; CHECK-GI-NEXT: csel x9, x25, x1, lt 2306; CHECK-GI-NEXT: fcmp s9, s12 2307; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2308; CHECK-GI-NEXT: csel x9, x26, x9, gt 2309; CHECK-GI-NEXT: fcmp s9, s9 2310; CHECK-GI-NEXT: csel x21, xzr, x8, vs 2311; CHECK-GI-NEXT: csel x22, xzr, x9, vs 2312; CHECK-GI-NEXT: bl __fixsfti 2313; CHECK-GI-NEXT: fcmp s10, s11 2314; CHECK-GI-NEXT: fmov s0, s8 2315; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2316; CHECK-GI-NEXT: csel x9, x25, x1, lt 2317; CHECK-GI-NEXT: fcmp s10, s12 2318; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2319; CHECK-GI-NEXT: csel x9, x26, x9, gt 2320; CHECK-GI-NEXT: fcmp s10, s10 2321; CHECK-GI-NEXT: csel x23, xzr, x8, vs 2322; CHECK-GI-NEXT: csel x24, xzr, x9, vs 2323; CHECK-GI-NEXT: bl __fixsfti 2324; CHECK-GI-NEXT: fcmp s8, s11 2325; CHECK-GI-NEXT: mov x2, x21 2326; CHECK-GI-NEXT: mov x3, x22 2327; CHECK-GI-NEXT: mov x4, x23 2328; CHECK-GI-NEXT: mov x5, x24 2329; CHECK-GI-NEXT: ldr x30, [sp, #56] // 8-byte Folded Reload 2330; CHECK-GI-NEXT: ldp x22, x21, [sp, #96] // 16-byte Folded Reload 2331; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2332; CHECK-GI-NEXT: csel x9, x25, x1, lt 2333; CHECK-GI-NEXT: fcmp s8, s12 2334; CHECK-GI-NEXT: mov x0, x19 2335; CHECK-GI-NEXT: mov x1, x20 2336; CHECK-GI-NEXT: ldr d12, [sp, #16] // 8-byte Folded Reload 2337; CHECK-GI-NEXT: ldp x20, x19, [sp, #112] // 16-byte Folded Reload 2338; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2339; CHECK-GI-NEXT: csel x9, x26, x9, gt 2340; CHECK-GI-NEXT: fcmp s8, s8 2341; CHECK-GI-NEXT: ldp x24, x23, [sp, #80] // 16-byte Folded Reload 2342; CHECK-GI-NEXT: ldp x26, x25, [sp, #64] // 16-byte Folded Reload 2343; CHECK-GI-NEXT: ldp d9, d8, [sp, #40] // 16-byte Folded Reload 2344; CHECK-GI-NEXT: csel x6, xzr, x8, vs 2345; CHECK-GI-NEXT: ldp d11, d10, [sp, #24] // 16-byte Folded Reload 2346; CHECK-GI-NEXT: csel x7, xzr, x9, vs 2347; CHECK-GI-NEXT: add sp, sp, #128 2348; CHECK-GI-NEXT: ret 2349 %x = call <4 x i128> @llvm.fptosi.sat.v4f32.v4i128(<4 x float> %f) 2350 ret <4 x i128> %x 2351} 2352 2353; 2354; 2-Vector double to signed integer -- result size variation 2355; 2356 2357declare <2 x i1> @llvm.fptosi.sat.v2f64.v2i1 (<2 x double>) 2358declare <2 x i8> @llvm.fptosi.sat.v2f64.v2i8 (<2 x double>) 2359declare <2 x i13> @llvm.fptosi.sat.v2f64.v2i13 (<2 x double>) 2360declare <2 x i16> @llvm.fptosi.sat.v2f64.v2i16 (<2 x double>) 2361declare <2 x i19> @llvm.fptosi.sat.v2f64.v2i19 (<2 x double>) 2362declare <2 x i50> @llvm.fptosi.sat.v2f64.v2i50 (<2 x double>) 2363declare <2 x i64> @llvm.fptosi.sat.v2f64.v2i64 (<2 x double>) 2364declare <2 x i100> @llvm.fptosi.sat.v2f64.v2i100(<2 x double>) 2365declare <2 x i128> @llvm.fptosi.sat.v2f64.v2i128(<2 x double>) 2366 2367define <2 x i1> @test_signed_v2f64_v2i1(<2 x double> %f) { 2368; CHECK-SD-LABEL: test_signed_v2f64_v2i1: 2369; CHECK-SD: // %bb.0: 2370; CHECK-SD-NEXT: mov d1, v0.d[1] 2371; CHECK-SD-NEXT: fcvtzs w9, d0 2372; CHECK-SD-NEXT: fcvtzs w8, d1 2373; CHECK-SD-NEXT: ands w8, w8, w8, asr #31 2374; CHECK-SD-NEXT: csinv w8, w8, wzr, ge 2375; CHECK-SD-NEXT: ands w9, w9, w9, asr #31 2376; CHECK-SD-NEXT: csinv w9, w9, wzr, ge 2377; CHECK-SD-NEXT: fmov s0, w9 2378; CHECK-SD-NEXT: mov v0.s[1], w8 2379; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 2380; CHECK-SD-NEXT: ret 2381; 2382; CHECK-GI-LABEL: test_signed_v2f64_v2i1: 2383; CHECK-GI: // %bb.0: 2384; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 2385; CHECK-GI-NEXT: movi v2.2d, #0xffffffffffffffff 2386; CHECK-GI-NEXT: cmlt v1.2d, v0.2d, #0 2387; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b 2388; CHECK-GI-NEXT: cmgt v1.2d, v0.2d, v2.2d 2389; CHECK-GI-NEXT: bif v0.16b, v2.16b, v1.16b 2390; CHECK-GI-NEXT: xtn v0.2s, v0.2d 2391; CHECK-GI-NEXT: ret 2392 %x = call <2 x i1> @llvm.fptosi.sat.v2f64.v2i1(<2 x double> %f) 2393 ret <2 x i1> %x 2394} 2395 2396define <2 x i8> @test_signed_v2f64_v2i8(<2 x double> %f) { 2397; CHECK-SD-LABEL: test_signed_v2f64_v2i8: 2398; CHECK-SD: // %bb.0: 2399; CHECK-SD-NEXT: mov d1, v0.d[1] 2400; CHECK-SD-NEXT: fcvtzs w10, d0 2401; CHECK-SD-NEXT: mov w8, #127 // =0x7f 2402; CHECK-SD-NEXT: mov w11, #-128 // =0xffffff80 2403; CHECK-SD-NEXT: fcvtzs w9, d1 2404; CHECK-SD-NEXT: cmp w9, #127 2405; CHECK-SD-NEXT: csel w9, w9, w8, lt 2406; CHECK-SD-NEXT: cmn w9, #128 2407; CHECK-SD-NEXT: csel w9, w9, w11, gt 2408; CHECK-SD-NEXT: cmp w10, #127 2409; CHECK-SD-NEXT: csel w8, w10, w8, lt 2410; CHECK-SD-NEXT: cmn w8, #128 2411; CHECK-SD-NEXT: csel w8, w8, w11, gt 2412; CHECK-SD-NEXT: fmov s0, w8 2413; CHECK-SD-NEXT: mov v0.s[1], w9 2414; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 2415; CHECK-SD-NEXT: ret 2416; 2417; CHECK-GI-LABEL: test_signed_v2f64_v2i8: 2418; CHECK-GI: // %bb.0: 2419; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 2420; CHECK-GI-NEXT: adrp x8, .LCPI47_1 2421; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI47_1] 2422; CHECK-GI-NEXT: adrp x8, .LCPI47_0 2423; CHECK-GI-NEXT: cmgt v2.2d, v1.2d, v0.2d 2424; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2425; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI47_0] 2426; CHECK-GI-NEXT: cmgt v2.2d, v0.2d, v1.2d 2427; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2428; CHECK-GI-NEXT: xtn v0.2s, v0.2d 2429; CHECK-GI-NEXT: ret 2430 %x = call <2 x i8> @llvm.fptosi.sat.v2f64.v2i8(<2 x double> %f) 2431 ret <2 x i8> %x 2432} 2433 2434define <2 x i13> @test_signed_v2f64_v2i13(<2 x double> %f) { 2435; CHECK-SD-LABEL: test_signed_v2f64_v2i13: 2436; CHECK-SD: // %bb.0: 2437; CHECK-SD-NEXT: mov d1, v0.d[1] 2438; CHECK-SD-NEXT: fcvtzs w10, d0 2439; CHECK-SD-NEXT: mov w8, #4095 // =0xfff 2440; CHECK-SD-NEXT: mov w11, #-4096 // =0xfffff000 2441; CHECK-SD-NEXT: fcvtzs w9, d1 2442; CHECK-SD-NEXT: cmp w9, #4095 2443; CHECK-SD-NEXT: csel w9, w9, w8, lt 2444; CHECK-SD-NEXT: cmn w9, #1, lsl #12 // =4096 2445; CHECK-SD-NEXT: csel w9, w9, w11, gt 2446; CHECK-SD-NEXT: cmp w10, #4095 2447; CHECK-SD-NEXT: csel w8, w10, w8, lt 2448; CHECK-SD-NEXT: cmn w8, #1, lsl #12 // =4096 2449; CHECK-SD-NEXT: csel w8, w8, w11, gt 2450; CHECK-SD-NEXT: fmov s0, w8 2451; CHECK-SD-NEXT: mov v0.s[1], w9 2452; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 2453; CHECK-SD-NEXT: ret 2454; 2455; CHECK-GI-LABEL: test_signed_v2f64_v2i13: 2456; CHECK-GI: // %bb.0: 2457; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 2458; CHECK-GI-NEXT: adrp x8, .LCPI48_1 2459; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI48_1] 2460; CHECK-GI-NEXT: adrp x8, .LCPI48_0 2461; CHECK-GI-NEXT: cmgt v2.2d, v1.2d, v0.2d 2462; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2463; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI48_0] 2464; CHECK-GI-NEXT: cmgt v2.2d, v0.2d, v1.2d 2465; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2466; CHECK-GI-NEXT: xtn v0.2s, v0.2d 2467; CHECK-GI-NEXT: ret 2468 %x = call <2 x i13> @llvm.fptosi.sat.v2f64.v2i13(<2 x double> %f) 2469 ret <2 x i13> %x 2470} 2471 2472define <2 x i16> @test_signed_v2f64_v2i16(<2 x double> %f) { 2473; CHECK-SD-LABEL: test_signed_v2f64_v2i16: 2474; CHECK-SD: // %bb.0: 2475; CHECK-SD-NEXT: mov d1, v0.d[1] 2476; CHECK-SD-NEXT: mov w8, #32767 // =0x7fff 2477; CHECK-SD-NEXT: fcvtzs w10, d0 2478; CHECK-SD-NEXT: mov w11, #-32768 // =0xffff8000 2479; CHECK-SD-NEXT: fcvtzs w9, d1 2480; CHECK-SD-NEXT: cmp w9, w8 2481; CHECK-SD-NEXT: csel w9, w9, w8, lt 2482; CHECK-SD-NEXT: cmn w9, #8, lsl #12 // =32768 2483; CHECK-SD-NEXT: csel w9, w9, w11, gt 2484; CHECK-SD-NEXT: cmp w10, w8 2485; CHECK-SD-NEXT: csel w8, w10, w8, lt 2486; CHECK-SD-NEXT: cmn w8, #8, lsl #12 // =32768 2487; CHECK-SD-NEXT: csel w8, w8, w11, gt 2488; CHECK-SD-NEXT: fmov s0, w8 2489; CHECK-SD-NEXT: mov v0.s[1], w9 2490; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 2491; CHECK-SD-NEXT: ret 2492; 2493; CHECK-GI-LABEL: test_signed_v2f64_v2i16: 2494; CHECK-GI: // %bb.0: 2495; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 2496; CHECK-GI-NEXT: adrp x8, .LCPI49_1 2497; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI49_1] 2498; CHECK-GI-NEXT: adrp x8, .LCPI49_0 2499; CHECK-GI-NEXT: cmgt v2.2d, v1.2d, v0.2d 2500; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2501; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI49_0] 2502; CHECK-GI-NEXT: cmgt v2.2d, v0.2d, v1.2d 2503; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2504; CHECK-GI-NEXT: xtn v0.2s, v0.2d 2505; CHECK-GI-NEXT: ret 2506 %x = call <2 x i16> @llvm.fptosi.sat.v2f64.v2i16(<2 x double> %f) 2507 ret <2 x i16> %x 2508} 2509 2510define <2 x i19> @test_signed_v2f64_v2i19(<2 x double> %f) { 2511; CHECK-SD-LABEL: test_signed_v2f64_v2i19: 2512; CHECK-SD: // %bb.0: 2513; CHECK-SD-NEXT: mov d1, v0.d[1] 2514; CHECK-SD-NEXT: mov w8, #262143 // =0x3ffff 2515; CHECK-SD-NEXT: fcvtzs w10, d0 2516; CHECK-SD-NEXT: mov w11, #-262144 // =0xfffc0000 2517; CHECK-SD-NEXT: fcvtzs w9, d1 2518; CHECK-SD-NEXT: cmp w9, w8 2519; CHECK-SD-NEXT: csel w9, w9, w8, lt 2520; CHECK-SD-NEXT: cmn w9, #64, lsl #12 // =262144 2521; CHECK-SD-NEXT: csel w9, w9, w11, gt 2522; CHECK-SD-NEXT: cmp w10, w8 2523; CHECK-SD-NEXT: csel w8, w10, w8, lt 2524; CHECK-SD-NEXT: cmn w8, #64, lsl #12 // =262144 2525; CHECK-SD-NEXT: csel w8, w8, w11, gt 2526; CHECK-SD-NEXT: fmov s0, w8 2527; CHECK-SD-NEXT: mov v0.s[1], w9 2528; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 2529; CHECK-SD-NEXT: ret 2530; 2531; CHECK-GI-LABEL: test_signed_v2f64_v2i19: 2532; CHECK-GI: // %bb.0: 2533; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 2534; CHECK-GI-NEXT: adrp x8, .LCPI50_1 2535; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI50_1] 2536; CHECK-GI-NEXT: adrp x8, .LCPI50_0 2537; CHECK-GI-NEXT: cmgt v2.2d, v1.2d, v0.2d 2538; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2539; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI50_0] 2540; CHECK-GI-NEXT: cmgt v2.2d, v0.2d, v1.2d 2541; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2542; CHECK-GI-NEXT: xtn v0.2s, v0.2d 2543; CHECK-GI-NEXT: ret 2544 %x = call <2 x i19> @llvm.fptosi.sat.v2f64.v2i19(<2 x double> %f) 2545 ret <2 x i19> %x 2546} 2547 2548define <2 x i32> @test_signed_v2f64_v2i32_duplicate(<2 x double> %f) { 2549; CHECK-SD-LABEL: test_signed_v2f64_v2i32_duplicate: 2550; CHECK-SD: // %bb.0: 2551; CHECK-SD-NEXT: mov d1, v0.d[1] 2552; CHECK-SD-NEXT: fcvtzs w8, d0 2553; CHECK-SD-NEXT: fcvtzs w9, d1 2554; CHECK-SD-NEXT: fmov s0, w8 2555; CHECK-SD-NEXT: mov v0.s[1], w9 2556; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 2557; CHECK-SD-NEXT: ret 2558; 2559; CHECK-GI-LABEL: test_signed_v2f64_v2i32_duplicate: 2560; CHECK-GI: // %bb.0: 2561; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 2562; CHECK-GI-NEXT: adrp x8, .LCPI51_1 2563; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI51_1] 2564; CHECK-GI-NEXT: adrp x8, .LCPI51_0 2565; CHECK-GI-NEXT: cmgt v2.2d, v1.2d, v0.2d 2566; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2567; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI51_0] 2568; CHECK-GI-NEXT: cmgt v2.2d, v0.2d, v1.2d 2569; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2570; CHECK-GI-NEXT: xtn v0.2s, v0.2d 2571; CHECK-GI-NEXT: ret 2572 %x = call <2 x i32> @llvm.fptosi.sat.v2f64.v2i32(<2 x double> %f) 2573 ret <2 x i32> %x 2574} 2575 2576define <2 x i50> @test_signed_v2f64_v2i50(<2 x double> %f) { 2577; CHECK-SD-LABEL: test_signed_v2f64_v2i50: 2578; CHECK-SD: // %bb.0: 2579; CHECK-SD-NEXT: mov d1, v0.d[1] 2580; CHECK-SD-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 2581; CHECK-SD-NEXT: fcvtzs x10, d0 2582; CHECK-SD-NEXT: mov x11, #-562949953421312 // =0xfffe000000000000 2583; CHECK-SD-NEXT: fcvtzs x9, d1 2584; CHECK-SD-NEXT: cmp x9, x8 2585; CHECK-SD-NEXT: csel x9, x9, x8, lt 2586; CHECK-SD-NEXT: cmp x9, x11 2587; CHECK-SD-NEXT: csel x9, x9, x11, gt 2588; CHECK-SD-NEXT: cmp x10, x8 2589; CHECK-SD-NEXT: csel x8, x10, x8, lt 2590; CHECK-SD-NEXT: cmp x8, x11 2591; CHECK-SD-NEXT: csel x8, x8, x11, gt 2592; CHECK-SD-NEXT: fmov d0, x8 2593; CHECK-SD-NEXT: mov v0.d[1], x9 2594; CHECK-SD-NEXT: ret 2595; 2596; CHECK-GI-LABEL: test_signed_v2f64_v2i50: 2597; CHECK-GI: // %bb.0: 2598; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 2599; CHECK-GI-NEXT: adrp x8, .LCPI52_1 2600; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI52_1] 2601; CHECK-GI-NEXT: adrp x8, .LCPI52_0 2602; CHECK-GI-NEXT: cmgt v2.2d, v1.2d, v0.2d 2603; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2604; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI52_0] 2605; CHECK-GI-NEXT: cmgt v2.2d, v0.2d, v1.2d 2606; CHECK-GI-NEXT: bif v0.16b, v1.16b, v2.16b 2607; CHECK-GI-NEXT: ret 2608 %x = call <2 x i50> @llvm.fptosi.sat.v2f64.v2i50(<2 x double> %f) 2609 ret <2 x i50> %x 2610} 2611 2612define <2 x i64> @test_signed_v2f64_v2i64(<2 x double> %f) { 2613; CHECK-LABEL: test_signed_v2f64_v2i64: 2614; CHECK: // %bb.0: 2615; CHECK-NEXT: fcvtzs v0.2d, v0.2d 2616; CHECK-NEXT: ret 2617 %x = call <2 x i64> @llvm.fptosi.sat.v2f64.v2i64(<2 x double> %f) 2618 ret <2 x i64> %x 2619} 2620 2621define <2 x i100> @test_signed_v2f64_v2i100(<2 x double> %f) { 2622; CHECK-SD-LABEL: test_signed_v2f64_v2i100: 2623; CHECK-SD: // %bb.0: 2624; CHECK-SD-NEXT: sub sp, sp, #80 2625; CHECK-SD-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 2626; CHECK-SD-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 2627; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 2628; CHECK-SD-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill 2629; CHECK-SD-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill 2630; CHECK-SD-NEXT: .cfi_def_cfa_offset 80 2631; CHECK-SD-NEXT: .cfi_offset w19, -8 2632; CHECK-SD-NEXT: .cfi_offset w20, -16 2633; CHECK-SD-NEXT: .cfi_offset w21, -24 2634; CHECK-SD-NEXT: .cfi_offset w22, -32 2635; CHECK-SD-NEXT: .cfi_offset w30, -40 2636; CHECK-SD-NEXT: .cfi_offset b8, -48 2637; CHECK-SD-NEXT: .cfi_offset b9, -56 2638; CHECK-SD-NEXT: .cfi_offset b10, -64 2639; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 2640; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 2641; CHECK-SD-NEXT: bl __fixdfti 2642; CHECK-SD-NEXT: mov x8, #-4170333254945079296 // =0xc620000000000000 2643; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2644; CHECK-SD-NEXT: mov x21, #-34359738368 // =0xfffffff800000000 2645; CHECK-SD-NEXT: fmov d9, x8 2646; CHECK-SD-NEXT: mov x8, #5053038781909696511 // =0x461fffffffffffff 2647; CHECK-SD-NEXT: mov x22, #34359738367 // =0x7ffffffff 2648; CHECK-SD-NEXT: fmov d10, x8 2649; CHECK-SD-NEXT: mov d8, v0.d[1] 2650; CHECK-SD-NEXT: fcmp d0, d9 2651; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2652; CHECK-SD-NEXT: csel x9, x21, x1, lt 2653; CHECK-SD-NEXT: fcmp d0, d10 2654; CHECK-SD-NEXT: csel x9, x22, x9, gt 2655; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2656; CHECK-SD-NEXT: fcmp d0, d0 2657; CHECK-SD-NEXT: fmov d0, d8 2658; CHECK-SD-NEXT: csel x19, xzr, x8, vs 2659; CHECK-SD-NEXT: csel x20, xzr, x9, vs 2660; CHECK-SD-NEXT: bl __fixdfti 2661; CHECK-SD-NEXT: fcmp d8, d9 2662; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 2663; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2664; CHECK-SD-NEXT: csel x9, x21, x1, lt 2665; CHECK-SD-NEXT: fcmp d8, d10 2666; CHECK-SD-NEXT: mov x0, x19 2667; CHECK-SD-NEXT: mov x1, x20 2668; CHECK-SD-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 2669; CHECK-SD-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload 2670; CHECK-SD-NEXT: csel x9, x22, x9, gt 2671; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2672; CHECK-SD-NEXT: fcmp d8, d8 2673; CHECK-SD-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload 2674; CHECK-SD-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 2675; CHECK-SD-NEXT: csel x2, xzr, x8, vs 2676; CHECK-SD-NEXT: csel x3, xzr, x9, vs 2677; CHECK-SD-NEXT: add sp, sp, #80 2678; CHECK-SD-NEXT: ret 2679; 2680; CHECK-GI-LABEL: test_signed_v2f64_v2i100: 2681; CHECK-GI: // %bb.0: 2682; CHECK-GI-NEXT: sub sp, sp, #80 2683; CHECK-GI-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 2684; CHECK-GI-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 2685; CHECK-GI-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 2686; CHECK-GI-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill 2687; CHECK-GI-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill 2688; CHECK-GI-NEXT: .cfi_def_cfa_offset 80 2689; CHECK-GI-NEXT: .cfi_offset w19, -8 2690; CHECK-GI-NEXT: .cfi_offset w20, -16 2691; CHECK-GI-NEXT: .cfi_offset w21, -24 2692; CHECK-GI-NEXT: .cfi_offset w22, -32 2693; CHECK-GI-NEXT: .cfi_offset w30, -40 2694; CHECK-GI-NEXT: .cfi_offset b8, -48 2695; CHECK-GI-NEXT: .cfi_offset b9, -56 2696; CHECK-GI-NEXT: .cfi_offset b10, -64 2697; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill 2698; CHECK-GI-NEXT: mov d8, v0.d[1] 2699; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 2700; CHECK-GI-NEXT: bl __fixdfti 2701; CHECK-GI-NEXT: mov x8, #-4170333254945079296 // =0xc620000000000000 2702; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2703; CHECK-GI-NEXT: mov x21, #34359738368 // =0x800000000 2704; CHECK-GI-NEXT: fmov d9, x8 2705; CHECK-GI-NEXT: mov x8, #5053038781909696511 // =0x461fffffffffffff 2706; CHECK-GI-NEXT: mov x22, #34359738367 // =0x7ffffffff 2707; CHECK-GI-NEXT: fmov d10, x8 2708; CHECK-GI-NEXT: fcmp d0, d9 2709; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2710; CHECK-GI-NEXT: csel x9, x21, x1, lt 2711; CHECK-GI-NEXT: fcmp d0, d10 2712; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2713; CHECK-GI-NEXT: csel x9, x22, x9, gt 2714; CHECK-GI-NEXT: fcmp d0, d0 2715; CHECK-GI-NEXT: fmov d0, d8 2716; CHECK-GI-NEXT: csel x19, xzr, x8, vs 2717; CHECK-GI-NEXT: csel x20, xzr, x9, vs 2718; CHECK-GI-NEXT: bl __fixdfti 2719; CHECK-GI-NEXT: fcmp d8, d9 2720; CHECK-GI-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 2721; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2722; CHECK-GI-NEXT: csel x9, x21, x1, lt 2723; CHECK-GI-NEXT: fcmp d8, d10 2724; CHECK-GI-NEXT: mov x0, x19 2725; CHECK-GI-NEXT: mov x1, x20 2726; CHECK-GI-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 2727; CHECK-GI-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload 2728; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2729; CHECK-GI-NEXT: csel x9, x22, x9, gt 2730; CHECK-GI-NEXT: fcmp d8, d8 2731; CHECK-GI-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload 2732; CHECK-GI-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 2733; CHECK-GI-NEXT: csel x2, xzr, x8, vs 2734; CHECK-GI-NEXT: csel x3, xzr, x9, vs 2735; CHECK-GI-NEXT: add sp, sp, #80 2736; CHECK-GI-NEXT: ret 2737 %x = call <2 x i100> @llvm.fptosi.sat.v2f64.v2i100(<2 x double> %f) 2738 ret <2 x i100> %x 2739} 2740 2741define <2 x i128> @test_signed_v2f64_v2i128(<2 x double> %f) { 2742; CHECK-SD-LABEL: test_signed_v2f64_v2i128: 2743; CHECK-SD: // %bb.0: 2744; CHECK-SD-NEXT: sub sp, sp, #80 2745; CHECK-SD-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 2746; CHECK-SD-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 2747; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 2748; CHECK-SD-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill 2749; CHECK-SD-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill 2750; CHECK-SD-NEXT: .cfi_def_cfa_offset 80 2751; CHECK-SD-NEXT: .cfi_offset w19, -8 2752; CHECK-SD-NEXT: .cfi_offset w20, -16 2753; CHECK-SD-NEXT: .cfi_offset w21, -24 2754; CHECK-SD-NEXT: .cfi_offset w22, -32 2755; CHECK-SD-NEXT: .cfi_offset w30, -40 2756; CHECK-SD-NEXT: .cfi_offset b8, -48 2757; CHECK-SD-NEXT: .cfi_offset b9, -56 2758; CHECK-SD-NEXT: .cfi_offset b10, -64 2759; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 2760; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 2761; CHECK-SD-NEXT: bl __fixdfti 2762; CHECK-SD-NEXT: mov x8, #-4044232465378705408 // =0xc7e0000000000000 2763; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2764; CHECK-SD-NEXT: mov x21, #-9223372036854775808 // =0x8000000000000000 2765; CHECK-SD-NEXT: fmov d9, x8 2766; CHECK-SD-NEXT: mov x8, #5179139571476070399 // =0x47dfffffffffffff 2767; CHECK-SD-NEXT: mov x22, #9223372036854775807 // =0x7fffffffffffffff 2768; CHECK-SD-NEXT: fmov d10, x8 2769; CHECK-SD-NEXT: mov d8, v0.d[1] 2770; CHECK-SD-NEXT: fcmp d0, d9 2771; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2772; CHECK-SD-NEXT: csel x9, x21, x1, lt 2773; CHECK-SD-NEXT: fcmp d0, d10 2774; CHECK-SD-NEXT: csel x9, x22, x9, gt 2775; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2776; CHECK-SD-NEXT: fcmp d0, d0 2777; CHECK-SD-NEXT: fmov d0, d8 2778; CHECK-SD-NEXT: csel x19, xzr, x8, vs 2779; CHECK-SD-NEXT: csel x20, xzr, x9, vs 2780; CHECK-SD-NEXT: bl __fixdfti 2781; CHECK-SD-NEXT: fcmp d8, d9 2782; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 2783; CHECK-SD-NEXT: csel x8, xzr, x0, lt 2784; CHECK-SD-NEXT: csel x9, x21, x1, lt 2785; CHECK-SD-NEXT: fcmp d8, d10 2786; CHECK-SD-NEXT: mov x0, x19 2787; CHECK-SD-NEXT: mov x1, x20 2788; CHECK-SD-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 2789; CHECK-SD-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload 2790; CHECK-SD-NEXT: csel x9, x22, x9, gt 2791; CHECK-SD-NEXT: csinv x8, x8, xzr, le 2792; CHECK-SD-NEXT: fcmp d8, d8 2793; CHECK-SD-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload 2794; CHECK-SD-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 2795; CHECK-SD-NEXT: csel x2, xzr, x8, vs 2796; CHECK-SD-NEXT: csel x3, xzr, x9, vs 2797; CHECK-SD-NEXT: add sp, sp, #80 2798; CHECK-SD-NEXT: ret 2799; 2800; CHECK-GI-LABEL: test_signed_v2f64_v2i128: 2801; CHECK-GI: // %bb.0: 2802; CHECK-GI-NEXT: sub sp, sp, #80 2803; CHECK-GI-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 2804; CHECK-GI-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 2805; CHECK-GI-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 2806; CHECK-GI-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill 2807; CHECK-GI-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill 2808; CHECK-GI-NEXT: .cfi_def_cfa_offset 80 2809; CHECK-GI-NEXT: .cfi_offset w19, -8 2810; CHECK-GI-NEXT: .cfi_offset w20, -16 2811; CHECK-GI-NEXT: .cfi_offset w21, -24 2812; CHECK-GI-NEXT: .cfi_offset w22, -32 2813; CHECK-GI-NEXT: .cfi_offset w30, -40 2814; CHECK-GI-NEXT: .cfi_offset b8, -48 2815; CHECK-GI-NEXT: .cfi_offset b9, -56 2816; CHECK-GI-NEXT: .cfi_offset b10, -64 2817; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill 2818; CHECK-GI-NEXT: mov d8, v0.d[1] 2819; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 2820; CHECK-GI-NEXT: bl __fixdfti 2821; CHECK-GI-NEXT: mov x8, #-4044232465378705408 // =0xc7e0000000000000 2822; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload 2823; CHECK-GI-NEXT: mov x21, #-9223372036854775808 // =0x8000000000000000 2824; CHECK-GI-NEXT: fmov d9, x8 2825; CHECK-GI-NEXT: mov x8, #5179139571476070399 // =0x47dfffffffffffff 2826; CHECK-GI-NEXT: mov x22, #9223372036854775807 // =0x7fffffffffffffff 2827; CHECK-GI-NEXT: fmov d10, x8 2828; CHECK-GI-NEXT: fcmp d0, d9 2829; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2830; CHECK-GI-NEXT: csel x9, x21, x1, lt 2831; CHECK-GI-NEXT: fcmp d0, d10 2832; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2833; CHECK-GI-NEXT: csel x9, x22, x9, gt 2834; CHECK-GI-NEXT: fcmp d0, d0 2835; CHECK-GI-NEXT: fmov d0, d8 2836; CHECK-GI-NEXT: csel x19, xzr, x8, vs 2837; CHECK-GI-NEXT: csel x20, xzr, x9, vs 2838; CHECK-GI-NEXT: bl __fixdfti 2839; CHECK-GI-NEXT: fcmp d8, d9 2840; CHECK-GI-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 2841; CHECK-GI-NEXT: csel x8, xzr, x0, lt 2842; CHECK-GI-NEXT: csel x9, x21, x1, lt 2843; CHECK-GI-NEXT: fcmp d8, d10 2844; CHECK-GI-NEXT: mov x0, x19 2845; CHECK-GI-NEXT: mov x1, x20 2846; CHECK-GI-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 2847; CHECK-GI-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload 2848; CHECK-GI-NEXT: csinv x8, x8, xzr, le 2849; CHECK-GI-NEXT: csel x9, x22, x9, gt 2850; CHECK-GI-NEXT: fcmp d8, d8 2851; CHECK-GI-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload 2852; CHECK-GI-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 2853; CHECK-GI-NEXT: csel x2, xzr, x8, vs 2854; CHECK-GI-NEXT: csel x3, xzr, x9, vs 2855; CHECK-GI-NEXT: add sp, sp, #80 2856; CHECK-GI-NEXT: ret 2857 %x = call <2 x i128> @llvm.fptosi.sat.v2f64.v2i128(<2 x double> %f) 2858 ret <2 x i128> %x 2859} 2860 2861; 2862; 4-Vector half to signed integer -- result size variation 2863; 2864 2865declare <4 x i1> @llvm.fptosi.sat.v4f16.v4i1 (<4 x half>) 2866declare <4 x i8> @llvm.fptosi.sat.v4f16.v4i8 (<4 x half>) 2867declare <4 x i13> @llvm.fptosi.sat.v4f16.v4i13 (<4 x half>) 2868declare <4 x i16> @llvm.fptosi.sat.v4f16.v4i16 (<4 x half>) 2869declare <4 x i19> @llvm.fptosi.sat.v4f16.v4i19 (<4 x half>) 2870declare <4 x i50> @llvm.fptosi.sat.v4f16.v4i50 (<4 x half>) 2871declare <4 x i64> @llvm.fptosi.sat.v4f16.v4i64 (<4 x half>) 2872declare <4 x i100> @llvm.fptosi.sat.v4f16.v4i100(<4 x half>) 2873declare <4 x i128> @llvm.fptosi.sat.v4f16.v4i128(<4 x half>) 2874 2875define <4 x i1> @test_signed_v4f16_v4i1(<4 x half> %f) { 2876; CHECK-SD-CVT-LABEL: test_signed_v4f16_v4i1: 2877; CHECK-SD-CVT: // %bb.0: 2878; CHECK-SD-CVT-NEXT: fcvtl v0.4s, v0.4h 2879; CHECK-SD-CVT-NEXT: movi v1.2d, #0000000000000000 2880; CHECK-SD-CVT-NEXT: fcvtzs v0.4s, v0.4s 2881; CHECK-SD-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 2882; CHECK-SD-CVT-NEXT: movi v1.2d, #0xffffffffffffffff 2883; CHECK-SD-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 2884; CHECK-SD-CVT-NEXT: xtn v0.4h, v0.4s 2885; CHECK-SD-CVT-NEXT: ret 2886; 2887; CHECK-SD-FP16-LABEL: test_signed_v4f16_v4i1: 2888; CHECK-SD-FP16: // %bb.0: 2889; CHECK-SD-FP16-NEXT: movi v1.2d, #0000000000000000 2890; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h 2891; CHECK-SD-FP16-NEXT: movi v2.2d, #0xffffffffffffffff 2892; CHECK-SD-FP16-NEXT: smin v0.4h, v0.4h, v1.4h 2893; CHECK-SD-FP16-NEXT: smax v0.4h, v0.4h, v2.4h 2894; CHECK-SD-FP16-NEXT: ret 2895; 2896; CHECK-GI-CVT-LABEL: test_signed_v4f16_v4i1: 2897; CHECK-GI-CVT: // %bb.0: 2898; CHECK-GI-CVT-NEXT: fcvtl v0.4s, v0.4h 2899; CHECK-GI-CVT-NEXT: movi v1.2d, #0000000000000000 2900; CHECK-GI-CVT-NEXT: movi v2.2d, #0xffffffffffffffff 2901; CHECK-GI-CVT-NEXT: fcvtzs v0.4s, v0.4s 2902; CHECK-GI-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 2903; CHECK-GI-CVT-NEXT: smax v0.4s, v0.4s, v2.4s 2904; CHECK-GI-CVT-NEXT: xtn v0.4h, v0.4s 2905; CHECK-GI-CVT-NEXT: ret 2906; 2907; CHECK-GI-FP16-LABEL: test_signed_v4f16_v4i1: 2908; CHECK-GI-FP16: // %bb.0: 2909; CHECK-GI-FP16-NEXT: movi v1.2d, #0000000000000000 2910; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h 2911; CHECK-GI-FP16-NEXT: movi d2, #0xffffffffffffffff 2912; CHECK-GI-FP16-NEXT: smin v0.4h, v0.4h, v1.4h 2913; CHECK-GI-FP16-NEXT: smax v0.4h, v0.4h, v2.4h 2914; CHECK-GI-FP16-NEXT: ret 2915 %x = call <4 x i1> @llvm.fptosi.sat.v4f16.v4i1(<4 x half> %f) 2916 ret <4 x i1> %x 2917} 2918 2919define <4 x i8> @test_signed_v4f16_v4i8(<4 x half> %f) { 2920; CHECK-SD-CVT-LABEL: test_signed_v4f16_v4i8: 2921; CHECK-SD-CVT: // %bb.0: 2922; CHECK-SD-CVT-NEXT: fcvtl v0.4s, v0.4h 2923; CHECK-SD-CVT-NEXT: movi v1.4s, #127 2924; CHECK-SD-CVT-NEXT: fcvtzs v0.4s, v0.4s 2925; CHECK-SD-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 2926; CHECK-SD-CVT-NEXT: mvni v1.4s, #127 2927; CHECK-SD-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 2928; CHECK-SD-CVT-NEXT: xtn v0.4h, v0.4s 2929; CHECK-SD-CVT-NEXT: ret 2930; 2931; CHECK-SD-FP16-LABEL: test_signed_v4f16_v4i8: 2932; CHECK-SD-FP16: // %bb.0: 2933; CHECK-SD-FP16-NEXT: movi v1.4h, #127 2934; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h 2935; CHECK-SD-FP16-NEXT: smin v0.4h, v0.4h, v1.4h 2936; CHECK-SD-FP16-NEXT: mvni v1.4h, #127 2937; CHECK-SD-FP16-NEXT: smax v0.4h, v0.4h, v1.4h 2938; CHECK-SD-FP16-NEXT: ret 2939; 2940; CHECK-GI-CVT-LABEL: test_signed_v4f16_v4i8: 2941; CHECK-GI-CVT: // %bb.0: 2942; CHECK-GI-CVT-NEXT: fcvtl v0.4s, v0.4h 2943; CHECK-GI-CVT-NEXT: movi v1.4s, #127 2944; CHECK-GI-CVT-NEXT: fcvtzs v0.4s, v0.4s 2945; CHECK-GI-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 2946; CHECK-GI-CVT-NEXT: mvni v1.4s, #127 2947; CHECK-GI-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 2948; CHECK-GI-CVT-NEXT: xtn v0.4h, v0.4s 2949; CHECK-GI-CVT-NEXT: ret 2950; 2951; CHECK-GI-FP16-LABEL: test_signed_v4f16_v4i8: 2952; CHECK-GI-FP16: // %bb.0: 2953; CHECK-GI-FP16-NEXT: movi v1.4h, #127 2954; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h 2955; CHECK-GI-FP16-NEXT: mvni v2.4h, #127 2956; CHECK-GI-FP16-NEXT: smin v0.4h, v0.4h, v1.4h 2957; CHECK-GI-FP16-NEXT: smax v0.4h, v0.4h, v2.4h 2958; CHECK-GI-FP16-NEXT: ret 2959 %x = call <4 x i8> @llvm.fptosi.sat.v4f16.v4i8(<4 x half> %f) 2960 ret <4 x i8> %x 2961} 2962 2963define <4 x i13> @test_signed_v4f16_v4i13(<4 x half> %f) { 2964; CHECK-SD-CVT-LABEL: test_signed_v4f16_v4i13: 2965; CHECK-SD-CVT: // %bb.0: 2966; CHECK-SD-CVT-NEXT: fcvtl v0.4s, v0.4h 2967; CHECK-SD-CVT-NEXT: movi v1.4s, #15, msl #8 2968; CHECK-SD-CVT-NEXT: fcvtzs v0.4s, v0.4s 2969; CHECK-SD-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 2970; CHECK-SD-CVT-NEXT: mvni v1.4s, #15, msl #8 2971; CHECK-SD-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 2972; CHECK-SD-CVT-NEXT: xtn v0.4h, v0.4s 2973; CHECK-SD-CVT-NEXT: ret 2974; 2975; CHECK-SD-FP16-LABEL: test_signed_v4f16_v4i13: 2976; CHECK-SD-FP16: // %bb.0: 2977; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h 2978; CHECK-SD-FP16-NEXT: mvni v1.4h, #240, lsl #8 2979; CHECK-SD-FP16-NEXT: movi v2.4h, #240, lsl #8 2980; CHECK-SD-FP16-NEXT: smin v0.4h, v0.4h, v1.4h 2981; CHECK-SD-FP16-NEXT: smax v0.4h, v0.4h, v2.4h 2982; CHECK-SD-FP16-NEXT: ret 2983; 2984; CHECK-GI-CVT-LABEL: test_signed_v4f16_v4i13: 2985; CHECK-GI-CVT: // %bb.0: 2986; CHECK-GI-CVT-NEXT: fcvtl v0.4s, v0.4h 2987; CHECK-GI-CVT-NEXT: movi v1.4s, #15, msl #8 2988; CHECK-GI-CVT-NEXT: fcvtzs v0.4s, v0.4s 2989; CHECK-GI-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 2990; CHECK-GI-CVT-NEXT: mvni v1.4s, #15, msl #8 2991; CHECK-GI-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 2992; CHECK-GI-CVT-NEXT: xtn v0.4h, v0.4s 2993; CHECK-GI-CVT-NEXT: ret 2994; 2995; CHECK-GI-FP16-LABEL: test_signed_v4f16_v4i13: 2996; CHECK-GI-FP16: // %bb.0: 2997; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h 2998; CHECK-GI-FP16-NEXT: mvni v1.4h, #240, lsl #8 2999; CHECK-GI-FP16-NEXT: movi v2.4h, #240, lsl #8 3000; CHECK-GI-FP16-NEXT: smin v0.4h, v0.4h, v1.4h 3001; CHECK-GI-FP16-NEXT: smax v0.4h, v0.4h, v2.4h 3002; CHECK-GI-FP16-NEXT: ret 3003 %x = call <4 x i13> @llvm.fptosi.sat.v4f16.v4i13(<4 x half> %f) 3004 ret <4 x i13> %x 3005} 3006 3007define <4 x i16> @test_signed_v4f16_v4i16(<4 x half> %f) { 3008; CHECK-SD-CVT-LABEL: test_signed_v4f16_v4i16: 3009; CHECK-SD-CVT: // %bb.0: 3010; CHECK-SD-CVT-NEXT: fcvtl v0.4s, v0.4h 3011; CHECK-SD-CVT-NEXT: fcvtzs v0.4s, v0.4s 3012; CHECK-SD-CVT-NEXT: sqxtn v0.4h, v0.4s 3013; CHECK-SD-CVT-NEXT: ret 3014; 3015; CHECK-SD-FP16-LABEL: test_signed_v4f16_v4i16: 3016; CHECK-SD-FP16: // %bb.0: 3017; CHECK-SD-FP16-NEXT: fcvtzs v0.4h, v0.4h 3018; CHECK-SD-FP16-NEXT: ret 3019; 3020; CHECK-GI-CVT-LABEL: test_signed_v4f16_v4i16: 3021; CHECK-GI-CVT: // %bb.0: 3022; CHECK-GI-CVT-NEXT: fcvtl v0.4s, v0.4h 3023; CHECK-GI-CVT-NEXT: movi v1.4s, #127, msl #8 3024; CHECK-GI-CVT-NEXT: fcvtzs v0.4s, v0.4s 3025; CHECK-GI-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 3026; CHECK-GI-CVT-NEXT: mvni v1.4s, #127, msl #8 3027; CHECK-GI-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 3028; CHECK-GI-CVT-NEXT: xtn v0.4h, v0.4s 3029; CHECK-GI-CVT-NEXT: ret 3030; 3031; CHECK-GI-FP16-LABEL: test_signed_v4f16_v4i16: 3032; CHECK-GI-FP16: // %bb.0: 3033; CHECK-GI-FP16-NEXT: fcvtzs v0.4h, v0.4h 3034; CHECK-GI-FP16-NEXT: ret 3035 %x = call <4 x i16> @llvm.fptosi.sat.v4f16.v4i16(<4 x half> %f) 3036 ret <4 x i16> %x 3037} 3038 3039define <4 x i19> @test_signed_v4f16_v4i19(<4 x half> %f) { 3040; CHECK-LABEL: test_signed_v4f16_v4i19: 3041; CHECK: // %bb.0: 3042; CHECK-NEXT: fcvtl v0.4s, v0.4h 3043; CHECK-NEXT: movi v1.4s, #3, msl #16 3044; CHECK-NEXT: fcvtzs v0.4s, v0.4s 3045; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s 3046; CHECK-NEXT: mvni v1.4s, #3, msl #16 3047; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s 3048; CHECK-NEXT: ret 3049 %x = call <4 x i19> @llvm.fptosi.sat.v4f16.v4i19(<4 x half> %f) 3050 ret <4 x i19> %x 3051} 3052 3053define <4 x i32> @test_signed_v4f16_v4i32_duplicate(<4 x half> %f) { 3054; CHECK-LABEL: test_signed_v4f16_v4i32_duplicate: 3055; CHECK: // %bb.0: 3056; CHECK-NEXT: fcvtl v0.4s, v0.4h 3057; CHECK-NEXT: fcvtzs v0.4s, v0.4s 3058; CHECK-NEXT: ret 3059 %x = call <4 x i32> @llvm.fptosi.sat.v4f16.v4i32(<4 x half> %f) 3060 ret <4 x i32> %x 3061} 3062 3063define <4 x i50> @test_signed_v4f16_v4i50(<4 x half> %f) { 3064; CHECK-SD-CVT-LABEL: test_signed_v4f16_v4i50: 3065; CHECK-SD-CVT: // %bb.0: 3066; CHECK-SD-CVT-NEXT: // kill: def $d0 killed $d0 def $q0 3067; CHECK-SD-CVT-NEXT: mov h1, v0.h[1] 3068; CHECK-SD-CVT-NEXT: fcvt s2, h0 3069; CHECK-SD-CVT-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 3070; CHECK-SD-CVT-NEXT: mov h3, v0.h[2] 3071; CHECK-SD-CVT-NEXT: mov h0, v0.h[3] 3072; CHECK-SD-CVT-NEXT: mov x11, #-562949953421312 // =0xfffe000000000000 3073; CHECK-SD-CVT-NEXT: fcvt s1, h1 3074; CHECK-SD-CVT-NEXT: fcvtzs x9, s2 3075; CHECK-SD-CVT-NEXT: fcvt s2, h3 3076; CHECK-SD-CVT-NEXT: fcvt s0, h0 3077; CHECK-SD-CVT-NEXT: fcvtzs x10, s1 3078; CHECK-SD-CVT-NEXT: cmp x9, x8 3079; CHECK-SD-CVT-NEXT: csel x9, x9, x8, lt 3080; CHECK-SD-CVT-NEXT: fcvtzs x12, s2 3081; CHECK-SD-CVT-NEXT: cmp x9, x11 3082; CHECK-SD-CVT-NEXT: csel x0, x9, x11, gt 3083; CHECK-SD-CVT-NEXT: cmp x10, x8 3084; CHECK-SD-CVT-NEXT: csel x9, x10, x8, lt 3085; CHECK-SD-CVT-NEXT: fcvtzs x10, s0 3086; CHECK-SD-CVT-NEXT: cmp x9, x11 3087; CHECK-SD-CVT-NEXT: csel x1, x9, x11, gt 3088; CHECK-SD-CVT-NEXT: cmp x12, x8 3089; CHECK-SD-CVT-NEXT: csel x9, x12, x8, lt 3090; CHECK-SD-CVT-NEXT: cmp x9, x11 3091; CHECK-SD-CVT-NEXT: csel x2, x9, x11, gt 3092; CHECK-SD-CVT-NEXT: cmp x10, x8 3093; CHECK-SD-CVT-NEXT: csel x8, x10, x8, lt 3094; CHECK-SD-CVT-NEXT: cmp x8, x11 3095; CHECK-SD-CVT-NEXT: csel x3, x8, x11, gt 3096; CHECK-SD-CVT-NEXT: ret 3097; 3098; CHECK-SD-FP16-LABEL: test_signed_v4f16_v4i50: 3099; CHECK-SD-FP16: // %bb.0: 3100; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0 3101; CHECK-SD-FP16-NEXT: mov h1, v0.h[1] 3102; CHECK-SD-FP16-NEXT: fcvtzs x9, h0 3103; CHECK-SD-FP16-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 3104; CHECK-SD-FP16-NEXT: mov h2, v0.h[2] 3105; CHECK-SD-FP16-NEXT: mov x11, #-562949953421312 // =0xfffe000000000000 3106; CHECK-SD-FP16-NEXT: mov h0, v0.h[3] 3107; CHECK-SD-FP16-NEXT: fcvtzs x10, h1 3108; CHECK-SD-FP16-NEXT: cmp x9, x8 3109; CHECK-SD-FP16-NEXT: csel x9, x9, x8, lt 3110; CHECK-SD-FP16-NEXT: fcvtzs x12, h2 3111; CHECK-SD-FP16-NEXT: cmp x9, x11 3112; CHECK-SD-FP16-NEXT: csel x0, x9, x11, gt 3113; CHECK-SD-FP16-NEXT: cmp x10, x8 3114; CHECK-SD-FP16-NEXT: csel x9, x10, x8, lt 3115; CHECK-SD-FP16-NEXT: fcvtzs x10, h0 3116; CHECK-SD-FP16-NEXT: cmp x9, x11 3117; CHECK-SD-FP16-NEXT: csel x1, x9, x11, gt 3118; CHECK-SD-FP16-NEXT: cmp x12, x8 3119; CHECK-SD-FP16-NEXT: csel x9, x12, x8, lt 3120; CHECK-SD-FP16-NEXT: cmp x9, x11 3121; CHECK-SD-FP16-NEXT: csel x2, x9, x11, gt 3122; CHECK-SD-FP16-NEXT: cmp x10, x8 3123; CHECK-SD-FP16-NEXT: csel x8, x10, x8, lt 3124; CHECK-SD-FP16-NEXT: cmp x8, x11 3125; CHECK-SD-FP16-NEXT: csel x3, x8, x11, gt 3126; CHECK-SD-FP16-NEXT: ret 3127; 3128; CHECK-GI-CVT-LABEL: test_signed_v4f16_v4i50: 3129; CHECK-GI-CVT: // %bb.0: 3130; CHECK-GI-CVT-NEXT: // kill: def $d0 killed $d0 def $q0 3131; CHECK-GI-CVT-NEXT: mov h1, v0.h[1] 3132; CHECK-GI-CVT-NEXT: fcvt s2, h0 3133; CHECK-GI-CVT-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 3134; CHECK-GI-CVT-NEXT: mov h3, v0.h[2] 3135; CHECK-GI-CVT-NEXT: mov h0, v0.h[3] 3136; CHECK-GI-CVT-NEXT: mov x11, #-562949953421312 // =0xfffe000000000000 3137; CHECK-GI-CVT-NEXT: fcvt s1, h1 3138; CHECK-GI-CVT-NEXT: fcvtzs x9, s2 3139; CHECK-GI-CVT-NEXT: fcvt s2, h3 3140; CHECK-GI-CVT-NEXT: fcvt s0, h0 3141; CHECK-GI-CVT-NEXT: fcvtzs x10, s1 3142; CHECK-GI-CVT-NEXT: cmp x9, x8 3143; CHECK-GI-CVT-NEXT: csel x9, x9, x8, lt 3144; CHECK-GI-CVT-NEXT: fcvtzs x12, s2 3145; CHECK-GI-CVT-NEXT: cmp x9, x11 3146; CHECK-GI-CVT-NEXT: csel x0, x9, x11, gt 3147; CHECK-GI-CVT-NEXT: cmp x10, x8 3148; CHECK-GI-CVT-NEXT: csel x9, x10, x8, lt 3149; CHECK-GI-CVT-NEXT: fcvtzs x10, s0 3150; CHECK-GI-CVT-NEXT: cmp x9, x11 3151; CHECK-GI-CVT-NEXT: csel x1, x9, x11, gt 3152; CHECK-GI-CVT-NEXT: cmp x12, x8 3153; CHECK-GI-CVT-NEXT: csel x9, x12, x8, lt 3154; CHECK-GI-CVT-NEXT: cmp x9, x11 3155; CHECK-GI-CVT-NEXT: csel x2, x9, x11, gt 3156; CHECK-GI-CVT-NEXT: cmp x10, x8 3157; CHECK-GI-CVT-NEXT: csel x8, x10, x8, lt 3158; CHECK-GI-CVT-NEXT: cmp x8, x11 3159; CHECK-GI-CVT-NEXT: csel x3, x8, x11, gt 3160; CHECK-GI-CVT-NEXT: ret 3161; 3162; CHECK-GI-FP16-LABEL: test_signed_v4f16_v4i50: 3163; CHECK-GI-FP16: // %bb.0: 3164; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0 3165; CHECK-GI-FP16-NEXT: mov h1, v0.h[1] 3166; CHECK-GI-FP16-NEXT: fcvtzs x9, h0 3167; CHECK-GI-FP16-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 3168; CHECK-GI-FP16-NEXT: mov h2, v0.h[2] 3169; CHECK-GI-FP16-NEXT: mov x11, #-562949953421312 // =0xfffe000000000000 3170; CHECK-GI-FP16-NEXT: mov h0, v0.h[3] 3171; CHECK-GI-FP16-NEXT: fcvtzs x10, h1 3172; CHECK-GI-FP16-NEXT: cmp x9, x8 3173; CHECK-GI-FP16-NEXT: csel x9, x9, x8, lt 3174; CHECK-GI-FP16-NEXT: fcvtzs x12, h2 3175; CHECK-GI-FP16-NEXT: cmp x9, x11 3176; CHECK-GI-FP16-NEXT: csel x0, x9, x11, gt 3177; CHECK-GI-FP16-NEXT: cmp x10, x8 3178; CHECK-GI-FP16-NEXT: csel x9, x10, x8, lt 3179; CHECK-GI-FP16-NEXT: fcvtzs x10, h0 3180; CHECK-GI-FP16-NEXT: cmp x9, x11 3181; CHECK-GI-FP16-NEXT: csel x1, x9, x11, gt 3182; CHECK-GI-FP16-NEXT: cmp x12, x8 3183; CHECK-GI-FP16-NEXT: csel x9, x12, x8, lt 3184; CHECK-GI-FP16-NEXT: cmp x9, x11 3185; CHECK-GI-FP16-NEXT: csel x2, x9, x11, gt 3186; CHECK-GI-FP16-NEXT: cmp x10, x8 3187; CHECK-GI-FP16-NEXT: csel x8, x10, x8, lt 3188; CHECK-GI-FP16-NEXT: cmp x8, x11 3189; CHECK-GI-FP16-NEXT: csel x3, x8, x11, gt 3190; CHECK-GI-FP16-NEXT: ret 3191 %x = call <4 x i50> @llvm.fptosi.sat.v4f16.v4i50(<4 x half> %f) 3192 ret <4 x i50> %x 3193} 3194 3195define <4 x i64> @test_signed_v4f16_v4i64(<4 x half> %f) { 3196; CHECK-SD-CVT-LABEL: test_signed_v4f16_v4i64: 3197; CHECK-SD-CVT: // %bb.0: 3198; CHECK-SD-CVT-NEXT: // kill: def $d0 killed $d0 def $q0 3199; CHECK-SD-CVT-NEXT: mov h1, v0.h[2] 3200; CHECK-SD-CVT-NEXT: mov h2, v0.h[1] 3201; CHECK-SD-CVT-NEXT: mov h3, v0.h[3] 3202; CHECK-SD-CVT-NEXT: fcvt s0, h0 3203; CHECK-SD-CVT-NEXT: fcvt s1, h1 3204; CHECK-SD-CVT-NEXT: fcvt s2, h2 3205; CHECK-SD-CVT-NEXT: fcvt s3, h3 3206; CHECK-SD-CVT-NEXT: fcvtzs x8, s0 3207; CHECK-SD-CVT-NEXT: fcvtzs x9, s1 3208; CHECK-SD-CVT-NEXT: fcvtzs x10, s2 3209; CHECK-SD-CVT-NEXT: fcvtzs x11, s3 3210; CHECK-SD-CVT-NEXT: fmov d0, x8 3211; CHECK-SD-CVT-NEXT: fmov d1, x9 3212; CHECK-SD-CVT-NEXT: mov v0.d[1], x10 3213; CHECK-SD-CVT-NEXT: mov v1.d[1], x11 3214; CHECK-SD-CVT-NEXT: ret 3215; 3216; CHECK-SD-FP16-LABEL: test_signed_v4f16_v4i64: 3217; CHECK-SD-FP16: // %bb.0: 3218; CHECK-SD-FP16-NEXT: // kill: def $d0 killed $d0 def $q0 3219; CHECK-SD-FP16-NEXT: mov h1, v0.h[2] 3220; CHECK-SD-FP16-NEXT: mov h2, v0.h[1] 3221; CHECK-SD-FP16-NEXT: mov h3, v0.h[3] 3222; CHECK-SD-FP16-NEXT: fcvtzs x8, h0 3223; CHECK-SD-FP16-NEXT: fcvtzs x9, h1 3224; CHECK-SD-FP16-NEXT: fcvtzs x10, h2 3225; CHECK-SD-FP16-NEXT: fcvtzs x11, h3 3226; CHECK-SD-FP16-NEXT: fmov d0, x8 3227; CHECK-SD-FP16-NEXT: fmov d1, x9 3228; CHECK-SD-FP16-NEXT: mov v0.d[1], x10 3229; CHECK-SD-FP16-NEXT: mov v1.d[1], x11 3230; CHECK-SD-FP16-NEXT: ret 3231; 3232; CHECK-GI-CVT-LABEL: test_signed_v4f16_v4i64: 3233; CHECK-GI-CVT: // %bb.0: 3234; CHECK-GI-CVT-NEXT: fcvtl v0.4s, v0.4h 3235; CHECK-GI-CVT-NEXT: fcvtl v1.2d, v0.2s 3236; CHECK-GI-CVT-NEXT: fcvtl2 v2.2d, v0.4s 3237; CHECK-GI-CVT-NEXT: fcvtzs v0.2d, v1.2d 3238; CHECK-GI-CVT-NEXT: fcvtzs v1.2d, v2.2d 3239; CHECK-GI-CVT-NEXT: ret 3240; 3241; CHECK-GI-FP16-LABEL: test_signed_v4f16_v4i64: 3242; CHECK-GI-FP16: // %bb.0: 3243; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0 3244; CHECK-GI-FP16-NEXT: mov h1, v0.h[1] 3245; CHECK-GI-FP16-NEXT: mov h2, v0.h[2] 3246; CHECK-GI-FP16-NEXT: mov h3, v0.h[3] 3247; CHECK-GI-FP16-NEXT: fcvt d0, h0 3248; CHECK-GI-FP16-NEXT: fcvt d1, h1 3249; CHECK-GI-FP16-NEXT: fcvt d2, h2 3250; CHECK-GI-FP16-NEXT: fcvt d3, h3 3251; CHECK-GI-FP16-NEXT: mov v0.d[1], v1.d[0] 3252; CHECK-GI-FP16-NEXT: mov v2.d[1], v3.d[0] 3253; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d 3254; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v2.2d 3255; CHECK-GI-FP16-NEXT: ret 3256 %x = call <4 x i64> @llvm.fptosi.sat.v4f16.v4i64(<4 x half> %f) 3257 ret <4 x i64> %x 3258} 3259 3260define <4 x i100> @test_signed_v4f16_v4i100(<4 x half> %f) { 3261; CHECK-SD-LABEL: test_signed_v4f16_v4i100: 3262; CHECK-SD: // %bb.0: 3263; CHECK-SD-NEXT: sub sp, sp, #112 3264; CHECK-SD-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 3265; CHECK-SD-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 3266; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 3267; CHECK-SD-NEXT: stp x26, x25, [sp, #48] // 16-byte Folded Spill 3268; CHECK-SD-NEXT: stp x24, x23, [sp, #64] // 16-byte Folded Spill 3269; CHECK-SD-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill 3270; CHECK-SD-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill 3271; CHECK-SD-NEXT: .cfi_def_cfa_offset 112 3272; CHECK-SD-NEXT: .cfi_offset w19, -8 3273; CHECK-SD-NEXT: .cfi_offset w20, -16 3274; CHECK-SD-NEXT: .cfi_offset w21, -24 3275; CHECK-SD-NEXT: .cfi_offset w22, -32 3276; CHECK-SD-NEXT: .cfi_offset w23, -40 3277; CHECK-SD-NEXT: .cfi_offset w24, -48 3278; CHECK-SD-NEXT: .cfi_offset w25, -56 3279; CHECK-SD-NEXT: .cfi_offset w26, -64 3280; CHECK-SD-NEXT: .cfi_offset w30, -72 3281; CHECK-SD-NEXT: .cfi_offset b8, -80 3282; CHECK-SD-NEXT: .cfi_offset b9, -88 3283; CHECK-SD-NEXT: .cfi_offset b10, -96 3284; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 3285; CHECK-SD-NEXT: fcvt s8, h0 3286; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 3287; CHECK-SD-NEXT: fmov s0, s8 3288; CHECK-SD-NEXT: bl __fixsfti 3289; CHECK-SD-NEXT: movi v9.2s, #241, lsl #24 3290; CHECK-SD-NEXT: mov w8, #1895825407 // =0x70ffffff 3291; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 3292; CHECK-SD-NEXT: fmov s10, w8 3293; CHECK-SD-NEXT: mov x25, #-34359738368 // =0xfffffff800000000 3294; CHECK-SD-NEXT: mov x26, #34359738367 // =0x7ffffffff 3295; CHECK-SD-NEXT: mov h0, v0.h[1] 3296; CHECK-SD-NEXT: fcmp s8, s9 3297; CHECK-SD-NEXT: csel x8, xzr, x0, lt 3298; CHECK-SD-NEXT: csel x9, x25, x1, lt 3299; CHECK-SD-NEXT: fcmp s8, s10 3300; CHECK-SD-NEXT: csel x9, x26, x9, gt 3301; CHECK-SD-NEXT: csinv x8, x8, xzr, le 3302; CHECK-SD-NEXT: fcmp s8, s8 3303; CHECK-SD-NEXT: fcvt s8, h0 3304; CHECK-SD-NEXT: csel x19, xzr, x8, vs 3305; CHECK-SD-NEXT: csel x20, xzr, x9, vs 3306; CHECK-SD-NEXT: fmov s0, s8 3307; CHECK-SD-NEXT: bl __fixsfti 3308; CHECK-SD-NEXT: fcmp s8, s9 3309; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 3310; CHECK-SD-NEXT: mov h0, v0.h[2] 3311; CHECK-SD-NEXT: csel x8, xzr, x0, lt 3312; CHECK-SD-NEXT: csel x9, x25, x1, lt 3313; CHECK-SD-NEXT: fcmp s8, s10 3314; CHECK-SD-NEXT: csel x9, x26, x9, gt 3315; CHECK-SD-NEXT: csinv x8, x8, xzr, le 3316; CHECK-SD-NEXT: fcmp s8, s8 3317; CHECK-SD-NEXT: fcvt s8, h0 3318; CHECK-SD-NEXT: csel x21, xzr, x8, vs 3319; CHECK-SD-NEXT: csel x22, xzr, x9, vs 3320; CHECK-SD-NEXT: fmov s0, s8 3321; CHECK-SD-NEXT: bl __fixsfti 3322; CHECK-SD-NEXT: fcmp s8, s9 3323; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 3324; CHECK-SD-NEXT: mov h0, v0.h[3] 3325; CHECK-SD-NEXT: csel x8, xzr, x0, lt 3326; CHECK-SD-NEXT: csel x9, x25, x1, lt 3327; CHECK-SD-NEXT: fcmp s8, s10 3328; CHECK-SD-NEXT: csel x9, x26, x9, gt 3329; CHECK-SD-NEXT: csinv x8, x8, xzr, le 3330; CHECK-SD-NEXT: fcmp s8, s8 3331; CHECK-SD-NEXT: fcvt s8, h0 3332; CHECK-SD-NEXT: csel x23, xzr, x8, vs 3333; CHECK-SD-NEXT: csel x24, xzr, x9, vs 3334; CHECK-SD-NEXT: fmov s0, s8 3335; CHECK-SD-NEXT: bl __fixsfti 3336; CHECK-SD-NEXT: fcmp s8, s9 3337; CHECK-SD-NEXT: mov x2, x21 3338; CHECK-SD-NEXT: mov x3, x22 3339; CHECK-SD-NEXT: mov x4, x23 3340; CHECK-SD-NEXT: mov x5, x24 3341; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 3342; CHECK-SD-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload 3343; CHECK-SD-NEXT: csel x8, xzr, x0, lt 3344; CHECK-SD-NEXT: csel x9, x25, x1, lt 3345; CHECK-SD-NEXT: fcmp s8, s10 3346; CHECK-SD-NEXT: mov x0, x19 3347; CHECK-SD-NEXT: mov x1, x20 3348; CHECK-SD-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 3349; CHECK-SD-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload 3350; CHECK-SD-NEXT: csel x9, x26, x9, gt 3351; CHECK-SD-NEXT: csinv x8, x8, xzr, le 3352; CHECK-SD-NEXT: fcmp s8, s8 3353; CHECK-SD-NEXT: ldp x24, x23, [sp, #64] // 16-byte Folded Reload 3354; CHECK-SD-NEXT: ldp x26, x25, [sp, #48] // 16-byte Folded Reload 3355; CHECK-SD-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 3356; CHECK-SD-NEXT: csel x6, xzr, x8, vs 3357; CHECK-SD-NEXT: csel x7, xzr, x9, vs 3358; CHECK-SD-NEXT: add sp, sp, #112 3359; CHECK-SD-NEXT: ret 3360; 3361; CHECK-GI-CVT-LABEL: test_signed_v4f16_v4i100: 3362; CHECK-GI-CVT: // %bb.0: 3363; CHECK-GI-CVT-NEXT: // kill: def $d0 killed $d0 def $q0 3364; CHECK-GI-CVT-NEXT: mov h1, v0.h[1] 3365; CHECK-GI-CVT-NEXT: mov h2, v0.h[2] 3366; CHECK-GI-CVT-NEXT: mov x1, xzr 3367; CHECK-GI-CVT-NEXT: mov h3, v0.h[3] 3368; CHECK-GI-CVT-NEXT: fcvt s0, h0 3369; CHECK-GI-CVT-NEXT: mov x3, xzr 3370; CHECK-GI-CVT-NEXT: mov x5, xzr 3371; CHECK-GI-CVT-NEXT: mov x7, xzr 3372; CHECK-GI-CVT-NEXT: fcvt s1, h1 3373; CHECK-GI-CVT-NEXT: fcvt s2, h2 3374; CHECK-GI-CVT-NEXT: fcvt s3, h3 3375; CHECK-GI-CVT-NEXT: fcvtzs x0, s0 3376; CHECK-GI-CVT-NEXT: fcvtzs x2, s1 3377; CHECK-GI-CVT-NEXT: fcvtzs x4, s2 3378; CHECK-GI-CVT-NEXT: fcvtzs x6, s3 3379; CHECK-GI-CVT-NEXT: ret 3380; 3381; CHECK-GI-FP16-LABEL: test_signed_v4f16_v4i100: 3382; CHECK-GI-FP16: // %bb.0: 3383; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0 3384; CHECK-GI-FP16-NEXT: mov h1, v0.h[1] 3385; CHECK-GI-FP16-NEXT: mov h2, v0.h[2] 3386; CHECK-GI-FP16-NEXT: mov x1, xzr 3387; CHECK-GI-FP16-NEXT: mov h3, v0.h[3] 3388; CHECK-GI-FP16-NEXT: fcvtzs x0, h0 3389; CHECK-GI-FP16-NEXT: mov x3, xzr 3390; CHECK-GI-FP16-NEXT: mov x5, xzr 3391; CHECK-GI-FP16-NEXT: mov x7, xzr 3392; CHECK-GI-FP16-NEXT: fcvtzs x2, h1 3393; CHECK-GI-FP16-NEXT: fcvtzs x4, h2 3394; CHECK-GI-FP16-NEXT: fcvtzs x6, h3 3395; CHECK-GI-FP16-NEXT: ret 3396 %x = call <4 x i100> @llvm.fptosi.sat.v4f16.v4i100(<4 x half> %f) 3397 ret <4 x i100> %x 3398} 3399 3400define <4 x i128> @test_signed_v4f16_v4i128(<4 x half> %f) { 3401; CHECK-SD-LABEL: test_signed_v4f16_v4i128: 3402; CHECK-SD: // %bb.0: 3403; CHECK-SD-NEXT: sub sp, sp, #112 3404; CHECK-SD-NEXT: str d10, [sp, #16] // 8-byte Folded Spill 3405; CHECK-SD-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill 3406; CHECK-SD-NEXT: str x30, [sp, #40] // 8-byte Folded Spill 3407; CHECK-SD-NEXT: stp x26, x25, [sp, #48] // 16-byte Folded Spill 3408; CHECK-SD-NEXT: stp x24, x23, [sp, #64] // 16-byte Folded Spill 3409; CHECK-SD-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill 3410; CHECK-SD-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill 3411; CHECK-SD-NEXT: .cfi_def_cfa_offset 112 3412; CHECK-SD-NEXT: .cfi_offset w19, -8 3413; CHECK-SD-NEXT: .cfi_offset w20, -16 3414; CHECK-SD-NEXT: .cfi_offset w21, -24 3415; CHECK-SD-NEXT: .cfi_offset w22, -32 3416; CHECK-SD-NEXT: .cfi_offset w23, -40 3417; CHECK-SD-NEXT: .cfi_offset w24, -48 3418; CHECK-SD-NEXT: .cfi_offset w25, -56 3419; CHECK-SD-NEXT: .cfi_offset w26, -64 3420; CHECK-SD-NEXT: .cfi_offset w30, -72 3421; CHECK-SD-NEXT: .cfi_offset b8, -80 3422; CHECK-SD-NEXT: .cfi_offset b9, -88 3423; CHECK-SD-NEXT: .cfi_offset b10, -96 3424; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 3425; CHECK-SD-NEXT: fcvt s8, h0 3426; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 3427; CHECK-SD-NEXT: fmov s0, s8 3428; CHECK-SD-NEXT: bl __fixsfti 3429; CHECK-SD-NEXT: movi v9.2s, #255, lsl #24 3430; CHECK-SD-NEXT: mov w8, #2130706431 // =0x7effffff 3431; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 3432; CHECK-SD-NEXT: fmov s10, w8 3433; CHECK-SD-NEXT: mov x25, #-9223372036854775808 // =0x8000000000000000 3434; CHECK-SD-NEXT: mov x26, #9223372036854775807 // =0x7fffffffffffffff 3435; CHECK-SD-NEXT: mov h0, v0.h[1] 3436; CHECK-SD-NEXT: fcmp s8, s9 3437; CHECK-SD-NEXT: csel x8, xzr, x0, lt 3438; CHECK-SD-NEXT: csel x9, x25, x1, lt 3439; CHECK-SD-NEXT: fcmp s8, s10 3440; CHECK-SD-NEXT: csel x9, x26, x9, gt 3441; CHECK-SD-NEXT: csinv x8, x8, xzr, le 3442; CHECK-SD-NEXT: fcmp s8, s8 3443; CHECK-SD-NEXT: fcvt s8, h0 3444; CHECK-SD-NEXT: csel x19, xzr, x8, vs 3445; CHECK-SD-NEXT: csel x20, xzr, x9, vs 3446; CHECK-SD-NEXT: fmov s0, s8 3447; CHECK-SD-NEXT: bl __fixsfti 3448; CHECK-SD-NEXT: fcmp s8, s9 3449; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 3450; CHECK-SD-NEXT: mov h0, v0.h[2] 3451; CHECK-SD-NEXT: csel x8, xzr, x0, lt 3452; CHECK-SD-NEXT: csel x9, x25, x1, lt 3453; CHECK-SD-NEXT: fcmp s8, s10 3454; CHECK-SD-NEXT: csel x9, x26, x9, gt 3455; CHECK-SD-NEXT: csinv x8, x8, xzr, le 3456; CHECK-SD-NEXT: fcmp s8, s8 3457; CHECK-SD-NEXT: fcvt s8, h0 3458; CHECK-SD-NEXT: csel x21, xzr, x8, vs 3459; CHECK-SD-NEXT: csel x22, xzr, x9, vs 3460; CHECK-SD-NEXT: fmov s0, s8 3461; CHECK-SD-NEXT: bl __fixsfti 3462; CHECK-SD-NEXT: fcmp s8, s9 3463; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 3464; CHECK-SD-NEXT: mov h0, v0.h[3] 3465; CHECK-SD-NEXT: csel x8, xzr, x0, lt 3466; CHECK-SD-NEXT: csel x9, x25, x1, lt 3467; CHECK-SD-NEXT: fcmp s8, s10 3468; CHECK-SD-NEXT: csel x9, x26, x9, gt 3469; CHECK-SD-NEXT: csinv x8, x8, xzr, le 3470; CHECK-SD-NEXT: fcmp s8, s8 3471; CHECK-SD-NEXT: fcvt s8, h0 3472; CHECK-SD-NEXT: csel x23, xzr, x8, vs 3473; CHECK-SD-NEXT: csel x24, xzr, x9, vs 3474; CHECK-SD-NEXT: fmov s0, s8 3475; CHECK-SD-NEXT: bl __fixsfti 3476; CHECK-SD-NEXT: fcmp s8, s9 3477; CHECK-SD-NEXT: mov x2, x21 3478; CHECK-SD-NEXT: mov x3, x22 3479; CHECK-SD-NEXT: mov x4, x23 3480; CHECK-SD-NEXT: mov x5, x24 3481; CHECK-SD-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload 3482; CHECK-SD-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload 3483; CHECK-SD-NEXT: csel x8, xzr, x0, lt 3484; CHECK-SD-NEXT: csel x9, x25, x1, lt 3485; CHECK-SD-NEXT: fcmp s8, s10 3486; CHECK-SD-NEXT: mov x0, x19 3487; CHECK-SD-NEXT: mov x1, x20 3488; CHECK-SD-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload 3489; CHECK-SD-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload 3490; CHECK-SD-NEXT: csel x9, x26, x9, gt 3491; CHECK-SD-NEXT: csinv x8, x8, xzr, le 3492; CHECK-SD-NEXT: fcmp s8, s8 3493; CHECK-SD-NEXT: ldp x24, x23, [sp, #64] // 16-byte Folded Reload 3494; CHECK-SD-NEXT: ldp x26, x25, [sp, #48] // 16-byte Folded Reload 3495; CHECK-SD-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload 3496; CHECK-SD-NEXT: csel x6, xzr, x8, vs 3497; CHECK-SD-NEXT: csel x7, xzr, x9, vs 3498; CHECK-SD-NEXT: add sp, sp, #112 3499; CHECK-SD-NEXT: ret 3500; 3501; CHECK-GI-CVT-LABEL: test_signed_v4f16_v4i128: 3502; CHECK-GI-CVT: // %bb.0: 3503; CHECK-GI-CVT-NEXT: // kill: def $d0 killed $d0 def $q0 3504; CHECK-GI-CVT-NEXT: mov h1, v0.h[1] 3505; CHECK-GI-CVT-NEXT: mov h2, v0.h[2] 3506; CHECK-GI-CVT-NEXT: mov x1, xzr 3507; CHECK-GI-CVT-NEXT: mov h3, v0.h[3] 3508; CHECK-GI-CVT-NEXT: fcvt s0, h0 3509; CHECK-GI-CVT-NEXT: mov x3, xzr 3510; CHECK-GI-CVT-NEXT: mov x5, xzr 3511; CHECK-GI-CVT-NEXT: mov x7, xzr 3512; CHECK-GI-CVT-NEXT: fcvt s1, h1 3513; CHECK-GI-CVT-NEXT: fcvt s2, h2 3514; CHECK-GI-CVT-NEXT: fcvt s3, h3 3515; CHECK-GI-CVT-NEXT: fcvtzs x0, s0 3516; CHECK-GI-CVT-NEXT: fcvtzs x2, s1 3517; CHECK-GI-CVT-NEXT: fcvtzs x4, s2 3518; CHECK-GI-CVT-NEXT: fcvtzs x6, s3 3519; CHECK-GI-CVT-NEXT: ret 3520; 3521; CHECK-GI-FP16-LABEL: test_signed_v4f16_v4i128: 3522; CHECK-GI-FP16: // %bb.0: 3523; CHECK-GI-FP16-NEXT: // kill: def $d0 killed $d0 def $q0 3524; CHECK-GI-FP16-NEXT: mov h1, v0.h[1] 3525; CHECK-GI-FP16-NEXT: mov h2, v0.h[2] 3526; CHECK-GI-FP16-NEXT: mov x1, xzr 3527; CHECK-GI-FP16-NEXT: mov h3, v0.h[3] 3528; CHECK-GI-FP16-NEXT: fcvtzs x0, h0 3529; CHECK-GI-FP16-NEXT: mov x3, xzr 3530; CHECK-GI-FP16-NEXT: mov x5, xzr 3531; CHECK-GI-FP16-NEXT: mov x7, xzr 3532; CHECK-GI-FP16-NEXT: fcvtzs x2, h1 3533; CHECK-GI-FP16-NEXT: fcvtzs x4, h2 3534; CHECK-GI-FP16-NEXT: fcvtzs x6, h3 3535; CHECK-GI-FP16-NEXT: ret 3536 %x = call <4 x i128> @llvm.fptosi.sat.v4f16.v4i128(<4 x half> %f) 3537 ret <4 x i128> %x 3538} 3539 3540; 3541; 8-Vector half to signed integer -- result size variation 3542; 3543 3544declare <8 x i1> @llvm.fptosi.sat.v8f16.v8i1 (<8 x half>) 3545declare <8 x i8> @llvm.fptosi.sat.v8f16.v8i8 (<8 x half>) 3546declare <8 x i13> @llvm.fptosi.sat.v8f16.v8i13 (<8 x half>) 3547declare <8 x i16> @llvm.fptosi.sat.v8f16.v8i16 (<8 x half>) 3548declare <8 x i19> @llvm.fptosi.sat.v8f16.v8i19 (<8 x half>) 3549declare <8 x i50> @llvm.fptosi.sat.v8f16.v8i50 (<8 x half>) 3550declare <8 x i64> @llvm.fptosi.sat.v8f16.v8i64 (<8 x half>) 3551declare <8 x i100> @llvm.fptosi.sat.v8f16.v8i100(<8 x half>) 3552declare <8 x i128> @llvm.fptosi.sat.v8f16.v8i128(<8 x half>) 3553 3554define <8 x i1> @test_signed_v8f16_v8i1(<8 x half> %f) { 3555; CHECK-SD-CVT-LABEL: test_signed_v8f16_v8i1: 3556; CHECK-SD-CVT: // %bb.0: 3557; CHECK-SD-CVT-NEXT: fcvtl2 v2.4s, v0.8h 3558; CHECK-SD-CVT-NEXT: fcvtl v0.4s, v0.4h 3559; CHECK-SD-CVT-NEXT: movi v1.2d, #0000000000000000 3560; CHECK-SD-CVT-NEXT: movi v3.2d, #0xffffffffffffffff 3561; CHECK-SD-CVT-NEXT: fcvtzs v2.4s, v2.4s 3562; CHECK-SD-CVT-NEXT: fcvtzs v0.4s, v0.4s 3563; CHECK-SD-CVT-NEXT: smin v2.4s, v2.4s, v1.4s 3564; CHECK-SD-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 3565; CHECK-SD-CVT-NEXT: smax v1.4s, v2.4s, v3.4s 3566; CHECK-SD-CVT-NEXT: smax v0.4s, v0.4s, v3.4s 3567; CHECK-SD-CVT-NEXT: uzp1 v0.8h, v0.8h, v1.8h 3568; CHECK-SD-CVT-NEXT: xtn v0.8b, v0.8h 3569; CHECK-SD-CVT-NEXT: ret 3570; 3571; CHECK-SD-FP16-LABEL: test_signed_v8f16_v8i1: 3572; CHECK-SD-FP16: // %bb.0: 3573; CHECK-SD-FP16-NEXT: movi v1.2d, #0000000000000000 3574; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h 3575; CHECK-SD-FP16-NEXT: movi v2.2d, #0xffffffffffffffff 3576; CHECK-SD-FP16-NEXT: smin v0.8h, v0.8h, v1.8h 3577; CHECK-SD-FP16-NEXT: smax v0.8h, v0.8h, v2.8h 3578; CHECK-SD-FP16-NEXT: xtn v0.8b, v0.8h 3579; CHECK-SD-FP16-NEXT: ret 3580; 3581; CHECK-GI-CVT-LABEL: test_signed_v8f16_v8i1: 3582; CHECK-GI-CVT: // %bb.0: 3583; CHECK-GI-CVT-NEXT: fcvtl v2.4s, v0.4h 3584; CHECK-GI-CVT-NEXT: fcvtl2 v0.4s, v0.8h 3585; CHECK-GI-CVT-NEXT: movi v1.2d, #0000000000000000 3586; CHECK-GI-CVT-NEXT: movi v3.2d, #0xffffffffffffffff 3587; CHECK-GI-CVT-NEXT: fcvtzs v2.4s, v2.4s 3588; CHECK-GI-CVT-NEXT: fcvtzs v0.4s, v0.4s 3589; CHECK-GI-CVT-NEXT: smin v2.4s, v2.4s, v1.4s 3590; CHECK-GI-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 3591; CHECK-GI-CVT-NEXT: smax v1.4s, v2.4s, v3.4s 3592; CHECK-GI-CVT-NEXT: smax v0.4s, v0.4s, v3.4s 3593; CHECK-GI-CVT-NEXT: uzp1 v0.8h, v1.8h, v0.8h 3594; CHECK-GI-CVT-NEXT: xtn v0.8b, v0.8h 3595; CHECK-GI-CVT-NEXT: ret 3596; 3597; CHECK-GI-FP16-LABEL: test_signed_v8f16_v8i1: 3598; CHECK-GI-FP16: // %bb.0: 3599; CHECK-GI-FP16-NEXT: movi v1.2d, #0000000000000000 3600; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h 3601; CHECK-GI-FP16-NEXT: movi v2.2d, #0xffffffffffffffff 3602; CHECK-GI-FP16-NEXT: smin v0.8h, v0.8h, v1.8h 3603; CHECK-GI-FP16-NEXT: smax v0.8h, v0.8h, v2.8h 3604; CHECK-GI-FP16-NEXT: xtn v0.8b, v0.8h 3605; CHECK-GI-FP16-NEXT: ret 3606 %x = call <8 x i1> @llvm.fptosi.sat.v8f16.v8i1(<8 x half> %f) 3607 ret <8 x i1> %x 3608} 3609 3610define <8 x i8> @test_signed_v8f16_v8i8(<8 x half> %f) { 3611; CHECK-SD-CVT-LABEL: test_signed_v8f16_v8i8: 3612; CHECK-SD-CVT: // %bb.0: 3613; CHECK-SD-CVT-NEXT: fcvtl2 v2.4s, v0.8h 3614; CHECK-SD-CVT-NEXT: fcvtl v0.4s, v0.4h 3615; CHECK-SD-CVT-NEXT: movi v1.4s, #127 3616; CHECK-SD-CVT-NEXT: fcvtzs v2.4s, v2.4s 3617; CHECK-SD-CVT-NEXT: fcvtzs v0.4s, v0.4s 3618; CHECK-SD-CVT-NEXT: smin v2.4s, v2.4s, v1.4s 3619; CHECK-SD-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 3620; CHECK-SD-CVT-NEXT: mvni v1.4s, #127 3621; CHECK-SD-CVT-NEXT: smax v2.4s, v2.4s, v1.4s 3622; CHECK-SD-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 3623; CHECK-SD-CVT-NEXT: uzp1 v0.8h, v0.8h, v2.8h 3624; CHECK-SD-CVT-NEXT: xtn v0.8b, v0.8h 3625; CHECK-SD-CVT-NEXT: ret 3626; 3627; CHECK-SD-FP16-LABEL: test_signed_v8f16_v8i8: 3628; CHECK-SD-FP16: // %bb.0: 3629; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h 3630; CHECK-SD-FP16-NEXT: sqxtn v0.8b, v0.8h 3631; CHECK-SD-FP16-NEXT: ret 3632; 3633; CHECK-GI-CVT-LABEL: test_signed_v8f16_v8i8: 3634; CHECK-GI-CVT: // %bb.0: 3635; CHECK-GI-CVT-NEXT: fcvtl v2.4s, v0.4h 3636; CHECK-GI-CVT-NEXT: fcvtl2 v0.4s, v0.8h 3637; CHECK-GI-CVT-NEXT: movi v1.4s, #127 3638; CHECK-GI-CVT-NEXT: fcvtzs v2.4s, v2.4s 3639; CHECK-GI-CVT-NEXT: fcvtzs v0.4s, v0.4s 3640; CHECK-GI-CVT-NEXT: smin v2.4s, v2.4s, v1.4s 3641; CHECK-GI-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 3642; CHECK-GI-CVT-NEXT: mvni v1.4s, #127 3643; CHECK-GI-CVT-NEXT: smax v2.4s, v2.4s, v1.4s 3644; CHECK-GI-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 3645; CHECK-GI-CVT-NEXT: uzp1 v0.8h, v2.8h, v0.8h 3646; CHECK-GI-CVT-NEXT: xtn v0.8b, v0.8h 3647; CHECK-GI-CVT-NEXT: ret 3648; 3649; CHECK-GI-FP16-LABEL: test_signed_v8f16_v8i8: 3650; CHECK-GI-FP16: // %bb.0: 3651; CHECK-GI-FP16-NEXT: movi v1.8h, #127 3652; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h 3653; CHECK-GI-FP16-NEXT: mvni v2.8h, #127 3654; CHECK-GI-FP16-NEXT: smin v0.8h, v0.8h, v1.8h 3655; CHECK-GI-FP16-NEXT: smax v0.8h, v0.8h, v2.8h 3656; CHECK-GI-FP16-NEXT: xtn v0.8b, v0.8h 3657; CHECK-GI-FP16-NEXT: ret 3658 %x = call <8 x i8> @llvm.fptosi.sat.v8f16.v8i8(<8 x half> %f) 3659 ret <8 x i8> %x 3660} 3661 3662define <8 x i13> @test_signed_v8f16_v8i13(<8 x half> %f) { 3663; CHECK-SD-CVT-LABEL: test_signed_v8f16_v8i13: 3664; CHECK-SD-CVT: // %bb.0: 3665; CHECK-SD-CVT-NEXT: fcvtl2 v2.4s, v0.8h 3666; CHECK-SD-CVT-NEXT: fcvtl v0.4s, v0.4h 3667; CHECK-SD-CVT-NEXT: movi v1.4s, #15, msl #8 3668; CHECK-SD-CVT-NEXT: fcvtzs v2.4s, v2.4s 3669; CHECK-SD-CVT-NEXT: fcvtzs v0.4s, v0.4s 3670; CHECK-SD-CVT-NEXT: smin v2.4s, v2.4s, v1.4s 3671; CHECK-SD-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 3672; CHECK-SD-CVT-NEXT: mvni v1.4s, #15, msl #8 3673; CHECK-SD-CVT-NEXT: smax v2.4s, v2.4s, v1.4s 3674; CHECK-SD-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 3675; CHECK-SD-CVT-NEXT: uzp1 v0.8h, v0.8h, v2.8h 3676; CHECK-SD-CVT-NEXT: ret 3677; 3678; CHECK-SD-FP16-LABEL: test_signed_v8f16_v8i13: 3679; CHECK-SD-FP16: // %bb.0: 3680; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h 3681; CHECK-SD-FP16-NEXT: mvni v1.8h, #240, lsl #8 3682; CHECK-SD-FP16-NEXT: movi v2.8h, #240, lsl #8 3683; CHECK-SD-FP16-NEXT: smin v0.8h, v0.8h, v1.8h 3684; CHECK-SD-FP16-NEXT: smax v0.8h, v0.8h, v2.8h 3685; CHECK-SD-FP16-NEXT: ret 3686; 3687; CHECK-GI-CVT-LABEL: test_signed_v8f16_v8i13: 3688; CHECK-GI-CVT: // %bb.0: 3689; CHECK-GI-CVT-NEXT: fcvtl v2.4s, v0.4h 3690; CHECK-GI-CVT-NEXT: fcvtl2 v0.4s, v0.8h 3691; CHECK-GI-CVT-NEXT: movi v1.4s, #15, msl #8 3692; CHECK-GI-CVT-NEXT: fcvtzs v2.4s, v2.4s 3693; CHECK-GI-CVT-NEXT: fcvtzs v0.4s, v0.4s 3694; CHECK-GI-CVT-NEXT: smin v2.4s, v2.4s, v1.4s 3695; CHECK-GI-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 3696; CHECK-GI-CVT-NEXT: mvni v1.4s, #15, msl #8 3697; CHECK-GI-CVT-NEXT: smax v2.4s, v2.4s, v1.4s 3698; CHECK-GI-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 3699; CHECK-GI-CVT-NEXT: uzp1 v0.8h, v2.8h, v0.8h 3700; CHECK-GI-CVT-NEXT: ret 3701; 3702; CHECK-GI-FP16-LABEL: test_signed_v8f16_v8i13: 3703; CHECK-GI-FP16: // %bb.0: 3704; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h 3705; CHECK-GI-FP16-NEXT: mvni v1.8h, #240, lsl #8 3706; CHECK-GI-FP16-NEXT: movi v2.8h, #240, lsl #8 3707; CHECK-GI-FP16-NEXT: smin v0.8h, v0.8h, v1.8h 3708; CHECK-GI-FP16-NEXT: smax v0.8h, v0.8h, v2.8h 3709; CHECK-GI-FP16-NEXT: ret 3710 %x = call <8 x i13> @llvm.fptosi.sat.v8f16.v8i13(<8 x half> %f) 3711 ret <8 x i13> %x 3712} 3713 3714define <8 x i16> @test_signed_v8f16_v8i16(<8 x half> %f) { 3715; CHECK-SD-CVT-LABEL: test_signed_v8f16_v8i16: 3716; CHECK-SD-CVT: // %bb.0: 3717; CHECK-SD-CVT-NEXT: fcvtl v1.4s, v0.4h 3718; CHECK-SD-CVT-NEXT: fcvtl2 v2.4s, v0.8h 3719; CHECK-SD-CVT-NEXT: fcvtzs v1.4s, v1.4s 3720; CHECK-SD-CVT-NEXT: sqxtn v0.4h, v1.4s 3721; CHECK-SD-CVT-NEXT: fcvtzs v1.4s, v2.4s 3722; CHECK-SD-CVT-NEXT: sqxtn2 v0.8h, v1.4s 3723; CHECK-SD-CVT-NEXT: ret 3724; 3725; CHECK-SD-FP16-LABEL: test_signed_v8f16_v8i16: 3726; CHECK-SD-FP16: // %bb.0: 3727; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h 3728; CHECK-SD-FP16-NEXT: ret 3729; 3730; CHECK-GI-CVT-LABEL: test_signed_v8f16_v8i16: 3731; CHECK-GI-CVT: // %bb.0: 3732; CHECK-GI-CVT-NEXT: fcvtl v2.4s, v0.4h 3733; CHECK-GI-CVT-NEXT: fcvtl2 v0.4s, v0.8h 3734; CHECK-GI-CVT-NEXT: movi v1.4s, #127, msl #8 3735; CHECK-GI-CVT-NEXT: fcvtzs v2.4s, v2.4s 3736; CHECK-GI-CVT-NEXT: fcvtzs v0.4s, v0.4s 3737; CHECK-GI-CVT-NEXT: smin v2.4s, v2.4s, v1.4s 3738; CHECK-GI-CVT-NEXT: smin v0.4s, v0.4s, v1.4s 3739; CHECK-GI-CVT-NEXT: mvni v1.4s, #127, msl #8 3740; CHECK-GI-CVT-NEXT: smax v2.4s, v2.4s, v1.4s 3741; CHECK-GI-CVT-NEXT: smax v0.4s, v0.4s, v1.4s 3742; CHECK-GI-CVT-NEXT: uzp1 v0.8h, v2.8h, v0.8h 3743; CHECK-GI-CVT-NEXT: ret 3744; 3745; CHECK-GI-FP16-LABEL: test_signed_v8f16_v8i16: 3746; CHECK-GI-FP16: // %bb.0: 3747; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h 3748; CHECK-GI-FP16-NEXT: ret 3749 %x = call <8 x i16> @llvm.fptosi.sat.v8f16.v8i16(<8 x half> %f) 3750 ret <8 x i16> %x 3751} 3752 3753define <8 x i19> @test_signed_v8f16_v8i19(<8 x half> %f) { 3754; CHECK-LABEL: test_signed_v8f16_v8i19: 3755; CHECK: // %bb.0: 3756; CHECK-NEXT: fcvtl v2.4s, v0.4h 3757; CHECK-NEXT: fcvtl2 v0.4s, v0.8h 3758; CHECK-NEXT: movi v1.4s, #3, msl #16 3759; CHECK-NEXT: mvni v3.4s, #3, msl #16 3760; CHECK-NEXT: fcvtzs v2.4s, v2.4s 3761; CHECK-NEXT: fcvtzs v0.4s, v0.4s 3762; CHECK-NEXT: smin v2.4s, v2.4s, v1.4s 3763; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s 3764; CHECK-NEXT: smax v1.4s, v2.4s, v3.4s 3765; CHECK-NEXT: smax v0.4s, v0.4s, v3.4s 3766; CHECK-NEXT: mov w1, v1.s[1] 3767; CHECK-NEXT: mov w2, v1.s[2] 3768; CHECK-NEXT: mov w3, v1.s[3] 3769; CHECK-NEXT: mov w5, v0.s[1] 3770; CHECK-NEXT: mov w6, v0.s[2] 3771; CHECK-NEXT: mov w7, v0.s[3] 3772; CHECK-NEXT: fmov w4, s0 3773; CHECK-NEXT: fmov w0, s1 3774; CHECK-NEXT: ret 3775 %x = call <8 x i19> @llvm.fptosi.sat.v8f16.v8i19(<8 x half> %f) 3776 ret <8 x i19> %x 3777} 3778 3779define <8 x i32> @test_signed_v8f16_v8i32_duplicate(<8 x half> %f) { 3780; CHECK-SD-LABEL: test_signed_v8f16_v8i32_duplicate: 3781; CHECK-SD: // %bb.0: 3782; CHECK-SD-NEXT: fcvtl2 v1.4s, v0.8h 3783; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h 3784; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s 3785; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 3786; CHECK-SD-NEXT: ret 3787; 3788; CHECK-GI-LABEL: test_signed_v8f16_v8i32_duplicate: 3789; CHECK-GI: // %bb.0: 3790; CHECK-GI-NEXT: fcvtl v1.4s, v0.4h 3791; CHECK-GI-NEXT: fcvtl2 v2.4s, v0.8h 3792; CHECK-GI-NEXT: fcvtzs v0.4s, v1.4s 3793; CHECK-GI-NEXT: fcvtzs v1.4s, v2.4s 3794; CHECK-GI-NEXT: ret 3795 %x = call <8 x i32> @llvm.fptosi.sat.v8f16.v8i32(<8 x half> %f) 3796 ret <8 x i32> %x 3797} 3798 3799define <8 x i50> @test_signed_v8f16_v8i50(<8 x half> %f) { 3800; CHECK-SD-CVT-LABEL: test_signed_v8f16_v8i50: 3801; CHECK-SD-CVT: // %bb.0: 3802; CHECK-SD-CVT-NEXT: ext v1.16b, v0.16b, v0.16b, #8 3803; CHECK-SD-CVT-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 3804; CHECK-SD-CVT-NEXT: mov x9, #-562949953421312 // =0xfffe000000000000 3805; CHECK-SD-CVT-NEXT: mov h2, v1.h[1] 3806; CHECK-SD-CVT-NEXT: fcvt s3, h1 3807; CHECK-SD-CVT-NEXT: mov h4, v1.h[2] 3808; CHECK-SD-CVT-NEXT: mov h1, v1.h[3] 3809; CHECK-SD-CVT-NEXT: fcvt s2, h2 3810; CHECK-SD-CVT-NEXT: fcvtzs x10, s3 3811; CHECK-SD-CVT-NEXT: fcvt s3, h4 3812; CHECK-SD-CVT-NEXT: fcvt s1, h1 3813; CHECK-SD-CVT-NEXT: fcvtzs x11, s2 3814; CHECK-SD-CVT-NEXT: cmp x10, x8 3815; CHECK-SD-CVT-NEXT: fcvtzs x12, s3 3816; CHECK-SD-CVT-NEXT: csel x10, x10, x8, lt 3817; CHECK-SD-CVT-NEXT: mov h2, v0.h[1] 3818; CHECK-SD-CVT-NEXT: fcvt s3, h0 3819; CHECK-SD-CVT-NEXT: cmp x10, x9 3820; CHECK-SD-CVT-NEXT: csel x4, x10, x9, gt 3821; CHECK-SD-CVT-NEXT: cmp x11, x8 3822; CHECK-SD-CVT-NEXT: csel x10, x11, x8, lt 3823; CHECK-SD-CVT-NEXT: fcvtzs x11, s1 3824; CHECK-SD-CVT-NEXT: mov h1, v0.h[2] 3825; CHECK-SD-CVT-NEXT: cmp x10, x9 3826; CHECK-SD-CVT-NEXT: fcvt s2, h2 3827; CHECK-SD-CVT-NEXT: mov h0, v0.h[3] 3828; CHECK-SD-CVT-NEXT: csel x5, x10, x9, gt 3829; CHECK-SD-CVT-NEXT: cmp x12, x8 3830; CHECK-SD-CVT-NEXT: csel x10, x12, x8, lt 3831; CHECK-SD-CVT-NEXT: fcvtzs x12, s3 3832; CHECK-SD-CVT-NEXT: cmp x10, x9 3833; CHECK-SD-CVT-NEXT: fcvt s1, h1 3834; CHECK-SD-CVT-NEXT: csel x6, x10, x9, gt 3835; CHECK-SD-CVT-NEXT: cmp x11, x8 3836; CHECK-SD-CVT-NEXT: fcvt s0, h0 3837; CHECK-SD-CVT-NEXT: csel x10, x11, x8, lt 3838; CHECK-SD-CVT-NEXT: fcvtzs x11, s2 3839; CHECK-SD-CVT-NEXT: cmp x10, x9 3840; CHECK-SD-CVT-NEXT: csel x7, x10, x9, gt 3841; CHECK-SD-CVT-NEXT: cmp x12, x8 3842; CHECK-SD-CVT-NEXT: csel x10, x12, x8, lt 3843; CHECK-SD-CVT-NEXT: fcvtzs x12, s1 3844; CHECK-SD-CVT-NEXT: cmp x10, x9 3845; CHECK-SD-CVT-NEXT: csel x0, x10, x9, gt 3846; CHECK-SD-CVT-NEXT: cmp x11, x8 3847; CHECK-SD-CVT-NEXT: csel x10, x11, x8, lt 3848; CHECK-SD-CVT-NEXT: fcvtzs x11, s0 3849; CHECK-SD-CVT-NEXT: cmp x10, x9 3850; CHECK-SD-CVT-NEXT: csel x1, x10, x9, gt 3851; CHECK-SD-CVT-NEXT: cmp x12, x8 3852; CHECK-SD-CVT-NEXT: csel x10, x12, x8, lt 3853; CHECK-SD-CVT-NEXT: cmp x10, x9 3854; CHECK-SD-CVT-NEXT: csel x2, x10, x9, gt 3855; CHECK-SD-CVT-NEXT: cmp x11, x8 3856; CHECK-SD-CVT-NEXT: csel x8, x11, x8, lt 3857; CHECK-SD-CVT-NEXT: cmp x8, x9 3858; CHECK-SD-CVT-NEXT: csel x3, x8, x9, gt 3859; CHECK-SD-CVT-NEXT: ret 3860; 3861; CHECK-SD-FP16-LABEL: test_signed_v8f16_v8i50: 3862; CHECK-SD-FP16: // %bb.0: 3863; CHECK-SD-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8 3864; CHECK-SD-FP16-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 3865; CHECK-SD-FP16-NEXT: mov x9, #-562949953421312 // =0xfffe000000000000 3866; CHECK-SD-FP16-NEXT: mov h2, v1.h[1] 3867; CHECK-SD-FP16-NEXT: fcvtzs x10, h1 3868; CHECK-SD-FP16-NEXT: mov h3, v1.h[2] 3869; CHECK-SD-FP16-NEXT: mov h1, v1.h[3] 3870; CHECK-SD-FP16-NEXT: fcvtzs x11, h2 3871; CHECK-SD-FP16-NEXT: cmp x10, x8 3872; CHECK-SD-FP16-NEXT: fcvtzs x12, h3 3873; CHECK-SD-FP16-NEXT: csel x10, x10, x8, lt 3874; CHECK-SD-FP16-NEXT: mov h2, v0.h[2] 3875; CHECK-SD-FP16-NEXT: cmp x10, x9 3876; CHECK-SD-FP16-NEXT: csel x4, x10, x9, gt 3877; CHECK-SD-FP16-NEXT: cmp x11, x8 3878; CHECK-SD-FP16-NEXT: csel x10, x11, x8, lt 3879; CHECK-SD-FP16-NEXT: fcvtzs x11, h1 3880; CHECK-SD-FP16-NEXT: mov h1, v0.h[1] 3881; CHECK-SD-FP16-NEXT: cmp x10, x9 3882; CHECK-SD-FP16-NEXT: csel x5, x10, x9, gt 3883; CHECK-SD-FP16-NEXT: cmp x12, x8 3884; CHECK-SD-FP16-NEXT: csel x10, x12, x8, lt 3885; CHECK-SD-FP16-NEXT: fcvtzs x12, h0 3886; CHECK-SD-FP16-NEXT: mov h0, v0.h[3] 3887; CHECK-SD-FP16-NEXT: cmp x10, x9 3888; CHECK-SD-FP16-NEXT: csel x6, x10, x9, gt 3889; CHECK-SD-FP16-NEXT: cmp x11, x8 3890; CHECK-SD-FP16-NEXT: csel x10, x11, x8, lt 3891; CHECK-SD-FP16-NEXT: fcvtzs x11, h1 3892; CHECK-SD-FP16-NEXT: cmp x10, x9 3893; CHECK-SD-FP16-NEXT: csel x7, x10, x9, gt 3894; CHECK-SD-FP16-NEXT: cmp x12, x8 3895; CHECK-SD-FP16-NEXT: csel x10, x12, x8, lt 3896; CHECK-SD-FP16-NEXT: fcvtzs x12, h2 3897; CHECK-SD-FP16-NEXT: cmp x10, x9 3898; CHECK-SD-FP16-NEXT: csel x0, x10, x9, gt 3899; CHECK-SD-FP16-NEXT: cmp x11, x8 3900; CHECK-SD-FP16-NEXT: csel x10, x11, x8, lt 3901; CHECK-SD-FP16-NEXT: fcvtzs x11, h0 3902; CHECK-SD-FP16-NEXT: cmp x10, x9 3903; CHECK-SD-FP16-NEXT: csel x1, x10, x9, gt 3904; CHECK-SD-FP16-NEXT: cmp x12, x8 3905; CHECK-SD-FP16-NEXT: csel x10, x12, x8, lt 3906; CHECK-SD-FP16-NEXT: cmp x10, x9 3907; CHECK-SD-FP16-NEXT: csel x2, x10, x9, gt 3908; CHECK-SD-FP16-NEXT: cmp x11, x8 3909; CHECK-SD-FP16-NEXT: csel x8, x11, x8, lt 3910; CHECK-SD-FP16-NEXT: cmp x8, x9 3911; CHECK-SD-FP16-NEXT: csel x3, x8, x9, gt 3912; CHECK-SD-FP16-NEXT: ret 3913; 3914; CHECK-GI-CVT-LABEL: test_signed_v8f16_v8i50: 3915; CHECK-GI-CVT: // %bb.0: 3916; CHECK-GI-CVT-NEXT: ext v1.16b, v0.16b, v0.16b, #8 3917; CHECK-GI-CVT-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 3918; CHECK-GI-CVT-NEXT: mov x9, #-562949953421312 // =0xfffe000000000000 3919; CHECK-GI-CVT-NEXT: mov h2, v1.h[1] 3920; CHECK-GI-CVT-NEXT: fcvt s3, h1 3921; CHECK-GI-CVT-NEXT: mov h4, v1.h[2] 3922; CHECK-GI-CVT-NEXT: mov h1, v1.h[3] 3923; CHECK-GI-CVT-NEXT: fcvt s2, h2 3924; CHECK-GI-CVT-NEXT: fcvtzs x10, s3 3925; CHECK-GI-CVT-NEXT: fcvt s3, h4 3926; CHECK-GI-CVT-NEXT: fcvt s1, h1 3927; CHECK-GI-CVT-NEXT: fcvtzs x11, s2 3928; CHECK-GI-CVT-NEXT: cmp x10, x8 3929; CHECK-GI-CVT-NEXT: fcvtzs x12, s3 3930; CHECK-GI-CVT-NEXT: csel x10, x10, x8, lt 3931; CHECK-GI-CVT-NEXT: mov h2, v0.h[1] 3932; CHECK-GI-CVT-NEXT: fcvt s3, h0 3933; CHECK-GI-CVT-NEXT: cmp x10, x9 3934; CHECK-GI-CVT-NEXT: csel x4, x10, x9, gt 3935; CHECK-GI-CVT-NEXT: cmp x11, x8 3936; CHECK-GI-CVT-NEXT: csel x10, x11, x8, lt 3937; CHECK-GI-CVT-NEXT: fcvtzs x11, s1 3938; CHECK-GI-CVT-NEXT: mov h1, v0.h[2] 3939; CHECK-GI-CVT-NEXT: cmp x10, x9 3940; CHECK-GI-CVT-NEXT: fcvt s2, h2 3941; CHECK-GI-CVT-NEXT: mov h0, v0.h[3] 3942; CHECK-GI-CVT-NEXT: csel x5, x10, x9, gt 3943; CHECK-GI-CVT-NEXT: cmp x12, x8 3944; CHECK-GI-CVT-NEXT: csel x10, x12, x8, lt 3945; CHECK-GI-CVT-NEXT: fcvtzs x12, s3 3946; CHECK-GI-CVT-NEXT: cmp x10, x9 3947; CHECK-GI-CVT-NEXT: fcvt s1, h1 3948; CHECK-GI-CVT-NEXT: csel x6, x10, x9, gt 3949; CHECK-GI-CVT-NEXT: cmp x11, x8 3950; CHECK-GI-CVT-NEXT: fcvt s0, h0 3951; CHECK-GI-CVT-NEXT: csel x10, x11, x8, lt 3952; CHECK-GI-CVT-NEXT: fcvtzs x11, s2 3953; CHECK-GI-CVT-NEXT: cmp x10, x9 3954; CHECK-GI-CVT-NEXT: csel x7, x10, x9, gt 3955; CHECK-GI-CVT-NEXT: cmp x12, x8 3956; CHECK-GI-CVT-NEXT: csel x10, x12, x8, lt 3957; CHECK-GI-CVT-NEXT: fcvtzs x12, s1 3958; CHECK-GI-CVT-NEXT: cmp x10, x9 3959; CHECK-GI-CVT-NEXT: csel x0, x10, x9, gt 3960; CHECK-GI-CVT-NEXT: cmp x11, x8 3961; CHECK-GI-CVT-NEXT: csel x10, x11, x8, lt 3962; CHECK-GI-CVT-NEXT: fcvtzs x11, s0 3963; CHECK-GI-CVT-NEXT: cmp x10, x9 3964; CHECK-GI-CVT-NEXT: csel x1, x10, x9, gt 3965; CHECK-GI-CVT-NEXT: cmp x12, x8 3966; CHECK-GI-CVT-NEXT: csel x10, x12, x8, lt 3967; CHECK-GI-CVT-NEXT: cmp x10, x9 3968; CHECK-GI-CVT-NEXT: csel x2, x10, x9, gt 3969; CHECK-GI-CVT-NEXT: cmp x11, x8 3970; CHECK-GI-CVT-NEXT: csel x8, x11, x8, lt 3971; CHECK-GI-CVT-NEXT: cmp x8, x9 3972; CHECK-GI-CVT-NEXT: csel x3, x8, x9, gt 3973; CHECK-GI-CVT-NEXT: ret 3974; 3975; CHECK-GI-FP16-LABEL: test_signed_v8f16_v8i50: 3976; CHECK-GI-FP16: // %bb.0: 3977; CHECK-GI-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8 3978; CHECK-GI-FP16-NEXT: mov x8, #562949953421311 // =0x1ffffffffffff 3979; CHECK-GI-FP16-NEXT: mov x9, #-562949953421312 // =0xfffe000000000000 3980; CHECK-GI-FP16-NEXT: mov h2, v1.h[1] 3981; CHECK-GI-FP16-NEXT: fcvtzs x10, h1 3982; CHECK-GI-FP16-NEXT: mov h3, v1.h[2] 3983; CHECK-GI-FP16-NEXT: mov h1, v1.h[3] 3984; CHECK-GI-FP16-NEXT: fcvtzs x11, h2 3985; CHECK-GI-FP16-NEXT: cmp x10, x8 3986; CHECK-GI-FP16-NEXT: fcvtzs x12, h3 3987; CHECK-GI-FP16-NEXT: csel x10, x10, x8, lt 3988; CHECK-GI-FP16-NEXT: mov h2, v0.h[2] 3989; CHECK-GI-FP16-NEXT: cmp x10, x9 3990; CHECK-GI-FP16-NEXT: csel x4, x10, x9, gt 3991; CHECK-GI-FP16-NEXT: cmp x11, x8 3992; CHECK-GI-FP16-NEXT: csel x10, x11, x8, lt 3993; CHECK-GI-FP16-NEXT: fcvtzs x11, h1 3994; CHECK-GI-FP16-NEXT: mov h1, v0.h[1] 3995; CHECK-GI-FP16-NEXT: cmp x10, x9 3996; CHECK-GI-FP16-NEXT: csel x5, x10, x9, gt 3997; CHECK-GI-FP16-NEXT: cmp x12, x8 3998; CHECK-GI-FP16-NEXT: csel x10, x12, x8, lt 3999; CHECK-GI-FP16-NEXT: fcvtzs x12, h0 4000; CHECK-GI-FP16-NEXT: mov h0, v0.h[3] 4001; CHECK-GI-FP16-NEXT: cmp x10, x9 4002; CHECK-GI-FP16-NEXT: csel x6, x10, x9, gt 4003; CHECK-GI-FP16-NEXT: cmp x11, x8 4004; CHECK-GI-FP16-NEXT: csel x10, x11, x8, lt 4005; CHECK-GI-FP16-NEXT: fcvtzs x11, h1 4006; CHECK-GI-FP16-NEXT: cmp x10, x9 4007; CHECK-GI-FP16-NEXT: csel x7, x10, x9, gt 4008; CHECK-GI-FP16-NEXT: cmp x12, x8 4009; CHECK-GI-FP16-NEXT: csel x10, x12, x8, lt 4010; CHECK-GI-FP16-NEXT: fcvtzs x12, h2 4011; CHECK-GI-FP16-NEXT: cmp x10, x9 4012; CHECK-GI-FP16-NEXT: csel x0, x10, x9, gt 4013; CHECK-GI-FP16-NEXT: cmp x11, x8 4014; CHECK-GI-FP16-NEXT: csel x10, x11, x8, lt 4015; CHECK-GI-FP16-NEXT: fcvtzs x11, h0 4016; CHECK-GI-FP16-NEXT: cmp x10, x9 4017; CHECK-GI-FP16-NEXT: csel x1, x10, x9, gt 4018; CHECK-GI-FP16-NEXT: cmp x12, x8 4019; CHECK-GI-FP16-NEXT: csel x10, x12, x8, lt 4020; CHECK-GI-FP16-NEXT: cmp x10, x9 4021; CHECK-GI-FP16-NEXT: csel x2, x10, x9, gt 4022; CHECK-GI-FP16-NEXT: cmp x11, x8 4023; CHECK-GI-FP16-NEXT: csel x8, x11, x8, lt 4024; CHECK-GI-FP16-NEXT: cmp x8, x9 4025; CHECK-GI-FP16-NEXT: csel x3, x8, x9, gt 4026; CHECK-GI-FP16-NEXT: ret 4027 %x = call <8 x i50> @llvm.fptosi.sat.v8f16.v8i50(<8 x half> %f) 4028 ret <8 x i50> %x 4029} 4030 4031define <8 x i64> @test_signed_v8f16_v8i64(<8 x half> %f) { 4032; CHECK-SD-CVT-LABEL: test_signed_v8f16_v8i64: 4033; CHECK-SD-CVT: // %bb.0: 4034; CHECK-SD-CVT-NEXT: ext v1.16b, v0.16b, v0.16b, #8 4035; CHECK-SD-CVT-NEXT: mov h4, v0.h[2] 4036; CHECK-SD-CVT-NEXT: mov h3, v0.h[1] 4037; CHECK-SD-CVT-NEXT: mov h7, v0.h[3] 4038; CHECK-SD-CVT-NEXT: fcvt s0, h0 4039; CHECK-SD-CVT-NEXT: mov h2, v1.h[2] 4040; CHECK-SD-CVT-NEXT: mov h5, v1.h[1] 4041; CHECK-SD-CVT-NEXT: mov h6, v1.h[3] 4042; CHECK-SD-CVT-NEXT: fcvt s1, h1 4043; CHECK-SD-CVT-NEXT: fcvt s4, h4 4044; CHECK-SD-CVT-NEXT: fcvt s3, h3 4045; CHECK-SD-CVT-NEXT: fcvt s7, h7 4046; CHECK-SD-CVT-NEXT: fcvtzs x9, s0 4047; CHECK-SD-CVT-NEXT: fcvt s2, h2 4048; CHECK-SD-CVT-NEXT: fcvt s5, h5 4049; CHECK-SD-CVT-NEXT: fcvt s6, h6 4050; CHECK-SD-CVT-NEXT: fcvtzs x8, s1 4051; CHECK-SD-CVT-NEXT: fcvtzs x12, s4 4052; CHECK-SD-CVT-NEXT: fcvtzs x11, s3 4053; CHECK-SD-CVT-NEXT: fcvtzs x15, s7 4054; CHECK-SD-CVT-NEXT: fmov d0, x9 4055; CHECK-SD-CVT-NEXT: fcvtzs x10, s2 4056; CHECK-SD-CVT-NEXT: fcvtzs x13, s5 4057; CHECK-SD-CVT-NEXT: fcvtzs x14, s6 4058; CHECK-SD-CVT-NEXT: fmov d2, x8 4059; CHECK-SD-CVT-NEXT: fmov d1, x12 4060; CHECK-SD-CVT-NEXT: mov v0.d[1], x11 4061; CHECK-SD-CVT-NEXT: fmov d3, x10 4062; CHECK-SD-CVT-NEXT: mov v2.d[1], x13 4063; CHECK-SD-CVT-NEXT: mov v1.d[1], x15 4064; CHECK-SD-CVT-NEXT: mov v3.d[1], x14 4065; CHECK-SD-CVT-NEXT: ret 4066; 4067; CHECK-SD-FP16-LABEL: test_signed_v8f16_v8i64: 4068; CHECK-SD-FP16: // %bb.0: 4069; CHECK-SD-FP16-NEXT: ext v1.16b, v0.16b, v0.16b, #8 4070; CHECK-SD-FP16-NEXT: mov h4, v0.h[2] 4071; CHECK-SD-FP16-NEXT: mov h3, v0.h[1] 4072; CHECK-SD-FP16-NEXT: mov h7, v0.h[3] 4073; CHECK-SD-FP16-NEXT: fcvtzs x9, h0 4074; CHECK-SD-FP16-NEXT: mov h2, v1.h[2] 4075; CHECK-SD-FP16-NEXT: mov h5, v1.h[1] 4076; CHECK-SD-FP16-NEXT: mov h6, v1.h[3] 4077; CHECK-SD-FP16-NEXT: fcvtzs x8, h1 4078; CHECK-SD-FP16-NEXT: fcvtzs x12, h4 4079; CHECK-SD-FP16-NEXT: fcvtzs x11, h3 4080; CHECK-SD-FP16-NEXT: fcvtzs x15, h7 4081; CHECK-SD-FP16-NEXT: fmov d0, x9 4082; CHECK-SD-FP16-NEXT: fcvtzs x10, h2 4083; CHECK-SD-FP16-NEXT: fcvtzs x13, h5 4084; CHECK-SD-FP16-NEXT: fcvtzs x14, h6 4085; CHECK-SD-FP16-NEXT: fmov d2, x8 4086; CHECK-SD-FP16-NEXT: fmov d1, x12 4087; CHECK-SD-FP16-NEXT: mov v0.d[1], x11 4088; CHECK-SD-FP16-NEXT: fmov d3, x10 4089; CHECK-SD-FP16-NEXT: mov v2.d[1], x13 4090; CHECK-SD-FP16-NEXT: mov v1.d[1], x15 4091; CHECK-SD-FP16-NEXT: mov v3.d[1], x14 4092; CHECK-SD-FP16-NEXT: ret 4093; 4094; CHECK-GI-CVT-LABEL: test_signed_v8f16_v8i64: 4095; CHECK-GI-CVT: // %bb.0: 4096; CHECK-GI-CVT-NEXT: fcvtl v1.4s, v0.4h 4097; CHECK-GI-CVT-NEXT: fcvtl2 v0.4s, v0.8h 4098; CHECK-GI-CVT-NEXT: fcvtl v2.2d, v1.2s 4099; CHECK-GI-CVT-NEXT: fcvtl2 v1.2d, v1.4s 4100; CHECK-GI-CVT-NEXT: fcvtl v3.2d, v0.2s 4101; CHECK-GI-CVT-NEXT: fcvtl2 v4.2d, v0.4s 4102; CHECK-GI-CVT-NEXT: fcvtzs v0.2d, v2.2d 4103; CHECK-GI-CVT-NEXT: fcvtzs v1.2d, v1.2d 4104; CHECK-GI-CVT-NEXT: fcvtzs v2.2d, v3.2d 4105; CHECK-GI-CVT-NEXT: fcvtzs v3.2d, v4.2d 4106; CHECK-GI-CVT-NEXT: ret 4107; 4108; CHECK-GI-FP16-LABEL: test_signed_v8f16_v8i64: 4109; CHECK-GI-FP16: // %bb.0: 4110; CHECK-GI-FP16-NEXT: mov h1, v0.h[1] 4111; CHECK-GI-FP16-NEXT: mov h2, v0.h[2] 4112; CHECK-GI-FP16-NEXT: mov h3, v0.h[3] 4113; CHECK-GI-FP16-NEXT: mov h4, v0.h[4] 4114; CHECK-GI-FP16-NEXT: mov h5, v0.h[5] 4115; CHECK-GI-FP16-NEXT: mov h6, v0.h[6] 4116; CHECK-GI-FP16-NEXT: mov h7, v0.h[7] 4117; CHECK-GI-FP16-NEXT: fcvt d0, h0 4118; CHECK-GI-FP16-NEXT: fcvt d1, h1 4119; CHECK-GI-FP16-NEXT: fcvt d2, h2 4120; CHECK-GI-FP16-NEXT: fcvt d3, h3 4121; CHECK-GI-FP16-NEXT: fcvt d4, h4 4122; CHECK-GI-FP16-NEXT: fcvt d5, h5 4123; CHECK-GI-FP16-NEXT: fcvt d6, h6 4124; CHECK-GI-FP16-NEXT: fcvt d7, h7 4125; CHECK-GI-FP16-NEXT: mov v0.d[1], v1.d[0] 4126; CHECK-GI-FP16-NEXT: mov v2.d[1], v3.d[0] 4127; CHECK-GI-FP16-NEXT: mov v4.d[1], v5.d[0] 4128; CHECK-GI-FP16-NEXT: mov v6.d[1], v7.d[0] 4129; CHECK-GI-FP16-NEXT: fcvtzs v0.2d, v0.2d 4130; CHECK-GI-FP16-NEXT: fcvtzs v1.2d, v2.2d 4131; CHECK-GI-FP16-NEXT: fcvtzs v2.2d, v4.2d 4132; CHECK-GI-FP16-NEXT: fcvtzs v3.2d, v6.2d 4133; CHECK-GI-FP16-NEXT: ret 4134 %x = call <8 x i64> @llvm.fptosi.sat.v8f16.v8i64(<8 x half> %f) 4135 ret <8 x i64> %x 4136} 4137 4138define <8 x i100> @test_signed_v8f16_v8i100(<8 x half> %f) { 4139; CHECK-SD-LABEL: test_signed_v8f16_v8i100: 4140; CHECK-SD: // %bb.0: 4141; CHECK-SD-NEXT: sub sp, sp, #192 4142; CHECK-SD-NEXT: str d10, [sp, #64] // 8-byte Folded Spill 4143; CHECK-SD-NEXT: stp d9, d8, [sp, #80] // 16-byte Folded Spill 4144; CHECK-SD-NEXT: stp x29, x30, [sp, #96] // 16-byte Folded Spill 4145; CHECK-SD-NEXT: stp x28, x27, [sp, #112] // 16-byte Folded Spill 4146; CHECK-SD-NEXT: stp x26, x25, [sp, #128] // 16-byte Folded Spill 4147; CHECK-SD-NEXT: stp x24, x23, [sp, #144] // 16-byte Folded Spill 4148; CHECK-SD-NEXT: stp x22, x21, [sp, #160] // 16-byte Folded Spill 4149; CHECK-SD-NEXT: stp x20, x19, [sp, #176] // 16-byte Folded Spill 4150; CHECK-SD-NEXT: .cfi_def_cfa_offset 192 4151; CHECK-SD-NEXT: .cfi_offset w19, -8 4152; CHECK-SD-NEXT: .cfi_offset w20, -16 4153; CHECK-SD-NEXT: .cfi_offset w21, -24 4154; CHECK-SD-NEXT: .cfi_offset w22, -32 4155; CHECK-SD-NEXT: .cfi_offset w23, -40 4156; CHECK-SD-NEXT: .cfi_offset w24, -48 4157; CHECK-SD-NEXT: .cfi_offset w25, -56 4158; CHECK-SD-NEXT: .cfi_offset w26, -64 4159; CHECK-SD-NEXT: .cfi_offset w27, -72 4160; CHECK-SD-NEXT: .cfi_offset w28, -80 4161; CHECK-SD-NEXT: .cfi_offset w30, -88 4162; CHECK-SD-NEXT: .cfi_offset w29, -96 4163; CHECK-SD-NEXT: .cfi_offset b8, -104 4164; CHECK-SD-NEXT: .cfi_offset b9, -112 4165; CHECK-SD-NEXT: .cfi_offset b10, -128 4166; CHECK-SD-NEXT: str q0, [sp, #48] // 16-byte Folded Spill 4167; CHECK-SD-NEXT: ext v0.16b, v0.16b, v0.16b, #8 4168; CHECK-SD-NEXT: mov x19, x8 4169; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill 4170; CHECK-SD-NEXT: mov h0, v0.h[1] 4171; CHECK-SD-NEXT: fcvt s8, h0 4172; CHECK-SD-NEXT: fmov s0, s8 4173; CHECK-SD-NEXT: bl __fixsfti 4174; CHECK-SD-NEXT: movi v10.2s, #241, lsl #24 4175; CHECK-SD-NEXT: mov w8, #1895825407 // =0x70ffffff 4176; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 4177; CHECK-SD-NEXT: fmov s9, w8 4178; CHECK-SD-NEXT: mov x22, #-34359738368 // =0xfffffff800000000 4179; CHECK-SD-NEXT: mov x23, #34359738367 // =0x7ffffffff 4180; CHECK-SD-NEXT: mov h0, v0.h[3] 4181; CHECK-SD-NEXT: fcmp s8, s10 4182; CHECK-SD-NEXT: csel x8, x22, x1, lt 4183; CHECK-SD-NEXT: csel x9, xzr, x0, lt 4184; CHECK-SD-NEXT: fcmp s8, s9 4185; CHECK-SD-NEXT: csinv x9, x9, xzr, le 4186; CHECK-SD-NEXT: csel x8, x23, x8, gt 4187; CHECK-SD-NEXT: fcmp s8, s8 4188; CHECK-SD-NEXT: fcvt s8, h0 4189; CHECK-SD-NEXT: csel x8, xzr, x8, vs 4190; CHECK-SD-NEXT: str x8, [sp, #72] // 8-byte Folded Spill 4191; CHECK-SD-NEXT: csel x8, xzr, x9, vs 4192; CHECK-SD-NEXT: fmov s0, s8 4193; CHECK-SD-NEXT: str x8, [sp, #24] // 8-byte Folded Spill 4194; CHECK-SD-NEXT: bl __fixsfti 4195; CHECK-SD-NEXT: fcmp s8, s10 4196; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 4197; CHECK-SD-NEXT: csel x8, xzr, x0, lt 4198; CHECK-SD-NEXT: csel x9, x22, x1, lt 4199; CHECK-SD-NEXT: fcmp s8, s9 4200; CHECK-SD-NEXT: csel x9, x23, x9, gt 4201; CHECK-SD-NEXT: csinv x8, x8, xzr, le 4202; CHECK-SD-NEXT: fcmp s8, s8 4203; CHECK-SD-NEXT: fcvt s8, h0 4204; CHECK-SD-NEXT: csel x10, xzr, x8, vs 4205; CHECK-SD-NEXT: csel x8, xzr, x9, vs 4206; CHECK-SD-NEXT: stp x8, x10, [sp, #8] // 16-byte Folded Spill 4207; CHECK-SD-NEXT: fmov s0, s8 4208; CHECK-SD-NEXT: bl __fixsfti 4209; CHECK-SD-NEXT: fcmp s8, s10 4210; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 4211; CHECK-SD-NEXT: mov h0, v0.h[2] 4212; CHECK-SD-NEXT: csel x8, x22, x1, lt 4213; CHECK-SD-NEXT: csel x9, xzr, x0, lt 4214; CHECK-SD-NEXT: fcmp s8, s9 4215; CHECK-SD-NEXT: csinv x9, x9, xzr, le 4216; CHECK-SD-NEXT: csel x8, x23, x8, gt 4217; CHECK-SD-NEXT: fcmp s8, s8 4218; CHECK-SD-NEXT: fcvt s8, h0 4219; CHECK-SD-NEXT: csel x26, xzr, x8, vs 4220; CHECK-SD-NEXT: csel x8, xzr, x9, vs 4221; CHECK-SD-NEXT: str x8, [sp, #32] // 8-byte Folded Spill 4222; CHECK-SD-NEXT: fmov s0, s8 4223; CHECK-SD-NEXT: bl __fixsfti 4224; CHECK-SD-NEXT: fcmp s8, s10 4225; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 4226; CHECK-SD-NEXT: mov h0, v0.h[1] 4227; CHECK-SD-NEXT: csel x8, x22, x1, lt 4228; CHECK-SD-NEXT: csel x9, xzr, x0, lt 4229; CHECK-SD-NEXT: fcmp s8, s9 4230; CHECK-SD-NEXT: csinv x9, x9, xzr, le 4231; CHECK-SD-NEXT: csel x8, x23, x8, gt 4232; CHECK-SD-NEXT: fcmp s8, s8 4233; CHECK-SD-NEXT: fcvt s8, h0 4234; CHECK-SD-NEXT: csel x27, xzr, x8, vs 4235; CHECK-SD-NEXT: csel x8, xzr, x9, vs 4236; CHECK-SD-NEXT: str x8, [sp] // 8-byte Folded Spill 4237; CHECK-SD-NEXT: fmov s0, s8 4238; CHECK-SD-NEXT: bl __fixsfti 4239; CHECK-SD-NEXT: fcmp s8, s10 4240; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 4241; CHECK-SD-NEXT: mov h0, v0.h[3] 4242; CHECK-SD-NEXT: csel x8, x22, x1, lt 4243; CHECK-SD-NEXT: csel x9, xzr, x0, lt 4244; CHECK-SD-NEXT: fcmp s8, s9 4245; CHECK-SD-NEXT: csinv x9, x9, xzr, le 4246; CHECK-SD-NEXT: csel x8, x23, x8, gt 4247; CHECK-SD-NEXT: fcmp s8, s8 4248; CHECK-SD-NEXT: fcvt s8, h0 4249; CHECK-SD-NEXT: csel x20, xzr, x8, vs 4250; CHECK-SD-NEXT: csel x21, xzr, x9, vs 4251; CHECK-SD-NEXT: fmov s0, s8 4252; CHECK-SD-NEXT: bl __fixsfti 4253; CHECK-SD-NEXT: fcmp s8, s10 4254; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 4255; CHECK-SD-NEXT: csel x8, xzr, x0, lt 4256; CHECK-SD-NEXT: csel x9, x22, x1, lt 4257; CHECK-SD-NEXT: fcmp s8, s9 4258; CHECK-SD-NEXT: csel x9, x23, x9, gt 4259; CHECK-SD-NEXT: csinv x8, x8, xzr, le 4260; CHECK-SD-NEXT: fcmp s8, s8 4261; CHECK-SD-NEXT: fcvt s8, h0 4262; CHECK-SD-NEXT: csel x28, xzr, x8, vs 4263; CHECK-SD-NEXT: csel x24, xzr, x9, vs 4264; CHECK-SD-NEXT: fmov s0, s8 4265; CHECK-SD-NEXT: bl __fixsfti 4266; CHECK-SD-NEXT: fcmp s8, s10 4267; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 4268; CHECK-SD-NEXT: mov h0, v0.h[2] 4269; CHECK-SD-NEXT: csel x8, x22, x1, lt 4270; CHECK-SD-NEXT: csel x9, xzr, x0, lt 4271; CHECK-SD-NEXT: fcmp s8, s9 4272; CHECK-SD-NEXT: csinv x9, x9, xzr, le 4273; CHECK-SD-NEXT: csel x8, x23, x8, gt 4274; CHECK-SD-NEXT: fcmp s8, s8 4275; CHECK-SD-NEXT: fcvt s8, h0 4276; CHECK-SD-NEXT: csel x25, xzr, x8, vs 4277; CHECK-SD-NEXT: csel x29, xzr, x9, vs 4278; CHECK-SD-NEXT: fmov s0, s8 4279; CHECK-SD-NEXT: bl __fixsfti 4280; CHECK-SD-NEXT: ldr x9, [sp] // 8-byte Folded Reload 4281; CHECK-SD-NEXT: extr x8, x24, x28, #28 4282; CHECK-SD-NEXT: fcmp s8, s10 4283; CHECK-SD-NEXT: bfi x25, x21, #36, #28 4284; CHECK-SD-NEXT: lsr x11, x20, #28 4285; CHECK-SD-NEXT: stur x9, [x19, #75] 4286; CHECK-SD-NEXT: extr x9, x20, x21, #28 4287; CHECK-SD-NEXT: stur x8, [x19, #41] 4288; CHECK-SD-NEXT: csel x8, x22, x1, lt 4289; CHECK-SD-NEXT: str x9, [x19, #16] 4290; CHECK-SD-NEXT: csel x9, xzr, x0, lt 4291; CHECK-SD-NEXT: fcmp s8, s9 4292; CHECK-SD-NEXT: ldr x10, [sp, #32] // 8-byte Folded Reload 4293; CHECK-SD-NEXT: stp x29, x25, [x19] 4294; CHECK-SD-NEXT: stur x10, [x19, #50] 4295; CHECK-SD-NEXT: lsr x10, x24, #28 4296; CHECK-SD-NEXT: csinv x9, x9, xzr, le 4297; CHECK-SD-NEXT: csel x8, x23, x8, gt 4298; CHECK-SD-NEXT: fcmp s8, s8 4299; CHECK-SD-NEXT: strb w10, [x19, #49] 4300; CHECK-SD-NEXT: ldp x14, x12, [sp, #8] // 16-byte Folded Reload 4301; CHECK-SD-NEXT: strb w11, [x19, #24] 4302; CHECK-SD-NEXT: csel x8, xzr, x8, vs 4303; CHECK-SD-NEXT: ldr x13, [sp, #24] // 8-byte Folded Reload 4304; CHECK-SD-NEXT: csel x9, xzr, x9, vs 4305; CHECK-SD-NEXT: bfi x8, x28, #36, #28 4306; CHECK-SD-NEXT: extr x10, x14, x12, #28 4307; CHECK-SD-NEXT: bfi x27, x12, #36, #28 4308; CHECK-SD-NEXT: ldr x12, [sp, #72] // 8-byte Folded Reload 4309; CHECK-SD-NEXT: bfi x26, x13, #36, #28 4310; CHECK-SD-NEXT: stur x9, [x19, #25] 4311; CHECK-SD-NEXT: lsr x9, x14, #28 4312; CHECK-SD-NEXT: extr x11, x12, x13, #28 4313; CHECK-SD-NEXT: stur x8, [x19, #33] 4314; CHECK-SD-NEXT: lsr x8, x12, #28 4315; CHECK-SD-NEXT: stur x10, [x19, #91] 4316; CHECK-SD-NEXT: stur x27, [x19, #83] 4317; CHECK-SD-NEXT: stur x11, [x19, #66] 4318; CHECK-SD-NEXT: stur x26, [x19, #58] 4319; CHECK-SD-NEXT: strb w9, [x19, #99] 4320; CHECK-SD-NEXT: strb w8, [x19, #74] 4321; CHECK-SD-NEXT: ldp x20, x19, [sp, #176] // 16-byte Folded Reload 4322; CHECK-SD-NEXT: ldr d10, [sp, #64] // 8-byte Folded Reload 4323; CHECK-SD-NEXT: ldp x22, x21, [sp, #160] // 16-byte Folded Reload 4324; CHECK-SD-NEXT: ldp x24, x23, [sp, #144] // 16-byte Folded Reload 4325; CHECK-SD-NEXT: ldp x26, x25, [sp, #128] // 16-byte Folded Reload 4326; CHECK-SD-NEXT: ldp x28, x27, [sp, #112] // 16-byte Folded Reload 4327; CHECK-SD-NEXT: ldp x29, x30, [sp, #96] // 16-byte Folded Reload 4328; CHECK-SD-NEXT: ldp d9, d8, [sp, #80] // 16-byte Folded Reload 4329; CHECK-SD-NEXT: add sp, sp, #192 4330; CHECK-SD-NEXT: ret 4331; 4332; CHECK-GI-CVT-LABEL: test_signed_v8f16_v8i100: 4333; CHECK-GI-CVT: // %bb.0: 4334; CHECK-GI-CVT-NEXT: mov h1, v0.h[1] 4335; CHECK-GI-CVT-NEXT: mov h2, v0.h[2] 4336; CHECK-GI-CVT-NEXT: mov x11, x8 4337; CHECK-GI-CVT-NEXT: fcvt s3, h0 4338; CHECK-GI-CVT-NEXT: mov h4, v0.h[3] 4339; CHECK-GI-CVT-NEXT: str wzr, [x8, #8] 4340; CHECK-GI-CVT-NEXT: strb wzr, [x8, #12] 4341; CHECK-GI-CVT-NEXT: fcvt s1, h1 4342; CHECK-GI-CVT-NEXT: fcvt s2, h2 4343; CHECK-GI-CVT-NEXT: fcvtzs x9, s3 4344; CHECK-GI-CVT-NEXT: fcvt s3, h4 4345; CHECK-GI-CVT-NEXT: fcvtzs x10, s1 4346; CHECK-GI-CVT-NEXT: mov h1, v0.h[4] 4347; CHECK-GI-CVT-NEXT: fcvtzs x12, s2 4348; CHECK-GI-CVT-NEXT: mov h2, v0.h[5] 4349; CHECK-GI-CVT-NEXT: str x9, [x8] 4350; CHECK-GI-CVT-NEXT: mov x9, x8 4351; CHECK-GI-CVT-NEXT: fcvt s1, h1 4352; CHECK-GI-CVT-NEXT: str x10, [x11, #12]! 4353; CHECK-GI-CVT-NEXT: fcvtzs x10, s3 4354; CHECK-GI-CVT-NEXT: mov h3, v0.h[6] 4355; CHECK-GI-CVT-NEXT: fcvt s2, h2 4356; CHECK-GI-CVT-NEXT: mov h0, v0.h[7] 4357; CHECK-GI-CVT-NEXT: str wzr, [x11, #8] 4358; CHECK-GI-CVT-NEXT: strb wzr, [x11, #12] 4359; CHECK-GI-CVT-NEXT: mov x11, x8 4360; CHECK-GI-CVT-NEXT: str x12, [x9, #25]! 4361; CHECK-GI-CVT-NEXT: fcvtzs x12, s1 4362; CHECK-GI-CVT-NEXT: str wzr, [x9, #8] 4363; CHECK-GI-CVT-NEXT: fcvt s1, h3 4364; CHECK-GI-CVT-NEXT: strb wzr, [x9, #12] 4365; CHECK-GI-CVT-NEXT: fcvt s0, h0 4366; CHECK-GI-CVT-NEXT: mov x9, x8 4367; CHECK-GI-CVT-NEXT: str x10, [x11, #37]! 4368; CHECK-GI-CVT-NEXT: fcvtzs x10, s2 4369; CHECK-GI-CVT-NEXT: str wzr, [x11, #8] 4370; CHECK-GI-CVT-NEXT: strb wzr, [x11, #12] 4371; CHECK-GI-CVT-NEXT: fcvtzs x11, s1 4372; CHECK-GI-CVT-NEXT: str x12, [x9, #50]! 4373; CHECK-GI-CVT-NEXT: str wzr, [x9, #8] 4374; CHECK-GI-CVT-NEXT: strb wzr, [x9, #12] 4375; CHECK-GI-CVT-NEXT: mov x9, x8 4376; CHECK-GI-CVT-NEXT: str x10, [x9, #62]! 4377; CHECK-GI-CVT-NEXT: fcvtzs x10, s0 4378; CHECK-GI-CVT-NEXT: str wzr, [x9, #8] 4379; CHECK-GI-CVT-NEXT: strb wzr, [x9, #12] 4380; CHECK-GI-CVT-NEXT: mov x9, x8 4381; CHECK-GI-CVT-NEXT: str x11, [x9, #75]! 4382; CHECK-GI-CVT-NEXT: str wzr, [x9, #8] 4383; CHECK-GI-CVT-NEXT: strb wzr, [x9, #12] 4384; CHECK-GI-CVT-NEXT: str x10, [x8, #87]! 4385; CHECK-GI-CVT-NEXT: str wzr, [x8, #8] 4386; CHECK-GI-CVT-NEXT: strb wzr, [x8, #12] 4387; CHECK-GI-CVT-NEXT: ret 4388; 4389; CHECK-GI-FP16-LABEL: test_signed_v8f16_v8i100: 4390; CHECK-GI-FP16: // %bb.0: 4391; CHECK-GI-FP16-NEXT: mov h1, v0.h[1] 4392; CHECK-GI-FP16-NEXT: mov h2, v0.h[2] 4393; CHECK-GI-FP16-NEXT: mov x11, x8 4394; CHECK-GI-FP16-NEXT: fcvtzs x9, h0 4395; CHECK-GI-FP16-NEXT: str wzr, [x8, #8] 4396; CHECK-GI-FP16-NEXT: strb wzr, [x8, #12] 4397; CHECK-GI-FP16-NEXT: fcvtzs x10, h1 4398; CHECK-GI-FP16-NEXT: mov h1, v0.h[3] 4399; CHECK-GI-FP16-NEXT: fcvtzs x12, h2 4400; CHECK-GI-FP16-NEXT: mov h2, v0.h[4] 4401; CHECK-GI-FP16-NEXT: str x9, [x8] 4402; CHECK-GI-FP16-NEXT: mov x9, x8 4403; CHECK-GI-FP16-NEXT: str x10, [x11, #12]! 4404; CHECK-GI-FP16-NEXT: fcvtzs x10, h1 4405; CHECK-GI-FP16-NEXT: mov h1, v0.h[5] 4406; CHECK-GI-FP16-NEXT: str wzr, [x11, #8] 4407; CHECK-GI-FP16-NEXT: strb wzr, [x11, #12] 4408; CHECK-GI-FP16-NEXT: mov x11, x8 4409; CHECK-GI-FP16-NEXT: str x12, [x9, #25]! 4410; CHECK-GI-FP16-NEXT: fcvtzs x12, h2 4411; CHECK-GI-FP16-NEXT: str wzr, [x9, #8] 4412; CHECK-GI-FP16-NEXT: mov h2, v0.h[6] 4413; CHECK-GI-FP16-NEXT: mov h0, v0.h[7] 4414; CHECK-GI-FP16-NEXT: strb wzr, [x9, #12] 4415; CHECK-GI-FP16-NEXT: fcvtzs x9, h1 4416; CHECK-GI-FP16-NEXT: str x10, [x11, #37]! 4417; CHECK-GI-FP16-NEXT: mov x10, x8 4418; CHECK-GI-FP16-NEXT: str wzr, [x11, #8] 4419; CHECK-GI-FP16-NEXT: strb wzr, [x11, #12] 4420; CHECK-GI-FP16-NEXT: fcvtzs x11, h2 4421; CHECK-GI-FP16-NEXT: str x12, [x10, #50]! 4422; CHECK-GI-FP16-NEXT: str wzr, [x10, #8] 4423; CHECK-GI-FP16-NEXT: strb wzr, [x10, #12] 4424; CHECK-GI-FP16-NEXT: mov x10, x8 4425; CHECK-GI-FP16-NEXT: str x9, [x10, #62]! 4426; CHECK-GI-FP16-NEXT: fcvtzs x9, h0 4427; CHECK-GI-FP16-NEXT: str wzr, [x10, #8] 4428; CHECK-GI-FP16-NEXT: strb wzr, [x10, #12] 4429; CHECK-GI-FP16-NEXT: mov x10, x8 4430; CHECK-GI-FP16-NEXT: str x11, [x10, #75]! 4431; CHECK-GI-FP16-NEXT: str wzr, [x10, #8] 4432; CHECK-GI-FP16-NEXT: strb wzr, [x10, #12] 4433; CHECK-GI-FP16-NEXT: str x9, [x8, #87]! 4434; CHECK-GI-FP16-NEXT: str wzr, [x8, #8] 4435; CHECK-GI-FP16-NEXT: strb wzr, [x8, #12] 4436; CHECK-GI-FP16-NEXT: ret 4437 %x = call <8 x i100> @llvm.fptosi.sat.v8f16.v8i100(<8 x half> %f) 4438 ret <8 x i100> %x 4439} 4440 4441define <8 x i128> @test_signed_v8f16_v8i128(<8 x half> %f) { 4442; CHECK-SD-LABEL: test_signed_v8f16_v8i128: 4443; CHECK-SD: // %bb.0: 4444; CHECK-SD-NEXT: sub sp, sp, #192 4445; CHECK-SD-NEXT: str d10, [sp, #64] // 8-byte Folded Spill 4446; CHECK-SD-NEXT: stp d9, d8, [sp, #80] // 16-byte Folded Spill 4447; CHECK-SD-NEXT: stp x29, x30, [sp, #96] // 16-byte Folded Spill 4448; CHECK-SD-NEXT: stp x28, x27, [sp, #112] // 16-byte Folded Spill 4449; CHECK-SD-NEXT: stp x26, x25, [sp, #128] // 16-byte Folded Spill 4450; CHECK-SD-NEXT: stp x24, x23, [sp, #144] // 16-byte Folded Spill 4451; CHECK-SD-NEXT: stp x22, x21, [sp, #160] // 16-byte Folded Spill 4452; CHECK-SD-NEXT: stp x20, x19, [sp, #176] // 16-byte Folded Spill 4453; CHECK-SD-NEXT: .cfi_def_cfa_offset 192 4454; CHECK-SD-NEXT: .cfi_offset w19, -8 4455; CHECK-SD-NEXT: .cfi_offset w20, -16 4456; CHECK-SD-NEXT: .cfi_offset w21, -24 4457; CHECK-SD-NEXT: .cfi_offset w22, -32 4458; CHECK-SD-NEXT: .cfi_offset w23, -40 4459; CHECK-SD-NEXT: .cfi_offset w24, -48 4460; CHECK-SD-NEXT: .cfi_offset w25, -56 4461; CHECK-SD-NEXT: .cfi_offset w26, -64 4462; CHECK-SD-NEXT: .cfi_offset w27, -72 4463; CHECK-SD-NEXT: .cfi_offset w28, -80 4464; CHECK-SD-NEXT: .cfi_offset w30, -88 4465; CHECK-SD-NEXT: .cfi_offset w29, -96 4466; CHECK-SD-NEXT: .cfi_offset b8, -104 4467; CHECK-SD-NEXT: .cfi_offset b9, -112 4468; CHECK-SD-NEXT: .cfi_offset b10, -128 4469; CHECK-SD-NEXT: str q0, [sp, #48] // 16-byte Folded Spill 4470; CHECK-SD-NEXT: ext v0.16b, v0.16b, v0.16b, #8 4471; CHECK-SD-NEXT: mov x19, x8 4472; CHECK-SD-NEXT: fcvt s8, h0 4473; CHECK-SD-NEXT: str q0, [sp, #32] // 16-byte Folded Spill 4474; CHECK-SD-NEXT: fmov s0, s8 4475; CHECK-SD-NEXT: bl __fixsfti 4476; CHECK-SD-NEXT: movi v9.2s, #255, lsl #24 4477; CHECK-SD-NEXT: mov w8, #2130706431 // =0x7effffff 4478; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 4479; CHECK-SD-NEXT: fmov s10, w8 4480; CHECK-SD-NEXT: mov x22, #-9223372036854775808 // =0x8000000000000000 4481; CHECK-SD-NEXT: mov x23, #9223372036854775807 // =0x7fffffffffffffff 4482; CHECK-SD-NEXT: mov h0, v0.h[1] 4483; CHECK-SD-NEXT: fcmp s8, s9 4484; CHECK-SD-NEXT: csel x8, xzr, x0, lt 4485; CHECK-SD-NEXT: csel x9, x22, x1, lt 4486; CHECK-SD-NEXT: fcmp s8, s10 4487; CHECK-SD-NEXT: csel x9, x23, x9, gt 4488; CHECK-SD-NEXT: csinv x8, x8, xzr, le 4489; CHECK-SD-NEXT: fcmp s8, s8 4490; CHECK-SD-NEXT: fcvt s8, h0 4491; CHECK-SD-NEXT: csel x8, xzr, x8, vs 4492; CHECK-SD-NEXT: str x8, [sp, #72] // 8-byte Folded Spill 4493; CHECK-SD-NEXT: csel x8, xzr, x9, vs 4494; CHECK-SD-NEXT: fmov s0, s8 4495; CHECK-SD-NEXT: str x8, [sp, #24] // 8-byte Folded Spill 4496; CHECK-SD-NEXT: bl __fixsfti 4497; CHECK-SD-NEXT: fcmp s8, s9 4498; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 4499; CHECK-SD-NEXT: mov h0, v0.h[2] 4500; CHECK-SD-NEXT: csel x8, xzr, x0, lt 4501; CHECK-SD-NEXT: csel x9, x22, x1, lt 4502; CHECK-SD-NEXT: fcmp s8, s10 4503; CHECK-SD-NEXT: csel x9, x23, x9, gt 4504; CHECK-SD-NEXT: csinv x8, x8, xzr, le 4505; CHECK-SD-NEXT: fcmp s8, s8 4506; CHECK-SD-NEXT: fcvt s8, h0 4507; CHECK-SD-NEXT: csel x10, xzr, x8, vs 4508; CHECK-SD-NEXT: csel x8, xzr, x9, vs 4509; CHECK-SD-NEXT: stp x8, x10, [sp, #8] // 16-byte Folded Spill 4510; CHECK-SD-NEXT: fmov s0, s8 4511; CHECK-SD-NEXT: bl __fixsfti 4512; CHECK-SD-NEXT: fcmp s8, s9 4513; CHECK-SD-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload 4514; CHECK-SD-NEXT: mov h0, v0.h[3] 4515; CHECK-SD-NEXT: csel x8, xzr, x0, lt 4516; CHECK-SD-NEXT: csel x9, x22, x1, lt 4517; CHECK-SD-NEXT: fcmp s8, s10 4518; CHECK-SD-NEXT: csel x9, x23, x9, gt 4519; CHECK-SD-NEXT: csinv x8, x8, xzr, le 4520; CHECK-SD-NEXT: fcmp s8, s8 4521; CHECK-SD-NEXT: fcvt s8, h0 4522; CHECK-SD-NEXT: csel x8, xzr, x8, vs 4523; CHECK-SD-NEXT: str x8, [sp, #32] // 8-byte Folded Spill 4524; CHECK-SD-NEXT: csel x8, xzr, x9, vs 4525; CHECK-SD-NEXT: fmov s0, s8 4526; CHECK-SD-NEXT: str x8, [sp] // 8-byte Folded Spill 4527; CHECK-SD-NEXT: bl __fixsfti 4528; CHECK-SD-NEXT: fcmp s8, s9 4529; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 4530; CHECK-SD-NEXT: csel x8, xzr, x0, lt 4531; CHECK-SD-NEXT: csel x9, x22, x1, lt 4532; CHECK-SD-NEXT: fcmp s8, s10 4533; CHECK-SD-NEXT: csel x9, x23, x9, gt 4534; CHECK-SD-NEXT: csinv x8, x8, xzr, le 4535; CHECK-SD-NEXT: fcmp s8, s8 4536; CHECK-SD-NEXT: fcvt s8, h0 4537; CHECK-SD-NEXT: csel x28, xzr, x8, vs 4538; CHECK-SD-NEXT: csel x29, xzr, x9, vs 4539; CHECK-SD-NEXT: fmov s0, s8 4540; CHECK-SD-NEXT: bl __fixsfti 4541; CHECK-SD-NEXT: fcmp s8, s9 4542; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 4543; CHECK-SD-NEXT: mov h0, v0.h[1] 4544; CHECK-SD-NEXT: csel x8, xzr, x0, lt 4545; CHECK-SD-NEXT: csel x9, x22, x1, lt 4546; CHECK-SD-NEXT: fcmp s8, s10 4547; CHECK-SD-NEXT: csel x9, x23, x9, gt 4548; CHECK-SD-NEXT: csinv x8, x8, xzr, le 4549; CHECK-SD-NEXT: fcmp s8, s8 4550; CHECK-SD-NEXT: fcvt s8, h0 4551; CHECK-SD-NEXT: csel x20, xzr, x8, vs 4552; CHECK-SD-NEXT: csel x21, xzr, x9, vs 4553; CHECK-SD-NEXT: fmov s0, s8 4554; CHECK-SD-NEXT: bl __fixsfti 4555; CHECK-SD-NEXT: fcmp s8, s9 4556; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 4557; CHECK-SD-NEXT: mov h0, v0.h[2] 4558; CHECK-SD-NEXT: csel x8, xzr, x0, lt 4559; CHECK-SD-NEXT: csel x9, x22, x1, lt 4560; CHECK-SD-NEXT: fcmp s8, s10 4561; CHECK-SD-NEXT: csel x9, x23, x9, gt 4562; CHECK-SD-NEXT: csinv x8, x8, xzr, le 4563; CHECK-SD-NEXT: fcmp s8, s8 4564; CHECK-SD-NEXT: fcvt s8, h0 4565; CHECK-SD-NEXT: csel x24, xzr, x8, vs 4566; CHECK-SD-NEXT: csel x25, xzr, x9, vs 4567; CHECK-SD-NEXT: fmov s0, s8 4568; CHECK-SD-NEXT: bl __fixsfti 4569; CHECK-SD-NEXT: fcmp s8, s9 4570; CHECK-SD-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload 4571; CHECK-SD-NEXT: mov h0, v0.h[3] 4572; CHECK-SD-NEXT: csel x8, xzr, x0, lt 4573; CHECK-SD-NEXT: csel x9, x22, x1, lt 4574; CHECK-SD-NEXT: fcmp s8, s10 4575; CHECK-SD-NEXT: csel x9, x23, x9, gt 4576; CHECK-SD-NEXT: csinv x8, x8, xzr, le 4577; CHECK-SD-NEXT: fcmp s8, s8 4578; CHECK-SD-NEXT: fcvt s8, h0 4579; CHECK-SD-NEXT: csel x26, xzr, x8, vs 4580; CHECK-SD-NEXT: csel x27, xzr, x9, vs 4581; CHECK-SD-NEXT: fmov s0, s8 4582; CHECK-SD-NEXT: bl __fixsfti 4583; CHECK-SD-NEXT: fcmp s8, s9 4584; CHECK-SD-NEXT: stp x26, x27, [x19, #32] 4585; CHECK-SD-NEXT: stp x24, x25, [x19, #16] 4586; CHECK-SD-NEXT: stp x20, x21, [x19] 4587; CHECK-SD-NEXT: csel x8, xzr, x0, lt 4588; CHECK-SD-NEXT: csel x9, x22, x1, lt 4589; CHECK-SD-NEXT: fcmp s8, s10 4590; CHECK-SD-NEXT: stp x28, x29, [x19, #112] 4591; CHECK-SD-NEXT: csel x9, x23, x9, gt 4592; CHECK-SD-NEXT: csinv x8, x8, xzr, le 4593; CHECK-SD-NEXT: fcmp s8, s8 4594; CHECK-SD-NEXT: csel x9, xzr, x9, vs 4595; CHECK-SD-NEXT: csel x8, xzr, x8, vs 4596; CHECK-SD-NEXT: stp x8, x9, [x19, #48] 4597; CHECK-SD-NEXT: ldr x8, [sp] // 8-byte Folded Reload 4598; CHECK-SD-NEXT: str x8, [x19, #104] 4599; CHECK-SD-NEXT: ldr x8, [sp, #32] // 8-byte Folded Reload 4600; CHECK-SD-NEXT: str x8, [x19, #96] 4601; CHECK-SD-NEXT: ldr x8, [sp, #8] // 8-byte Folded Reload 4602; CHECK-SD-NEXT: str x8, [x19, #88] 4603; CHECK-SD-NEXT: ldr x8, [sp, #16] // 8-byte Folded Reload 4604; CHECK-SD-NEXT: str x8, [x19, #80] 4605; CHECK-SD-NEXT: ldr x8, [sp, #24] // 8-byte Folded Reload 4606; CHECK-SD-NEXT: str x8, [x19, #72] 4607; CHECK-SD-NEXT: ldr x8, [sp, #72] // 8-byte Folded Reload 4608; CHECK-SD-NEXT: str x8, [x19, #64] 4609; CHECK-SD-NEXT: ldp x20, x19, [sp, #176] // 16-byte Folded Reload 4610; CHECK-SD-NEXT: ldr d10, [sp, #64] // 8-byte Folded Reload 4611; CHECK-SD-NEXT: ldp x22, x21, [sp, #160] // 16-byte Folded Reload 4612; CHECK-SD-NEXT: ldp x24, x23, [sp, #144] // 16-byte Folded Reload 4613; CHECK-SD-NEXT: ldp x26, x25, [sp, #128] // 16-byte Folded Reload 4614; CHECK-SD-NEXT: ldp x28, x27, [sp, #112] // 16-byte Folded Reload 4615; CHECK-SD-NEXT: ldp x29, x30, [sp, #96] // 16-byte Folded Reload 4616; CHECK-SD-NEXT: ldp d9, d8, [sp, #80] // 16-byte Folded Reload 4617; CHECK-SD-NEXT: add sp, sp, #192 4618; CHECK-SD-NEXT: ret 4619; 4620; CHECK-GI-CVT-LABEL: test_signed_v8f16_v8i128: 4621; CHECK-GI-CVT: // %bb.0: 4622; CHECK-GI-CVT-NEXT: mov h1, v0.h[1] 4623; CHECK-GI-CVT-NEXT: mov h2, v0.h[2] 4624; CHECK-GI-CVT-NEXT: mov h3, v0.h[3] 4625; CHECK-GI-CVT-NEXT: mov h4, v0.h[4] 4626; CHECK-GI-CVT-NEXT: fcvt s5, h0 4627; CHECK-GI-CVT-NEXT: mov h6, v0.h[5] 4628; CHECK-GI-CVT-NEXT: mov h7, v0.h[6] 4629; CHECK-GI-CVT-NEXT: mov h0, v0.h[7] 4630; CHECK-GI-CVT-NEXT: fcvt s1, h1 4631; CHECK-GI-CVT-NEXT: fcvt s2, h2 4632; CHECK-GI-CVT-NEXT: fcvt s3, h3 4633; CHECK-GI-CVT-NEXT: fcvtzs x9, s5 4634; CHECK-GI-CVT-NEXT: fcvt s4, h4 4635; CHECK-GI-CVT-NEXT: fcvt s5, h6 4636; CHECK-GI-CVT-NEXT: fcvt s0, h0 4637; CHECK-GI-CVT-NEXT: fcvtzs x10, s1 4638; CHECK-GI-CVT-NEXT: fcvt s1, h7 4639; CHECK-GI-CVT-NEXT: fcvtzs x11, s2 4640; CHECK-GI-CVT-NEXT: fcvtzs x12, s3 4641; CHECK-GI-CVT-NEXT: mov v2.d[0], x9 4642; CHECK-GI-CVT-NEXT: fcvtzs x9, s4 4643; CHECK-GI-CVT-NEXT: mov v3.d[0], x10 4644; CHECK-GI-CVT-NEXT: fcvtzs x10, s5 4645; CHECK-GI-CVT-NEXT: mov v4.d[0], x11 4646; CHECK-GI-CVT-NEXT: fcvtzs x11, s1 4647; CHECK-GI-CVT-NEXT: mov v1.d[0], x12 4648; CHECK-GI-CVT-NEXT: fcvtzs x12, s0 4649; CHECK-GI-CVT-NEXT: mov v0.d[0], x9 4650; CHECK-GI-CVT-NEXT: mov v2.d[1], xzr 4651; CHECK-GI-CVT-NEXT: mov v5.d[0], x10 4652; CHECK-GI-CVT-NEXT: mov v3.d[1], xzr 4653; CHECK-GI-CVT-NEXT: mov v4.d[1], xzr 4654; CHECK-GI-CVT-NEXT: mov v6.d[0], x11 4655; CHECK-GI-CVT-NEXT: mov v7.d[0], x12 4656; CHECK-GI-CVT-NEXT: mov v1.d[1], xzr 4657; CHECK-GI-CVT-NEXT: mov v0.d[1], xzr 4658; CHECK-GI-CVT-NEXT: mov v5.d[1], xzr 4659; CHECK-GI-CVT-NEXT: stp q2, q3, [x8] 4660; CHECK-GI-CVT-NEXT: mov v6.d[1], xzr 4661; CHECK-GI-CVT-NEXT: mov v7.d[1], xzr 4662; CHECK-GI-CVT-NEXT: stp q4, q1, [x8, #32] 4663; CHECK-GI-CVT-NEXT: stp q0, q5, [x8, #64] 4664; CHECK-GI-CVT-NEXT: stp q6, q7, [x8, #96] 4665; CHECK-GI-CVT-NEXT: ret 4666; 4667; CHECK-GI-FP16-LABEL: test_signed_v8f16_v8i128: 4668; CHECK-GI-FP16: // %bb.0: 4669; CHECK-GI-FP16-NEXT: mov h1, v0.h[1] 4670; CHECK-GI-FP16-NEXT: mov h2, v0.h[2] 4671; CHECK-GI-FP16-NEXT: mov h3, v0.h[3] 4672; CHECK-GI-FP16-NEXT: mov h4, v0.h[4] 4673; CHECK-GI-FP16-NEXT: fcvtzs x9, h0 4674; CHECK-GI-FP16-NEXT: mov h5, v0.h[5] 4675; CHECK-GI-FP16-NEXT: fcvtzs x10, h1 4676; CHECK-GI-FP16-NEXT: mov h1, v0.h[6] 4677; CHECK-GI-FP16-NEXT: fcvtzs x11, h2 4678; CHECK-GI-FP16-NEXT: mov h0, v0.h[7] 4679; CHECK-GI-FP16-NEXT: fcvtzs x12, h3 4680; CHECK-GI-FP16-NEXT: mov v2.d[0], x9 4681; CHECK-GI-FP16-NEXT: fcvtzs x9, h4 4682; CHECK-GI-FP16-NEXT: mov v3.d[0], x10 4683; CHECK-GI-FP16-NEXT: fcvtzs x10, h5 4684; CHECK-GI-FP16-NEXT: mov v4.d[0], x11 4685; CHECK-GI-FP16-NEXT: fcvtzs x11, h1 4686; CHECK-GI-FP16-NEXT: mov v1.d[0], x12 4687; CHECK-GI-FP16-NEXT: fcvtzs x12, h0 4688; CHECK-GI-FP16-NEXT: mov v0.d[0], x9 4689; CHECK-GI-FP16-NEXT: mov v2.d[1], xzr 4690; CHECK-GI-FP16-NEXT: mov v5.d[0], x10 4691; CHECK-GI-FP16-NEXT: mov v3.d[1], xzr 4692; CHECK-GI-FP16-NEXT: mov v4.d[1], xzr 4693; CHECK-GI-FP16-NEXT: mov v6.d[0], x11 4694; CHECK-GI-FP16-NEXT: mov v7.d[0], x12 4695; CHECK-GI-FP16-NEXT: mov v1.d[1], xzr 4696; CHECK-GI-FP16-NEXT: mov v0.d[1], xzr 4697; CHECK-GI-FP16-NEXT: mov v5.d[1], xzr 4698; CHECK-GI-FP16-NEXT: stp q2, q3, [x8] 4699; CHECK-GI-FP16-NEXT: mov v6.d[1], xzr 4700; CHECK-GI-FP16-NEXT: mov v7.d[1], xzr 4701; CHECK-GI-FP16-NEXT: stp q4, q1, [x8, #32] 4702; CHECK-GI-FP16-NEXT: stp q0, q5, [x8, #64] 4703; CHECK-GI-FP16-NEXT: stp q6, q7, [x8, #96] 4704; CHECK-GI-FP16-NEXT: ret 4705 %x = call <8 x i128> @llvm.fptosi.sat.v8f16.v8i128(<8 x half> %f) 4706 ret <8 x i128> %x 4707} 4708 4709 4710declare <8 x i8> @llvm.fptosi.sat.v8f32.v8i8(<8 x float> %f) 4711declare <8 x i16> @llvm.fptosi.sat.v8f32.v8i16(<8 x float> %f) 4712declare <16 x i8> @llvm.fptosi.sat.v16f32.v16i8(<16 x float> %f) 4713declare <16 x i16> @llvm.fptosi.sat.v16f32.v16i16(<16 x float> %f) 4714 4715declare <16 x i8> @llvm.fptosi.sat.v16f16.v16i8(<16 x half> %f) 4716declare <16 x i16> @llvm.fptosi.sat.v16f16.v16i16(<16 x half> %f) 4717 4718declare <8 x i8> @llvm.fptosi.sat.v8f64.v8i8(<8 x double> %f) 4719declare <8 x i16> @llvm.fptosi.sat.v8f64.v8i16(<8 x double> %f) 4720declare <16 x i8> @llvm.fptosi.sat.v16f64.v16i8(<16 x double> %f) 4721declare <16 x i16> @llvm.fptosi.sat.v16f64.v16i16(<16 x double> %f) 4722 4723define <8 x i8> @test_signed_v8f32_v8i8(<8 x float> %f) { 4724; CHECK-SD-LABEL: test_signed_v8f32_v8i8: 4725; CHECK-SD: // %bb.0: 4726; CHECK-SD-NEXT: movi v2.4s, #127 4727; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s 4728; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 4729; CHECK-SD-NEXT: smin v1.4s, v1.4s, v2.4s 4730; CHECK-SD-NEXT: smin v0.4s, v0.4s, v2.4s 4731; CHECK-SD-NEXT: mvni v2.4s, #127 4732; CHECK-SD-NEXT: smax v1.4s, v1.4s, v2.4s 4733; CHECK-SD-NEXT: smax v0.4s, v0.4s, v2.4s 4734; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h 4735; CHECK-SD-NEXT: xtn v0.8b, v0.8h 4736; CHECK-SD-NEXT: ret 4737; 4738; CHECK-GI-LABEL: test_signed_v8f32_v8i8: 4739; CHECK-GI: // %bb.0: 4740; CHECK-GI-NEXT: movi v2.4s, #127 4741; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 4742; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s 4743; CHECK-GI-NEXT: smin v0.4s, v0.4s, v2.4s 4744; CHECK-GI-NEXT: smin v1.4s, v1.4s, v2.4s 4745; CHECK-GI-NEXT: mvni v2.4s, #127 4746; CHECK-GI-NEXT: smax v0.4s, v0.4s, v2.4s 4747; CHECK-GI-NEXT: smax v1.4s, v1.4s, v2.4s 4748; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h 4749; CHECK-GI-NEXT: xtn v0.8b, v0.8h 4750; CHECK-GI-NEXT: ret 4751 %x = call <8 x i8> @llvm.fptosi.sat.v8f32.v8i8(<8 x float> %f) 4752 ret <8 x i8> %x 4753} 4754 4755define <16 x i8> @test_signed_v16f32_v16i8(<16 x float> %f) { 4756; CHECK-SD-LABEL: test_signed_v16f32_v16i8: 4757; CHECK-SD: // %bb.0: 4758; CHECK-SD-NEXT: movi v4.4s, #127 4759; CHECK-SD-NEXT: fcvtzs v3.4s, v3.4s 4760; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s 4761; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s 4762; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 4763; CHECK-SD-NEXT: mvni v5.4s, #127 4764; CHECK-SD-NEXT: smin v3.4s, v3.4s, v4.4s 4765; CHECK-SD-NEXT: smin v2.4s, v2.4s, v4.4s 4766; CHECK-SD-NEXT: smin v1.4s, v1.4s, v4.4s 4767; CHECK-SD-NEXT: smin v0.4s, v0.4s, v4.4s 4768; CHECK-SD-NEXT: smax v3.4s, v3.4s, v5.4s 4769; CHECK-SD-NEXT: smax v2.4s, v2.4s, v5.4s 4770; CHECK-SD-NEXT: smax v1.4s, v1.4s, v5.4s 4771; CHECK-SD-NEXT: smax v0.4s, v0.4s, v5.4s 4772; CHECK-SD-NEXT: uzp1 v2.8h, v2.8h, v3.8h 4773; CHECK-SD-NEXT: uzp1 v0.8h, v0.8h, v1.8h 4774; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v2.16b 4775; CHECK-SD-NEXT: ret 4776; 4777; CHECK-GI-LABEL: test_signed_v16f32_v16i8: 4778; CHECK-GI: // %bb.0: 4779; CHECK-GI-NEXT: movi v4.4s, #127 4780; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 4781; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s 4782; CHECK-GI-NEXT: fcvtzs v2.4s, v2.4s 4783; CHECK-GI-NEXT: fcvtzs v3.4s, v3.4s 4784; CHECK-GI-NEXT: mvni v5.4s, #127 4785; CHECK-GI-NEXT: smin v0.4s, v0.4s, v4.4s 4786; CHECK-GI-NEXT: smin v1.4s, v1.4s, v4.4s 4787; CHECK-GI-NEXT: smin v2.4s, v2.4s, v4.4s 4788; CHECK-GI-NEXT: smin v3.4s, v3.4s, v4.4s 4789; CHECK-GI-NEXT: smax v0.4s, v0.4s, v5.4s 4790; CHECK-GI-NEXT: smax v1.4s, v1.4s, v5.4s 4791; CHECK-GI-NEXT: smax v2.4s, v2.4s, v5.4s 4792; CHECK-GI-NEXT: smax v3.4s, v3.4s, v5.4s 4793; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h 4794; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h 4795; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b 4796; CHECK-GI-NEXT: ret 4797 %x = call <16 x i8> @llvm.fptosi.sat.v16f32.v16i8(<16 x float> %f) 4798 ret <16 x i8> %x 4799} 4800 4801define <8 x i16> @test_signed_v8f32_v8i16(<8 x float> %f) { 4802; CHECK-SD-LABEL: test_signed_v8f32_v8i16: 4803; CHECK-SD: // %bb.0: 4804; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 4805; CHECK-SD-NEXT: fcvtzs v1.4s, v1.4s 4806; CHECK-SD-NEXT: sqxtn v0.4h, v0.4s 4807; CHECK-SD-NEXT: sqxtn2 v0.8h, v1.4s 4808; CHECK-SD-NEXT: ret 4809; 4810; CHECK-GI-LABEL: test_signed_v8f32_v8i16: 4811; CHECK-GI: // %bb.0: 4812; CHECK-GI-NEXT: movi v2.4s, #127, msl #8 4813; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 4814; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s 4815; CHECK-GI-NEXT: smin v0.4s, v0.4s, v2.4s 4816; CHECK-GI-NEXT: smin v1.4s, v1.4s, v2.4s 4817; CHECK-GI-NEXT: mvni v2.4s, #127, msl #8 4818; CHECK-GI-NEXT: smax v0.4s, v0.4s, v2.4s 4819; CHECK-GI-NEXT: smax v1.4s, v1.4s, v2.4s 4820; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h 4821; CHECK-GI-NEXT: ret 4822 %x = call <8 x i16> @llvm.fptosi.sat.v8f32.v8i16(<8 x float> %f) 4823 ret <8 x i16> %x 4824} 4825 4826define <16 x i16> @test_signed_v16f32_v16i16(<16 x float> %f) { 4827; CHECK-SD-LABEL: test_signed_v16f32_v16i16: 4828; CHECK-SD: // %bb.0: 4829; CHECK-SD-NEXT: fcvtzs v0.4s, v0.4s 4830; CHECK-SD-NEXT: fcvtzs v2.4s, v2.4s 4831; CHECK-SD-NEXT: fcvtzs v4.4s, v1.4s 4832; CHECK-SD-NEXT: sqxtn v0.4h, v0.4s 4833; CHECK-SD-NEXT: sqxtn v1.4h, v2.4s 4834; CHECK-SD-NEXT: fcvtzs v2.4s, v3.4s 4835; CHECK-SD-NEXT: sqxtn2 v0.8h, v4.4s 4836; CHECK-SD-NEXT: sqxtn2 v1.8h, v2.4s 4837; CHECK-SD-NEXT: ret 4838; 4839; CHECK-GI-LABEL: test_signed_v16f32_v16i16: 4840; CHECK-GI: // %bb.0: 4841; CHECK-GI-NEXT: movi v4.4s, #127, msl #8 4842; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s 4843; CHECK-GI-NEXT: fcvtzs v1.4s, v1.4s 4844; CHECK-GI-NEXT: fcvtzs v2.4s, v2.4s 4845; CHECK-GI-NEXT: fcvtzs v3.4s, v3.4s 4846; CHECK-GI-NEXT: mvni v5.4s, #127, msl #8 4847; CHECK-GI-NEXT: smin v0.4s, v0.4s, v4.4s 4848; CHECK-GI-NEXT: smin v1.4s, v1.4s, v4.4s 4849; CHECK-GI-NEXT: smin v2.4s, v2.4s, v4.4s 4850; CHECK-GI-NEXT: smin v3.4s, v3.4s, v4.4s 4851; CHECK-GI-NEXT: smax v0.4s, v0.4s, v5.4s 4852; CHECK-GI-NEXT: smax v1.4s, v1.4s, v5.4s 4853; CHECK-GI-NEXT: smax v2.4s, v2.4s, v5.4s 4854; CHECK-GI-NEXT: smax v3.4s, v3.4s, v5.4s 4855; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h 4856; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h 4857; CHECK-GI-NEXT: ret 4858 %x = call <16 x i16> @llvm.fptosi.sat.v16f32.v16i16(<16 x float> %f) 4859 ret <16 x i16> %x 4860} 4861 4862 4863 4864define <16 x i8> @test_signed_v16f16_v16i8(<16 x half> %f) { 4865; CHECK-SD-CVT-LABEL: test_signed_v16f16_v16i8: 4866; CHECK-SD-CVT: // %bb.0: 4867; CHECK-SD-CVT-NEXT: fcvtl2 v3.4s, v1.8h 4868; CHECK-SD-CVT-NEXT: fcvtl v1.4s, v1.4h 4869; CHECK-SD-CVT-NEXT: fcvtl2 v4.4s, v0.8h 4870; CHECK-SD-CVT-NEXT: fcvtl v0.4s, v0.4h 4871; CHECK-SD-CVT-NEXT: movi v2.4s, #127 4872; CHECK-SD-CVT-NEXT: fcvtzs v3.4s, v3.4s 4873; CHECK-SD-CVT-NEXT: fcvtzs v1.4s, v1.4s 4874; CHECK-SD-CVT-NEXT: fcvtzs v4.4s, v4.4s 4875; CHECK-SD-CVT-NEXT: fcvtzs v0.4s, v0.4s 4876; CHECK-SD-CVT-NEXT: smin v3.4s, v3.4s, v2.4s 4877; CHECK-SD-CVT-NEXT: smin v1.4s, v1.4s, v2.4s 4878; CHECK-SD-CVT-NEXT: smin v4.4s, v4.4s, v2.4s 4879; CHECK-SD-CVT-NEXT: smin v0.4s, v0.4s, v2.4s 4880; CHECK-SD-CVT-NEXT: mvni v2.4s, #127 4881; CHECK-SD-CVT-NEXT: smax v3.4s, v3.4s, v2.4s 4882; CHECK-SD-CVT-NEXT: smax v1.4s, v1.4s, v2.4s 4883; CHECK-SD-CVT-NEXT: smax v4.4s, v4.4s, v2.4s 4884; CHECK-SD-CVT-NEXT: smax v0.4s, v0.4s, v2.4s 4885; CHECK-SD-CVT-NEXT: uzp1 v1.8h, v1.8h, v3.8h 4886; CHECK-SD-CVT-NEXT: uzp1 v0.8h, v0.8h, v4.8h 4887; CHECK-SD-CVT-NEXT: uzp1 v0.16b, v0.16b, v1.16b 4888; CHECK-SD-CVT-NEXT: ret 4889; 4890; CHECK-SD-FP16-LABEL: test_signed_v16f16_v16i8: 4891; CHECK-SD-FP16: // %bb.0: 4892; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h 4893; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h 4894; CHECK-SD-FP16-NEXT: sqxtn v0.8b, v0.8h 4895; CHECK-SD-FP16-NEXT: sqxtn2 v0.16b, v1.8h 4896; CHECK-SD-FP16-NEXT: ret 4897; 4898; CHECK-GI-CVT-LABEL: test_signed_v16f16_v16i8: 4899; CHECK-GI-CVT: // %bb.0: 4900; CHECK-GI-CVT-NEXT: fcvtl v3.4s, v0.4h 4901; CHECK-GI-CVT-NEXT: fcvtl2 v0.4s, v0.8h 4902; CHECK-GI-CVT-NEXT: fcvtl v4.4s, v1.4h 4903; CHECK-GI-CVT-NEXT: fcvtl2 v1.4s, v1.8h 4904; CHECK-GI-CVT-NEXT: movi v2.4s, #127 4905; CHECK-GI-CVT-NEXT: mvni v5.4s, #127 4906; CHECK-GI-CVT-NEXT: fcvtzs v3.4s, v3.4s 4907; CHECK-GI-CVT-NEXT: fcvtzs v0.4s, v0.4s 4908; CHECK-GI-CVT-NEXT: fcvtzs v4.4s, v4.4s 4909; CHECK-GI-CVT-NEXT: fcvtzs v1.4s, v1.4s 4910; CHECK-GI-CVT-NEXT: smin v3.4s, v3.4s, v2.4s 4911; CHECK-GI-CVT-NEXT: smin v0.4s, v0.4s, v2.4s 4912; CHECK-GI-CVT-NEXT: smin v4.4s, v4.4s, v2.4s 4913; CHECK-GI-CVT-NEXT: smin v1.4s, v1.4s, v2.4s 4914; CHECK-GI-CVT-NEXT: smax v2.4s, v3.4s, v5.4s 4915; CHECK-GI-CVT-NEXT: smax v0.4s, v0.4s, v5.4s 4916; CHECK-GI-CVT-NEXT: smax v3.4s, v4.4s, v5.4s 4917; CHECK-GI-CVT-NEXT: smax v1.4s, v1.4s, v5.4s 4918; CHECK-GI-CVT-NEXT: uzp1 v0.8h, v2.8h, v0.8h 4919; CHECK-GI-CVT-NEXT: uzp1 v1.8h, v3.8h, v1.8h 4920; CHECK-GI-CVT-NEXT: uzp1 v0.16b, v0.16b, v1.16b 4921; CHECK-GI-CVT-NEXT: ret 4922; 4923; CHECK-GI-FP16-LABEL: test_signed_v16f16_v16i8: 4924; CHECK-GI-FP16: // %bb.0: 4925; CHECK-GI-FP16-NEXT: movi v2.8h, #127 4926; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h 4927; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h 4928; CHECK-GI-FP16-NEXT: mvni v3.8h, #127 4929; CHECK-GI-FP16-NEXT: smin v0.8h, v0.8h, v2.8h 4930; CHECK-GI-FP16-NEXT: smin v1.8h, v1.8h, v2.8h 4931; CHECK-GI-FP16-NEXT: smax v0.8h, v0.8h, v3.8h 4932; CHECK-GI-FP16-NEXT: smax v1.8h, v1.8h, v3.8h 4933; CHECK-GI-FP16-NEXT: uzp1 v0.16b, v0.16b, v1.16b 4934; CHECK-GI-FP16-NEXT: ret 4935 %x = call <16 x i8> @llvm.fptosi.sat.v16f16.v16i8(<16 x half> %f) 4936 ret <16 x i8> %x 4937} 4938 4939define <16 x i16> @test_signed_v16f16_v16i16(<16 x half> %f) { 4940; CHECK-SD-CVT-LABEL: test_signed_v16f16_v16i16: 4941; CHECK-SD-CVT: // %bb.0: 4942; CHECK-SD-CVT-NEXT: fcvtl v2.4s, v0.4h 4943; CHECK-SD-CVT-NEXT: fcvtl v3.4s, v1.4h 4944; CHECK-SD-CVT-NEXT: fcvtl2 v4.4s, v0.8h 4945; CHECK-SD-CVT-NEXT: fcvtl2 v5.4s, v1.8h 4946; CHECK-SD-CVT-NEXT: fcvtzs v2.4s, v2.4s 4947; CHECK-SD-CVT-NEXT: fcvtzs v1.4s, v3.4s 4948; CHECK-SD-CVT-NEXT: fcvtzs v3.4s, v5.4s 4949; CHECK-SD-CVT-NEXT: sqxtn v0.4h, v2.4s 4950; CHECK-SD-CVT-NEXT: fcvtzs v2.4s, v4.4s 4951; CHECK-SD-CVT-NEXT: sqxtn v1.4h, v1.4s 4952; CHECK-SD-CVT-NEXT: sqxtn2 v0.8h, v2.4s 4953; CHECK-SD-CVT-NEXT: sqxtn2 v1.8h, v3.4s 4954; CHECK-SD-CVT-NEXT: ret 4955; 4956; CHECK-SD-FP16-LABEL: test_signed_v16f16_v16i16: 4957; CHECK-SD-FP16: // %bb.0: 4958; CHECK-SD-FP16-NEXT: fcvtzs v0.8h, v0.8h 4959; CHECK-SD-FP16-NEXT: fcvtzs v1.8h, v1.8h 4960; CHECK-SD-FP16-NEXT: ret 4961; 4962; CHECK-GI-CVT-LABEL: test_signed_v16f16_v16i16: 4963; CHECK-GI-CVT: // %bb.0: 4964; CHECK-GI-CVT-NEXT: fcvtl v3.4s, v0.4h 4965; CHECK-GI-CVT-NEXT: fcvtl2 v0.4s, v0.8h 4966; CHECK-GI-CVT-NEXT: fcvtl v4.4s, v1.4h 4967; CHECK-GI-CVT-NEXT: fcvtl2 v1.4s, v1.8h 4968; CHECK-GI-CVT-NEXT: movi v2.4s, #127, msl #8 4969; CHECK-GI-CVT-NEXT: mvni v5.4s, #127, msl #8 4970; CHECK-GI-CVT-NEXT: fcvtzs v3.4s, v3.4s 4971; CHECK-GI-CVT-NEXT: fcvtzs v0.4s, v0.4s 4972; CHECK-GI-CVT-NEXT: fcvtzs v4.4s, v4.4s 4973; CHECK-GI-CVT-NEXT: fcvtzs v1.4s, v1.4s 4974; CHECK-GI-CVT-NEXT: smin v3.4s, v3.4s, v2.4s 4975; CHECK-GI-CVT-NEXT: smin v0.4s, v0.4s, v2.4s 4976; CHECK-GI-CVT-NEXT: smin v4.4s, v4.4s, v2.4s 4977; CHECK-GI-CVT-NEXT: smin v1.4s, v1.4s, v2.4s 4978; CHECK-GI-CVT-NEXT: smax v2.4s, v3.4s, v5.4s 4979; CHECK-GI-CVT-NEXT: smax v0.4s, v0.4s, v5.4s 4980; CHECK-GI-CVT-NEXT: smax v3.4s, v4.4s, v5.4s 4981; CHECK-GI-CVT-NEXT: smax v1.4s, v1.4s, v5.4s 4982; CHECK-GI-CVT-NEXT: uzp1 v0.8h, v2.8h, v0.8h 4983; CHECK-GI-CVT-NEXT: uzp1 v1.8h, v3.8h, v1.8h 4984; CHECK-GI-CVT-NEXT: ret 4985; 4986; CHECK-GI-FP16-LABEL: test_signed_v16f16_v16i16: 4987; CHECK-GI-FP16: // %bb.0: 4988; CHECK-GI-FP16-NEXT: fcvtzs v0.8h, v0.8h 4989; CHECK-GI-FP16-NEXT: fcvtzs v1.8h, v1.8h 4990; CHECK-GI-FP16-NEXT: ret 4991 %x = call <16 x i16> @llvm.fptosi.sat.v16f16.v16i16(<16 x half> %f) 4992 ret <16 x i16> %x 4993} 4994 4995define <8 x i8> @test_signed_v8f64_v8i8(<8 x double> %f) { 4996; CHECK-SD-LABEL: test_signed_v8f64_v8i8: 4997; CHECK-SD: // %bb.0: 4998; CHECK-SD-NEXT: mov d4, v3.d[1] 4999; CHECK-SD-NEXT: fcvtzs w11, d3 5000; CHECK-SD-NEXT: mov w9, #127 // =0x7f 5001; CHECK-SD-NEXT: mov d3, v1.d[1] 5002; CHECK-SD-NEXT: fcvtzs w13, d2 5003; CHECK-SD-NEXT: fcvtzs w15, d1 5004; CHECK-SD-NEXT: fcvtzs w17, d0 5005; CHECK-SD-NEXT: fcvtzs w8, d4 5006; CHECK-SD-NEXT: mov d4, v2.d[1] 5007; CHECK-SD-NEXT: mov d2, v0.d[1] 5008; CHECK-SD-NEXT: fcvtzs w14, d3 5009; CHECK-SD-NEXT: cmp w8, #127 5010; CHECK-SD-NEXT: fcvtzs w12, d4 5011; CHECK-SD-NEXT: fcvtzs w16, d2 5012; CHECK-SD-NEXT: csel w10, w8, w9, lt 5013; CHECK-SD-NEXT: mov w8, #-128 // =0xffffff80 5014; CHECK-SD-NEXT: cmn w10, #128 5015; CHECK-SD-NEXT: csel w10, w10, w8, gt 5016; CHECK-SD-NEXT: cmp w11, #127 5017; CHECK-SD-NEXT: csel w11, w11, w9, lt 5018; CHECK-SD-NEXT: cmn w11, #128 5019; CHECK-SD-NEXT: csel w11, w11, w8, gt 5020; CHECK-SD-NEXT: cmp w12, #127 5021; CHECK-SD-NEXT: csel w12, w12, w9, lt 5022; CHECK-SD-NEXT: fmov s3, w11 5023; CHECK-SD-NEXT: cmn w12, #128 5024; CHECK-SD-NEXT: csel w12, w12, w8, gt 5025; CHECK-SD-NEXT: cmp w13, #127 5026; CHECK-SD-NEXT: csel w13, w13, w9, lt 5027; CHECK-SD-NEXT: mov v3.s[1], w10 5028; CHECK-SD-NEXT: cmn w13, #128 5029; CHECK-SD-NEXT: csel w13, w13, w8, gt 5030; CHECK-SD-NEXT: cmp w14, #127 5031; CHECK-SD-NEXT: csel w14, w14, w9, lt 5032; CHECK-SD-NEXT: fmov s2, w13 5033; CHECK-SD-NEXT: cmn w14, #128 5034; CHECK-SD-NEXT: csel w14, w14, w8, gt 5035; CHECK-SD-NEXT: cmp w15, #127 5036; CHECK-SD-NEXT: csel w15, w15, w9, lt 5037; CHECK-SD-NEXT: mov v2.s[1], w12 5038; CHECK-SD-NEXT: cmn w15, #128 5039; CHECK-SD-NEXT: csel w15, w15, w8, gt 5040; CHECK-SD-NEXT: cmp w16, #127 5041; CHECK-SD-NEXT: csel w11, w16, w9, lt 5042; CHECK-SD-NEXT: fmov s1, w15 5043; CHECK-SD-NEXT: cmn w11, #128 5044; CHECK-SD-NEXT: csel w10, w11, w8, gt 5045; CHECK-SD-NEXT: cmp w17, #127 5046; CHECK-SD-NEXT: csel w9, w17, w9, lt 5047; CHECK-SD-NEXT: mov v1.s[1], w14 5048; CHECK-SD-NEXT: cmn w9, #128 5049; CHECK-SD-NEXT: csel w8, w9, w8, gt 5050; CHECK-SD-NEXT: fmov s0, w8 5051; CHECK-SD-NEXT: adrp x8, .LCPI82_0 5052; CHECK-SD-NEXT: ldr d4, [x8, :lo12:.LCPI82_0] 5053; CHECK-SD-NEXT: mov v0.s[1], w10 5054; CHECK-SD-NEXT: tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v4.8b 5055; CHECK-SD-NEXT: ret 5056; 5057; CHECK-GI-LABEL: test_signed_v8f64_v8i8: 5058; CHECK-GI: // %bb.0: 5059; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 5060; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d 5061; CHECK-GI-NEXT: adrp x8, .LCPI82_1 5062; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d 5063; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d 5064; CHECK-GI-NEXT: ldr q4, [x8, :lo12:.LCPI82_1] 5065; CHECK-GI-NEXT: adrp x8, .LCPI82_0 5066; CHECK-GI-NEXT: cmgt v5.2d, v4.2d, v0.2d 5067; CHECK-GI-NEXT: cmgt v6.2d, v4.2d, v1.2d 5068; CHECK-GI-NEXT: cmgt v7.2d, v4.2d, v2.2d 5069; CHECK-GI-NEXT: cmgt v16.2d, v4.2d, v3.2d 5070; CHECK-GI-NEXT: bif v0.16b, v4.16b, v5.16b 5071; CHECK-GI-NEXT: bif v1.16b, v4.16b, v6.16b 5072; CHECK-GI-NEXT: bif v2.16b, v4.16b, v7.16b 5073; CHECK-GI-NEXT: bif v3.16b, v4.16b, v16.16b 5074; CHECK-GI-NEXT: ldr q4, [x8, :lo12:.LCPI82_0] 5075; CHECK-GI-NEXT: cmgt v5.2d, v0.2d, v4.2d 5076; CHECK-GI-NEXT: cmgt v6.2d, v1.2d, v4.2d 5077; CHECK-GI-NEXT: cmgt v7.2d, v2.2d, v4.2d 5078; CHECK-GI-NEXT: cmgt v16.2d, v3.2d, v4.2d 5079; CHECK-GI-NEXT: bif v0.16b, v4.16b, v5.16b 5080; CHECK-GI-NEXT: bif v1.16b, v4.16b, v6.16b 5081; CHECK-GI-NEXT: bif v2.16b, v4.16b, v7.16b 5082; CHECK-GI-NEXT: bif v3.16b, v4.16b, v16.16b 5083; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s 5084; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s 5085; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h 5086; CHECK-GI-NEXT: xtn v0.8b, v0.8h 5087; CHECK-GI-NEXT: ret 5088 %x = call <8 x i8> @llvm.fptosi.sat.v8f64.v8i8(<8 x double> %f) 5089 ret <8 x i8> %x 5090} 5091 5092define <16 x i8> @test_signed_v16f64_v16i8(<16 x double> %f) { 5093; CHECK-SD-LABEL: test_signed_v16f64_v16i8: 5094; CHECK-SD: // %bb.0: 5095; CHECK-SD-NEXT: mov d16, v0.d[1] 5096; CHECK-SD-NEXT: fcvtzs w10, d0 5097; CHECK-SD-NEXT: mov w8, #127 // =0x7f 5098; CHECK-SD-NEXT: mov d0, v1.d[1] 5099; CHECK-SD-NEXT: fcvtzs w13, d1 5100; CHECK-SD-NEXT: mov d1, v2.d[1] 5101; CHECK-SD-NEXT: fcvtzs w9, d16 5102; CHECK-SD-NEXT: fcvtzs w12, d0 5103; CHECK-SD-NEXT: cmp w9, #127 5104; CHECK-SD-NEXT: csel w11, w9, w8, lt 5105; CHECK-SD-NEXT: mov w9, #-128 // =0xffffff80 5106; CHECK-SD-NEXT: cmn w11, #128 5107; CHECK-SD-NEXT: csel w11, w11, w9, gt 5108; CHECK-SD-NEXT: cmp w10, #127 5109; CHECK-SD-NEXT: csel w10, w10, w8, lt 5110; CHECK-SD-NEXT: cmn w10, #128 5111; CHECK-SD-NEXT: csel w10, w10, w9, gt 5112; CHECK-SD-NEXT: cmp w12, #127 5113; CHECK-SD-NEXT: fmov s0, w10 5114; CHECK-SD-NEXT: csel w10, w12, w8, lt 5115; CHECK-SD-NEXT: cmn w10, #128 5116; CHECK-SD-NEXT: csel w10, w10, w9, gt 5117; CHECK-SD-NEXT: cmp w13, #127 5118; CHECK-SD-NEXT: csel w12, w13, w8, lt 5119; CHECK-SD-NEXT: mov v0.s[1], w11 5120; CHECK-SD-NEXT: fcvtzs w11, d1 5121; CHECK-SD-NEXT: cmn w12, #128 5122; CHECK-SD-NEXT: csel w12, w12, w9, gt 5123; CHECK-SD-NEXT: fmov s1, w12 5124; CHECK-SD-NEXT: fcvtzs w12, d2 5125; CHECK-SD-NEXT: mov d2, v3.d[1] 5126; CHECK-SD-NEXT: cmp w11, #127 5127; CHECK-SD-NEXT: mov w13, v0.s[1] 5128; CHECK-SD-NEXT: mov v1.s[1], w10 5129; CHECK-SD-NEXT: csel w10, w11, w8, lt 5130; CHECK-SD-NEXT: cmn w10, #128 5131; CHECK-SD-NEXT: fcvtzs w11, d2 5132; CHECK-SD-NEXT: csel w10, w10, w9, gt 5133; CHECK-SD-NEXT: cmp w12, #127 5134; CHECK-SD-NEXT: mov v0.b[1], w13 5135; CHECK-SD-NEXT: csel w12, w12, w8, lt 5136; CHECK-SD-NEXT: cmn w12, #128 5137; CHECK-SD-NEXT: mov w13, v1.s[1] 5138; CHECK-SD-NEXT: csel w12, w12, w9, gt 5139; CHECK-SD-NEXT: cmp w11, #127 5140; CHECK-SD-NEXT: fmov s2, w12 5141; CHECK-SD-NEXT: fcvtzs w12, d3 5142; CHECK-SD-NEXT: mov d3, v4.d[1] 5143; CHECK-SD-NEXT: mov v0.b[2], v1.b[0] 5144; CHECK-SD-NEXT: mov v2.s[1], w10 5145; CHECK-SD-NEXT: csel w10, w11, w8, lt 5146; CHECK-SD-NEXT: cmn w10, #128 5147; CHECK-SD-NEXT: fcvtzs w11, d3 5148; CHECK-SD-NEXT: csel w10, w10, w9, gt 5149; CHECK-SD-NEXT: cmp w12, #127 5150; CHECK-SD-NEXT: mov v0.b[3], w13 5151; CHECK-SD-NEXT: csel w12, w12, w8, lt 5152; CHECK-SD-NEXT: cmn w12, #128 5153; CHECK-SD-NEXT: mov w13, v2.s[1] 5154; CHECK-SD-NEXT: csel w12, w12, w9, gt 5155; CHECK-SD-NEXT: cmp w11, #127 5156; CHECK-SD-NEXT: fmov s3, w12 5157; CHECK-SD-NEXT: fcvtzs w12, d4 5158; CHECK-SD-NEXT: mov v0.b[4], v2.b[0] 5159; CHECK-SD-NEXT: mov d4, v5.d[1] 5160; CHECK-SD-NEXT: mov v3.s[1], w10 5161; CHECK-SD-NEXT: csel w10, w11, w8, lt 5162; CHECK-SD-NEXT: cmn w10, #128 5163; CHECK-SD-NEXT: mov v0.b[5], w13 5164; CHECK-SD-NEXT: csel w10, w10, w9, gt 5165; CHECK-SD-NEXT: cmp w12, #127 5166; CHECK-SD-NEXT: fcvtzs w11, d4 5167; CHECK-SD-NEXT: csel w12, w12, w8, lt 5168; CHECK-SD-NEXT: cmn w12, #128 5169; CHECK-SD-NEXT: mov w13, v3.s[1] 5170; CHECK-SD-NEXT: csel w12, w12, w9, gt 5171; CHECK-SD-NEXT: mov v0.b[6], v3.b[0] 5172; CHECK-SD-NEXT: fmov s4, w12 5173; CHECK-SD-NEXT: fcvtzs w12, d5 5174; CHECK-SD-NEXT: cmp w11, #127 5175; CHECK-SD-NEXT: mov d5, v6.d[1] 5176; CHECK-SD-NEXT: mov v4.s[1], w10 5177; CHECK-SD-NEXT: csel w10, w11, w8, lt 5178; CHECK-SD-NEXT: mov v0.b[7], w13 5179; CHECK-SD-NEXT: cmn w10, #128 5180; CHECK-SD-NEXT: csel w10, w10, w9, gt 5181; CHECK-SD-NEXT: cmp w12, #127 5182; CHECK-SD-NEXT: fcvtzs w13, d5 5183; CHECK-SD-NEXT: csel w11, w12, w8, lt 5184; CHECK-SD-NEXT: cmn w11, #128 5185; CHECK-SD-NEXT: mov w12, v4.s[1] 5186; CHECK-SD-NEXT: mov v0.b[8], v4.b[0] 5187; CHECK-SD-NEXT: csel w11, w11, w9, gt 5188; CHECK-SD-NEXT: fmov s5, w11 5189; CHECK-SD-NEXT: fcvtzs w11, d6 5190; CHECK-SD-NEXT: cmp w13, #127 5191; CHECK-SD-NEXT: mov d6, v7.d[1] 5192; CHECK-SD-NEXT: mov v0.b[9], w12 5193; CHECK-SD-NEXT: mov v5.s[1], w10 5194; CHECK-SD-NEXT: csel w10, w13, w8, lt 5195; CHECK-SD-NEXT: cmn w10, #128 5196; CHECK-SD-NEXT: csel w10, w10, w9, gt 5197; CHECK-SD-NEXT: cmp w11, #127 5198; CHECK-SD-NEXT: fcvtzs w13, d6 5199; CHECK-SD-NEXT: csel w11, w11, w8, lt 5200; CHECK-SD-NEXT: cmn w11, #128 5201; CHECK-SD-NEXT: mov v0.b[10], v5.b[0] 5202; CHECK-SD-NEXT: mov w12, v5.s[1] 5203; CHECK-SD-NEXT: csel w11, w11, w9, gt 5204; CHECK-SD-NEXT: fmov s6, w11 5205; CHECK-SD-NEXT: fcvtzs w11, d7 5206; CHECK-SD-NEXT: cmp w13, #127 5207; CHECK-SD-NEXT: mov v0.b[11], w12 5208; CHECK-SD-NEXT: mov v6.s[1], w10 5209; CHECK-SD-NEXT: csel w10, w13, w8, lt 5210; CHECK-SD-NEXT: cmn w10, #128 5211; CHECK-SD-NEXT: csel w10, w10, w9, gt 5212; CHECK-SD-NEXT: cmp w11, #127 5213; CHECK-SD-NEXT: csel w8, w11, w8, lt 5214; CHECK-SD-NEXT: cmn w8, #128 5215; CHECK-SD-NEXT: mov v0.b[12], v6.b[0] 5216; CHECK-SD-NEXT: mov w11, v6.s[1] 5217; CHECK-SD-NEXT: csel w8, w8, w9, gt 5218; CHECK-SD-NEXT: fmov s7, w8 5219; CHECK-SD-NEXT: mov v0.b[13], w11 5220; CHECK-SD-NEXT: mov v7.s[1], w10 5221; CHECK-SD-NEXT: mov v0.b[14], v7.b[0] 5222; CHECK-SD-NEXT: mov w8, v7.s[1] 5223; CHECK-SD-NEXT: mov v0.b[15], w8 5224; CHECK-SD-NEXT: ret 5225; 5226; CHECK-GI-LABEL: test_signed_v16f64_v16i8: 5227; CHECK-GI: // %bb.0: 5228; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 5229; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d 5230; CHECK-GI-NEXT: adrp x8, .LCPI83_1 5231; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d 5232; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d 5233; CHECK-GI-NEXT: ldr q16, [x8, :lo12:.LCPI83_1] 5234; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d 5235; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d 5236; CHECK-GI-NEXT: adrp x8, .LCPI83_0 5237; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d 5238; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d 5239; CHECK-GI-NEXT: cmgt v17.2d, v16.2d, v0.2d 5240; CHECK-GI-NEXT: cmgt v18.2d, v16.2d, v1.2d 5241; CHECK-GI-NEXT: cmgt v19.2d, v16.2d, v2.2d 5242; CHECK-GI-NEXT: cmgt v20.2d, v16.2d, v3.2d 5243; CHECK-GI-NEXT: cmgt v21.2d, v16.2d, v4.2d 5244; CHECK-GI-NEXT: cmgt v22.2d, v16.2d, v5.2d 5245; CHECK-GI-NEXT: cmgt v23.2d, v16.2d, v6.2d 5246; CHECK-GI-NEXT: cmgt v24.2d, v16.2d, v7.2d 5247; CHECK-GI-NEXT: bif v0.16b, v16.16b, v17.16b 5248; CHECK-GI-NEXT: bif v1.16b, v16.16b, v18.16b 5249; CHECK-GI-NEXT: ldr q17, [x8, :lo12:.LCPI83_0] 5250; CHECK-GI-NEXT: bif v2.16b, v16.16b, v19.16b 5251; CHECK-GI-NEXT: bif v3.16b, v16.16b, v20.16b 5252; CHECK-GI-NEXT: bif v4.16b, v16.16b, v21.16b 5253; CHECK-GI-NEXT: bif v5.16b, v16.16b, v22.16b 5254; CHECK-GI-NEXT: bif v6.16b, v16.16b, v23.16b 5255; CHECK-GI-NEXT: bif v7.16b, v16.16b, v24.16b 5256; CHECK-GI-NEXT: cmgt v16.2d, v0.2d, v17.2d 5257; CHECK-GI-NEXT: cmgt v18.2d, v1.2d, v17.2d 5258; CHECK-GI-NEXT: cmgt v19.2d, v2.2d, v17.2d 5259; CHECK-GI-NEXT: cmgt v20.2d, v3.2d, v17.2d 5260; CHECK-GI-NEXT: cmgt v21.2d, v4.2d, v17.2d 5261; CHECK-GI-NEXT: cmgt v22.2d, v5.2d, v17.2d 5262; CHECK-GI-NEXT: cmgt v23.2d, v6.2d, v17.2d 5263; CHECK-GI-NEXT: cmgt v24.2d, v7.2d, v17.2d 5264; CHECK-GI-NEXT: bif v0.16b, v17.16b, v16.16b 5265; CHECK-GI-NEXT: bif v1.16b, v17.16b, v18.16b 5266; CHECK-GI-NEXT: bif v2.16b, v17.16b, v19.16b 5267; CHECK-GI-NEXT: bif v3.16b, v17.16b, v20.16b 5268; CHECK-GI-NEXT: bif v4.16b, v17.16b, v21.16b 5269; CHECK-GI-NEXT: bif v5.16b, v17.16b, v22.16b 5270; CHECK-GI-NEXT: bif v6.16b, v17.16b, v23.16b 5271; CHECK-GI-NEXT: bif v7.16b, v17.16b, v24.16b 5272; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s 5273; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s 5274; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s 5275; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s 5276; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h 5277; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h 5278; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b 5279; CHECK-GI-NEXT: ret 5280 %x = call <16 x i8> @llvm.fptosi.sat.v16f64.v16i8(<16 x double> %f) 5281 ret <16 x i8> %x 5282} 5283 5284define <8 x i16> @test_signed_v8f64_v8i16(<8 x double> %f) { 5285; CHECK-SD-LABEL: test_signed_v8f64_v8i16: 5286; CHECK-SD: // %bb.0: 5287; CHECK-SD-NEXT: mov d4, v3.d[1] 5288; CHECK-SD-NEXT: mov w8, #32767 // =0x7fff 5289; CHECK-SD-NEXT: fcvtzs w11, d3 5290; CHECK-SD-NEXT: mov d3, v1.d[1] 5291; CHECK-SD-NEXT: fcvtzs w13, d2 5292; CHECK-SD-NEXT: fcvtzs w15, d1 5293; CHECK-SD-NEXT: fcvtzs w17, d0 5294; CHECK-SD-NEXT: fcvtzs w9, d4 5295; CHECK-SD-NEXT: mov d4, v2.d[1] 5296; CHECK-SD-NEXT: mov d2, v0.d[1] 5297; CHECK-SD-NEXT: fcvtzs w14, d3 5298; CHECK-SD-NEXT: cmp w9, w8 5299; CHECK-SD-NEXT: fcvtzs w12, d4 5300; CHECK-SD-NEXT: fcvtzs w16, d2 5301; CHECK-SD-NEXT: csel w10, w9, w8, lt 5302; CHECK-SD-NEXT: mov w9, #-32768 // =0xffff8000 5303; CHECK-SD-NEXT: cmn w10, #8, lsl #12 // =32768 5304; CHECK-SD-NEXT: csel w10, w10, w9, gt 5305; CHECK-SD-NEXT: cmp w11, w8 5306; CHECK-SD-NEXT: csel w11, w11, w8, lt 5307; CHECK-SD-NEXT: cmn w11, #8, lsl #12 // =32768 5308; CHECK-SD-NEXT: csel w11, w11, w9, gt 5309; CHECK-SD-NEXT: cmp w12, w8 5310; CHECK-SD-NEXT: csel w12, w12, w8, lt 5311; CHECK-SD-NEXT: fmov s3, w11 5312; CHECK-SD-NEXT: cmn w12, #8, lsl #12 // =32768 5313; CHECK-SD-NEXT: csel w12, w12, w9, gt 5314; CHECK-SD-NEXT: cmp w13, w8 5315; CHECK-SD-NEXT: csel w13, w13, w8, lt 5316; CHECK-SD-NEXT: mov v3.s[1], w10 5317; CHECK-SD-NEXT: cmn w13, #8, lsl #12 // =32768 5318; CHECK-SD-NEXT: csel w13, w13, w9, gt 5319; CHECK-SD-NEXT: cmp w14, w8 5320; CHECK-SD-NEXT: csel w14, w14, w8, lt 5321; CHECK-SD-NEXT: fmov s2, w13 5322; CHECK-SD-NEXT: cmn w14, #8, lsl #12 // =32768 5323; CHECK-SD-NEXT: csel w14, w14, w9, gt 5324; CHECK-SD-NEXT: cmp w15, w8 5325; CHECK-SD-NEXT: csel w15, w15, w8, lt 5326; CHECK-SD-NEXT: mov v2.s[1], w12 5327; CHECK-SD-NEXT: cmn w15, #8, lsl #12 // =32768 5328; CHECK-SD-NEXT: csel w15, w15, w9, gt 5329; CHECK-SD-NEXT: cmp w16, w8 5330; CHECK-SD-NEXT: csel w11, w16, w8, lt 5331; CHECK-SD-NEXT: fmov s1, w15 5332; CHECK-SD-NEXT: cmn w11, #8, lsl #12 // =32768 5333; CHECK-SD-NEXT: csel w10, w11, w9, gt 5334; CHECK-SD-NEXT: cmp w17, w8 5335; CHECK-SD-NEXT: csel w8, w17, w8, lt 5336; CHECK-SD-NEXT: mov v1.s[1], w14 5337; CHECK-SD-NEXT: cmn w8, #8, lsl #12 // =32768 5338; CHECK-SD-NEXT: csel w8, w8, w9, gt 5339; CHECK-SD-NEXT: fmov s0, w8 5340; CHECK-SD-NEXT: adrp x8, .LCPI84_0 5341; CHECK-SD-NEXT: ldr q4, [x8, :lo12:.LCPI84_0] 5342; CHECK-SD-NEXT: mov v0.s[1], w10 5343; CHECK-SD-NEXT: tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v4.16b 5344; CHECK-SD-NEXT: ret 5345; 5346; CHECK-GI-LABEL: test_signed_v8f64_v8i16: 5347; CHECK-GI: // %bb.0: 5348; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 5349; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d 5350; CHECK-GI-NEXT: adrp x8, .LCPI84_1 5351; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d 5352; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d 5353; CHECK-GI-NEXT: ldr q4, [x8, :lo12:.LCPI84_1] 5354; CHECK-GI-NEXT: adrp x8, .LCPI84_0 5355; CHECK-GI-NEXT: cmgt v5.2d, v4.2d, v0.2d 5356; CHECK-GI-NEXT: cmgt v6.2d, v4.2d, v1.2d 5357; CHECK-GI-NEXT: cmgt v7.2d, v4.2d, v2.2d 5358; CHECK-GI-NEXT: cmgt v16.2d, v4.2d, v3.2d 5359; CHECK-GI-NEXT: bif v0.16b, v4.16b, v5.16b 5360; CHECK-GI-NEXT: bif v1.16b, v4.16b, v6.16b 5361; CHECK-GI-NEXT: bif v2.16b, v4.16b, v7.16b 5362; CHECK-GI-NEXT: bif v3.16b, v4.16b, v16.16b 5363; CHECK-GI-NEXT: ldr q4, [x8, :lo12:.LCPI84_0] 5364; CHECK-GI-NEXT: cmgt v5.2d, v0.2d, v4.2d 5365; CHECK-GI-NEXT: cmgt v6.2d, v1.2d, v4.2d 5366; CHECK-GI-NEXT: cmgt v7.2d, v2.2d, v4.2d 5367; CHECK-GI-NEXT: cmgt v16.2d, v3.2d, v4.2d 5368; CHECK-GI-NEXT: bif v0.16b, v4.16b, v5.16b 5369; CHECK-GI-NEXT: bif v1.16b, v4.16b, v6.16b 5370; CHECK-GI-NEXT: bif v2.16b, v4.16b, v7.16b 5371; CHECK-GI-NEXT: bif v3.16b, v4.16b, v16.16b 5372; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s 5373; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s 5374; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h 5375; CHECK-GI-NEXT: ret 5376 %x = call <8 x i16> @llvm.fptosi.sat.v8f64.v8i16(<8 x double> %f) 5377 ret <8 x i16> %x 5378} 5379 5380define <16 x i16> @test_signed_v16f64_v16i16(<16 x double> %f) { 5381; CHECK-SD-LABEL: test_signed_v16f64_v16i16: 5382; CHECK-SD: // %bb.0: 5383; CHECK-SD-NEXT: mov d16, v3.d[1] 5384; CHECK-SD-NEXT: mov w9, #32767 // =0x7fff 5385; CHECK-SD-NEXT: fcvtzs w11, d3 5386; CHECK-SD-NEXT: mov d3, v1.d[1] 5387; CHECK-SD-NEXT: fcvtzs w14, d2 5388; CHECK-SD-NEXT: fcvtzs w15, d1 5389; CHECK-SD-NEXT: mov d1, v7.d[1] 5390; CHECK-SD-NEXT: fcvtzs w18, d0 5391; CHECK-SD-NEXT: fcvtzs w1, d7 5392; CHECK-SD-NEXT: fcvtzs w2, d6 5393; CHECK-SD-NEXT: fcvtzs w4, d5 5394; CHECK-SD-NEXT: fcvtzs w6, d4 5395; CHECK-SD-NEXT: fcvtzs w8, d16 5396; CHECK-SD-NEXT: mov d16, v2.d[1] 5397; CHECK-SD-NEXT: mov d2, v0.d[1] 5398; CHECK-SD-NEXT: mov d0, v6.d[1] 5399; CHECK-SD-NEXT: fcvtzs w0, d1 5400; CHECK-SD-NEXT: cmp w8, w9 5401; CHECK-SD-NEXT: fcvtzs w13, d16 5402; CHECK-SD-NEXT: fcvtzs w17, d2 5403; CHECK-SD-NEXT: csel w10, w8, w9, lt 5404; CHECK-SD-NEXT: mov w8, #-32768 // =0xffff8000 5405; CHECK-SD-NEXT: cmn w10, #8, lsl #12 // =32768 5406; CHECK-SD-NEXT: csel w10, w10, w8, gt 5407; CHECK-SD-NEXT: cmp w11, w9 5408; CHECK-SD-NEXT: csel w11, w11, w9, lt 5409; CHECK-SD-NEXT: cmn w11, #8, lsl #12 // =32768 5410; CHECK-SD-NEXT: csel w12, w11, w8, gt 5411; CHECK-SD-NEXT: cmp w13, w9 5412; CHECK-SD-NEXT: csel w11, w13, w9, lt 5413; CHECK-SD-NEXT: fcvtzs w13, d3 5414; CHECK-SD-NEXT: cmn w11, #8, lsl #12 // =32768 5415; CHECK-SD-NEXT: csel w11, w11, w8, gt 5416; CHECK-SD-NEXT: cmp w14, w9 5417; CHECK-SD-NEXT: csel w14, w14, w9, lt 5418; CHECK-SD-NEXT: cmn w14, #8, lsl #12 // =32768 5419; CHECK-SD-NEXT: csel w14, w14, w8, gt 5420; CHECK-SD-NEXT: cmp w13, w9 5421; CHECK-SD-NEXT: csel w13, w13, w9, lt 5422; CHECK-SD-NEXT: cmn w13, #8, lsl #12 // =32768 5423; CHECK-SD-NEXT: csel w13, w13, w8, gt 5424; CHECK-SD-NEXT: cmp w15, w9 5425; CHECK-SD-NEXT: csel w15, w15, w9, lt 5426; CHECK-SD-NEXT: cmn w15, #8, lsl #12 // =32768 5427; CHECK-SD-NEXT: csel w16, w15, w8, gt 5428; CHECK-SD-NEXT: cmp w17, w9 5429; CHECK-SD-NEXT: csel w15, w17, w9, lt 5430; CHECK-SD-NEXT: cmn w15, #8, lsl #12 // =32768 5431; CHECK-SD-NEXT: csel w15, w15, w8, gt 5432; CHECK-SD-NEXT: cmp w18, w9 5433; CHECK-SD-NEXT: csel w17, w18, w9, lt 5434; CHECK-SD-NEXT: cmn w17, #8, lsl #12 // =32768 5435; CHECK-SD-NEXT: csel w17, w17, w8, gt 5436; CHECK-SD-NEXT: cmp w0, w9 5437; CHECK-SD-NEXT: csel w18, w0, w9, lt 5438; CHECK-SD-NEXT: fcvtzs w0, d0 5439; CHECK-SD-NEXT: mov d0, v5.d[1] 5440; CHECK-SD-NEXT: cmn w18, #8, lsl #12 // =32768 5441; CHECK-SD-NEXT: csel w18, w18, w8, gt 5442; CHECK-SD-NEXT: cmp w1, w9 5443; CHECK-SD-NEXT: csel w1, w1, w9, lt 5444; CHECK-SD-NEXT: cmn w1, #8, lsl #12 // =32768 5445; CHECK-SD-NEXT: fcvtzs w3, d0 5446; CHECK-SD-NEXT: mov d0, v4.d[1] 5447; CHECK-SD-NEXT: csel w1, w1, w8, gt 5448; CHECK-SD-NEXT: cmp w0, w9 5449; CHECK-SD-NEXT: csel w0, w0, w9, lt 5450; CHECK-SD-NEXT: fmov s7, w1 5451; CHECK-SD-NEXT: cmn w0, #8, lsl #12 // =32768 5452; CHECK-SD-NEXT: csel w0, w0, w8, gt 5453; CHECK-SD-NEXT: cmp w2, w9 5454; CHECK-SD-NEXT: fcvtzs w5, d0 5455; CHECK-SD-NEXT: csel w2, w2, w9, lt 5456; CHECK-SD-NEXT: fmov s3, w12 5457; CHECK-SD-NEXT: mov v7.s[1], w18 5458; CHECK-SD-NEXT: cmn w2, #8, lsl #12 // =32768 5459; CHECK-SD-NEXT: csel w2, w2, w8, gt 5460; CHECK-SD-NEXT: cmp w3, w9 5461; CHECK-SD-NEXT: csel w3, w3, w9, lt 5462; CHECK-SD-NEXT: mov v3.s[1], w10 5463; CHECK-SD-NEXT: fmov s6, w2 5464; CHECK-SD-NEXT: cmn w3, #8, lsl #12 // =32768 5465; CHECK-SD-NEXT: fmov s2, w14 5466; CHECK-SD-NEXT: csel w3, w3, w8, gt 5467; CHECK-SD-NEXT: cmp w4, w9 5468; CHECK-SD-NEXT: csel w4, w4, w9, lt 5469; CHECK-SD-NEXT: mov v6.s[1], w0 5470; CHECK-SD-NEXT: cmn w4, #8, lsl #12 // =32768 5471; CHECK-SD-NEXT: mov v2.s[1], w11 5472; CHECK-SD-NEXT: csel w12, w4, w8, gt 5473; CHECK-SD-NEXT: cmp w5, w9 5474; CHECK-SD-NEXT: fmov s1, w16 5475; CHECK-SD-NEXT: csel w10, w5, w9, lt 5476; CHECK-SD-NEXT: fmov s5, w12 5477; CHECK-SD-NEXT: cmn w10, #8, lsl #12 // =32768 5478; CHECK-SD-NEXT: csel w10, w10, w8, gt 5479; CHECK-SD-NEXT: cmp w6, w9 5480; CHECK-SD-NEXT: mov v1.s[1], w13 5481; CHECK-SD-NEXT: csel w9, w6, w9, lt 5482; CHECK-SD-NEXT: mov v5.s[1], w3 5483; CHECK-SD-NEXT: fmov s0, w17 5484; CHECK-SD-NEXT: cmn w9, #8, lsl #12 // =32768 5485; CHECK-SD-NEXT: csel w8, w9, w8, gt 5486; CHECK-SD-NEXT: fmov s4, w8 5487; CHECK-SD-NEXT: mov v0.s[1], w15 5488; CHECK-SD-NEXT: adrp x8, .LCPI85_0 5489; CHECK-SD-NEXT: ldr q16, [x8, :lo12:.LCPI85_0] 5490; CHECK-SD-NEXT: mov v4.s[1], w10 5491; CHECK-SD-NEXT: tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v16.16b 5492; CHECK-SD-NEXT: tbl v1.16b, { v4.16b, v5.16b, v6.16b, v7.16b }, v16.16b 5493; CHECK-SD-NEXT: ret 5494; 5495; CHECK-GI-LABEL: test_signed_v16f64_v16i16: 5496; CHECK-GI: // %bb.0: 5497; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d 5498; CHECK-GI-NEXT: fcvtzs v1.2d, v1.2d 5499; CHECK-GI-NEXT: adrp x8, .LCPI85_1 5500; CHECK-GI-NEXT: fcvtzs v2.2d, v2.2d 5501; CHECK-GI-NEXT: fcvtzs v3.2d, v3.2d 5502; CHECK-GI-NEXT: ldr q16, [x8, :lo12:.LCPI85_1] 5503; CHECK-GI-NEXT: fcvtzs v4.2d, v4.2d 5504; CHECK-GI-NEXT: fcvtzs v5.2d, v5.2d 5505; CHECK-GI-NEXT: adrp x8, .LCPI85_0 5506; CHECK-GI-NEXT: fcvtzs v6.2d, v6.2d 5507; CHECK-GI-NEXT: fcvtzs v7.2d, v7.2d 5508; CHECK-GI-NEXT: cmgt v17.2d, v16.2d, v0.2d 5509; CHECK-GI-NEXT: cmgt v18.2d, v16.2d, v1.2d 5510; CHECK-GI-NEXT: cmgt v19.2d, v16.2d, v2.2d 5511; CHECK-GI-NEXT: cmgt v20.2d, v16.2d, v3.2d 5512; CHECK-GI-NEXT: cmgt v21.2d, v16.2d, v4.2d 5513; CHECK-GI-NEXT: cmgt v22.2d, v16.2d, v5.2d 5514; CHECK-GI-NEXT: cmgt v23.2d, v16.2d, v6.2d 5515; CHECK-GI-NEXT: cmgt v24.2d, v16.2d, v7.2d 5516; CHECK-GI-NEXT: bif v0.16b, v16.16b, v17.16b 5517; CHECK-GI-NEXT: bif v1.16b, v16.16b, v18.16b 5518; CHECK-GI-NEXT: ldr q17, [x8, :lo12:.LCPI85_0] 5519; CHECK-GI-NEXT: bif v2.16b, v16.16b, v19.16b 5520; CHECK-GI-NEXT: bif v3.16b, v16.16b, v20.16b 5521; CHECK-GI-NEXT: bif v4.16b, v16.16b, v21.16b 5522; CHECK-GI-NEXT: bif v5.16b, v16.16b, v22.16b 5523; CHECK-GI-NEXT: bif v6.16b, v16.16b, v23.16b 5524; CHECK-GI-NEXT: bif v7.16b, v16.16b, v24.16b 5525; CHECK-GI-NEXT: cmgt v16.2d, v0.2d, v17.2d 5526; CHECK-GI-NEXT: cmgt v18.2d, v1.2d, v17.2d 5527; CHECK-GI-NEXT: cmgt v19.2d, v2.2d, v17.2d 5528; CHECK-GI-NEXT: cmgt v20.2d, v3.2d, v17.2d 5529; CHECK-GI-NEXT: cmgt v21.2d, v4.2d, v17.2d 5530; CHECK-GI-NEXT: cmgt v22.2d, v5.2d, v17.2d 5531; CHECK-GI-NEXT: cmgt v23.2d, v6.2d, v17.2d 5532; CHECK-GI-NEXT: cmgt v24.2d, v7.2d, v17.2d 5533; CHECK-GI-NEXT: bif v0.16b, v17.16b, v16.16b 5534; CHECK-GI-NEXT: bif v1.16b, v17.16b, v18.16b 5535; CHECK-GI-NEXT: bif v2.16b, v17.16b, v19.16b 5536; CHECK-GI-NEXT: bif v3.16b, v17.16b, v20.16b 5537; CHECK-GI-NEXT: bif v4.16b, v17.16b, v21.16b 5538; CHECK-GI-NEXT: bif v5.16b, v17.16b, v22.16b 5539; CHECK-GI-NEXT: bif v6.16b, v17.16b, v23.16b 5540; CHECK-GI-NEXT: bif v7.16b, v17.16b, v24.16b 5541; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s 5542; CHECK-GI-NEXT: uzp1 v1.4s, v2.4s, v3.4s 5543; CHECK-GI-NEXT: uzp1 v2.4s, v4.4s, v5.4s 5544; CHECK-GI-NEXT: uzp1 v3.4s, v6.4s, v7.4s 5545; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v1.8h 5546; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h 5547; CHECK-GI-NEXT: ret 5548 %x = call <16 x i16> @llvm.fptosi.sat.v16f64.v16i16(<16 x double> %f) 5549 ret <16 x i16> %x 5550} 5551