xref: /llvm-project/llvm/test/CodeGen/AArch64/fp16_intrinsic_vector_3op.ll (revision 3d18c8cd265c0c0bf1d85226c4770a2dd0f86e8f)
1; RUN: llc < %s -mtriple=aarch64 -mattr=+v8.2a,+fullfp16  | FileCheck %s
2
3declare <4 x half> @llvm.fma.v4f16(<4 x half>, <4 x half>, <4 x half>)
4declare <8 x half> @llvm.fma.v8f16(<8 x half>, <8 x half>, <8 x half>)
5
6define dso_local <4 x half> @t_vfma_f16(<4 x half> %a, <4 x half> %b, <4 x half> %c) {
7; CHECK-LABEL: t_vfma_f16:
8; CHECK:         fmla v0.4h, v2.4h, v1.4h
9; CHECK-NEXT:    ret
10entry:
11  %0 = tail call <4 x half> @llvm.fma.v4f16(<4 x half> %b, <4 x half> %c, <4 x half> %a)
12  ret <4 x half> %0
13}
14
15define dso_local <8 x half> @t_vfmaq_f16(<8 x half> %a, <8 x half> %b, <8 x half> %c) {
16; CHECK-LABEL: t_vfmaq_f16:
17; CHECK:         fmla v0.8h, v2.8h, v1.8h
18; CHECK-NEXT:    ret
19entry:
20  %0 = tail call <8 x half> @llvm.fma.v8f16(<8 x half> %b, <8 x half> %c, <8 x half> %a)
21  ret <8 x half> %0
22}
23