xref: /llvm-project/llvm/test/CodeGen/AArch64/fp16-v8-instructions.ll (revision edc1c3d24e6f8ed548340ce0369138fb40427a24) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-CVT
3; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16
4
5define <8 x half> @add_h(<8 x half> %a, <8 x half> %b) {
6; CHECK-CVT-LABEL: add_h:
7; CHECK-CVT:       // %bb.0: // %entry
8; CHECK-CVT-NEXT:    fcvtl v2.4s, v1.4h
9; CHECK-CVT-NEXT:    fcvtl v3.4s, v0.4h
10; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v1.8h
11; CHECK-CVT-NEXT:    fcvtl2 v0.4s, v0.8h
12; CHECK-CVT-NEXT:    fadd v2.4s, v3.4s, v2.4s
13; CHECK-CVT-NEXT:    fadd v1.4s, v0.4s, v1.4s
14; CHECK-CVT-NEXT:    fcvtn v0.4h, v2.4s
15; CHECK-CVT-NEXT:    fcvtn2 v0.8h, v1.4s
16; CHECK-CVT-NEXT:    ret
17;
18; CHECK-FP16-LABEL: add_h:
19; CHECK-FP16:       // %bb.0: // %entry
20; CHECK-FP16-NEXT:    fadd v0.8h, v0.8h, v1.8h
21; CHECK-FP16-NEXT:    ret
22entry:
23  %0 = fadd <8 x half> %a, %b
24  ret <8 x half> %0
25}
26
27
28define <8 x half> @sub_h(<8 x half> %a, <8 x half> %b) {
29; CHECK-CVT-LABEL: sub_h:
30; CHECK-CVT:       // %bb.0: // %entry
31; CHECK-CVT-NEXT:    fcvtl v2.4s, v1.4h
32; CHECK-CVT-NEXT:    fcvtl v3.4s, v0.4h
33; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v1.8h
34; CHECK-CVT-NEXT:    fcvtl2 v0.4s, v0.8h
35; CHECK-CVT-NEXT:    fsub v2.4s, v3.4s, v2.4s
36; CHECK-CVT-NEXT:    fsub v1.4s, v0.4s, v1.4s
37; CHECK-CVT-NEXT:    fcvtn v0.4h, v2.4s
38; CHECK-CVT-NEXT:    fcvtn2 v0.8h, v1.4s
39; CHECK-CVT-NEXT:    ret
40;
41; CHECK-FP16-LABEL: sub_h:
42; CHECK-FP16:       // %bb.0: // %entry
43; CHECK-FP16-NEXT:    fsub v0.8h, v0.8h, v1.8h
44; CHECK-FP16-NEXT:    ret
45entry:
46  %0 = fsub <8 x half> %a, %b
47  ret <8 x half> %0
48}
49
50
51define <8 x half> @mul_h(<8 x half> %a, <8 x half> %b) {
52; CHECK-CVT-LABEL: mul_h:
53; CHECK-CVT:       // %bb.0: // %entry
54; CHECK-CVT-NEXT:    fcvtl v2.4s, v1.4h
55; CHECK-CVT-NEXT:    fcvtl v3.4s, v0.4h
56; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v1.8h
57; CHECK-CVT-NEXT:    fcvtl2 v0.4s, v0.8h
58; CHECK-CVT-NEXT:    fmul v2.4s, v3.4s, v2.4s
59; CHECK-CVT-NEXT:    fmul v1.4s, v0.4s, v1.4s
60; CHECK-CVT-NEXT:    fcvtn v0.4h, v2.4s
61; CHECK-CVT-NEXT:    fcvtn2 v0.8h, v1.4s
62; CHECK-CVT-NEXT:    ret
63;
64; CHECK-FP16-LABEL: mul_h:
65; CHECK-FP16:       // %bb.0: // %entry
66; CHECK-FP16-NEXT:    fmul v0.8h, v0.8h, v1.8h
67; CHECK-FP16-NEXT:    ret
68entry:
69  %0 = fmul <8 x half> %a, %b
70  ret <8 x half> %0
71}
72
73
74define <8 x half> @div_h(<8 x half> %a, <8 x half> %b) {
75; CHECK-CVT-LABEL: div_h:
76; CHECK-CVT:       // %bb.0: // %entry
77; CHECK-CVT-NEXT:    fcvtl v2.4s, v1.4h
78; CHECK-CVT-NEXT:    fcvtl v3.4s, v0.4h
79; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v1.8h
80; CHECK-CVT-NEXT:    fcvtl2 v0.4s, v0.8h
81; CHECK-CVT-NEXT:    fdiv v2.4s, v3.4s, v2.4s
82; CHECK-CVT-NEXT:    fdiv v1.4s, v0.4s, v1.4s
83; CHECK-CVT-NEXT:    fcvtn v0.4h, v2.4s
84; CHECK-CVT-NEXT:    fcvtn2 v0.8h, v1.4s
85; CHECK-CVT-NEXT:    ret
86;
87; CHECK-FP16-LABEL: div_h:
88; CHECK-FP16:       // %bb.0: // %entry
89; CHECK-FP16-NEXT:    fdiv v0.8h, v0.8h, v1.8h
90; CHECK-FP16-NEXT:    ret
91entry:
92  %0 = fdiv <8 x half> %a, %b
93  ret <8 x half> %0
94}
95
96
97define <8 x half> @load_h(ptr %a) {
98; CHECK-LABEL: load_h:
99; CHECK:       // %bb.0: // %entry
100; CHECK-NEXT:    ldr q0, [x0]
101; CHECK-NEXT:    ret
102entry:
103  %0 = load <8 x half>, ptr %a, align 4
104  ret <8 x half> %0
105}
106
107
108define void @store_h(ptr %a, <8 x half> %b) {
109; CHECK-LABEL: store_h:
110; CHECK:       // %bb.0: // %entry
111; CHECK-NEXT:    str q0, [x0]
112; CHECK-NEXT:    ret
113entry:
114  store <8 x half> %b, ptr %a, align 4
115  ret void
116}
117
118define <8 x half> @s_to_h(<8 x float> %a) {
119; CHECK-LABEL: s_to_h:
120; CHECK:       // %bb.0:
121; CHECK-NEXT:    fcvtn v0.4h, v0.4s
122; CHECK-NEXT:    fcvtn2 v0.8h, v1.4s
123; CHECK-NEXT:    ret
124  %1 = fptrunc <8 x float> %a to <8 x half>
125  ret <8 x half> %1
126}
127
128define <8 x half> @d_to_h(<8 x double> %a) {
129; CHECK-LABEL: d_to_h:
130; CHECK:       // %bb.0:
131; CHECK-NEXT:    fcvtxn v0.2s, v0.2d
132; CHECK-NEXT:    fcvtxn v2.2s, v2.2d
133; CHECK-NEXT:    fcvtxn2 v0.4s, v1.2d
134; CHECK-NEXT:    fcvtxn2 v2.4s, v3.2d
135; CHECK-NEXT:    fcvtn v0.4h, v0.4s
136; CHECK-NEXT:    fcvtn2 v0.8h, v2.4s
137; CHECK-NEXT:    ret
138  %1 = fptrunc <8 x double> %a to <8 x half>
139  ret <8 x half> %1
140}
141
142define <8 x float> @h_to_s(<8 x half> %a) {
143; CHECK-LABEL: h_to_s:
144; CHECK:       // %bb.0:
145; CHECK-NEXT:    fcvtl2 v1.4s, v0.8h
146; CHECK-NEXT:    fcvtl v0.4s, v0.4h
147; CHECK-NEXT:    ret
148  %1 = fpext <8 x half> %a to <8 x float>
149  ret <8 x float> %1
150}
151
152define <8 x double> @h_to_d(<8 x half> %a) {
153; CHECK-LABEL: h_to_d:
154; CHECK:       // %bb.0:
155; CHECK-NEXT:    fcvtl v1.4s, v0.4h
156; CHECK-NEXT:    fcvtl2 v2.4s, v0.8h
157; CHECK-NEXT:    fcvtl v0.2d, v1.2s
158; CHECK-NEXT:    fcvtl2 v3.2d, v2.4s
159; CHECK-NEXT:    fcvtl2 v1.2d, v1.4s
160; CHECK-NEXT:    fcvtl v2.2d, v2.2s
161; CHECK-NEXT:    ret
162  %1 = fpext <8 x half> %a to <8 x double>
163  ret <8 x double> %1
164}
165
166
167define <8 x half> @bitcast_i_to_h(float, <8 x i16> %a) {
168; CHECK-LABEL: bitcast_i_to_h:
169; CHECK:       // %bb.0:
170; CHECK-NEXT:    mov v0.16b, v1.16b
171; CHECK-NEXT:    ret
172  %2 = bitcast <8 x i16> %a to <8 x half>
173  ret <8 x half> %2
174}
175
176define <8 x i16> @bitcast_h_to_i(float, <8 x half> %a) {
177; CHECK-LABEL: bitcast_h_to_i:
178; CHECK:       // %bb.0:
179; CHECK-NEXT:    mov v0.16b, v1.16b
180; CHECK-NEXT:    ret
181  %2 = bitcast <8 x half> %a to <8 x i16>
182  ret <8 x i16> %2
183}
184
185define <4 x half> @sitofp_v4i8(<4 x i8> %a) #0 {
186; CHECK-CVT-LABEL: sitofp_v4i8:
187; CHECK-CVT:       // %bb.0:
188; CHECK-CVT-NEXT:    shl v0.4h, v0.4h, #8
189; CHECK-CVT-NEXT:    sshr v0.4h, v0.4h, #8
190; CHECK-CVT-NEXT:    sshll v0.4s, v0.4h, #0
191; CHECK-CVT-NEXT:    scvtf v0.4s, v0.4s
192; CHECK-CVT-NEXT:    fcvtn v0.4h, v0.4s
193; CHECK-CVT-NEXT:    ret
194;
195; CHECK-FP16-LABEL: sitofp_v4i8:
196; CHECK-FP16:       // %bb.0:
197; CHECK-FP16-NEXT:    shl v0.4h, v0.4h, #8
198; CHECK-FP16-NEXT:    sshr v0.4h, v0.4h, #8
199; CHECK-FP16-NEXT:    scvtf v0.4h, v0.4h
200; CHECK-FP16-NEXT:    ret
201  %1 = sitofp <4 x i8> %a to <4 x half>
202  ret <4 x half> %1
203}
204
205define <8 x half> @sitofp_v8i8(<8 x i8> %a) #0 {
206; CHECK-CVT-LABEL: sitofp_v8i8:
207; CHECK-CVT:       // %bb.0:
208; CHECK-CVT-NEXT:    sshll v0.8h, v0.8b, #0
209; CHECK-CVT-NEXT:    sshll v1.4s, v0.4h, #0
210; CHECK-CVT-NEXT:    sshll2 v2.4s, v0.8h, #0
211; CHECK-CVT-NEXT:    scvtf v1.4s, v1.4s
212; CHECK-CVT-NEXT:    fcvtn v0.4h, v1.4s
213; CHECK-CVT-NEXT:    scvtf v1.4s, v2.4s
214; CHECK-CVT-NEXT:    fcvtn2 v0.8h, v1.4s
215; CHECK-CVT-NEXT:    ret
216;
217; CHECK-FP16-LABEL: sitofp_v8i8:
218; CHECK-FP16:       // %bb.0:
219; CHECK-FP16-NEXT:    sshll v0.8h, v0.8b, #0
220; CHECK-FP16-NEXT:    scvtf v0.8h, v0.8h
221; CHECK-FP16-NEXT:    ret
222  %1 = sitofp <8 x i8> %a to <8 x half>
223  ret <8 x half> %1
224}
225
226define <16 x half> @sitofp_v16i8(<16 x i8> %a) #0 {
227; CHECK-CVT-LABEL: sitofp_v16i8:
228; CHECK-CVT:       // %bb.0:
229; CHECK-CVT-NEXT:    sshll2 v1.8h, v0.16b, #0
230; CHECK-CVT-NEXT:    sshll v0.8h, v0.8b, #0
231; CHECK-CVT-NEXT:    sshll v2.4s, v1.4h, #0
232; CHECK-CVT-NEXT:    sshll v3.4s, v0.4h, #0
233; CHECK-CVT-NEXT:    sshll2 v4.4s, v1.8h, #0
234; CHECK-CVT-NEXT:    sshll2 v5.4s, v0.8h, #0
235; CHECK-CVT-NEXT:    scvtf v2.4s, v2.4s
236; CHECK-CVT-NEXT:    scvtf v3.4s, v3.4s
237; CHECK-CVT-NEXT:    fcvtn v1.4h, v2.4s
238; CHECK-CVT-NEXT:    scvtf v2.4s, v4.4s
239; CHECK-CVT-NEXT:    fcvtn v0.4h, v3.4s
240; CHECK-CVT-NEXT:    scvtf v3.4s, v5.4s
241; CHECK-CVT-NEXT:    fcvtn2 v1.8h, v2.4s
242; CHECK-CVT-NEXT:    fcvtn2 v0.8h, v3.4s
243; CHECK-CVT-NEXT:    ret
244;
245; CHECK-FP16-LABEL: sitofp_v16i8:
246; CHECK-FP16:       // %bb.0:
247; CHECK-FP16-NEXT:    sshll2 v1.8h, v0.16b, #0
248; CHECK-FP16-NEXT:    sshll v0.8h, v0.8b, #0
249; CHECK-FP16-NEXT:    scvtf v1.8h, v1.8h
250; CHECK-FP16-NEXT:    scvtf v0.8h, v0.8h
251; CHECK-FP16-NEXT:    ret
252  %1 = sitofp <16 x i8> %a to <16 x half>
253  ret <16 x half> %1
254}
255
256define <8 x half> @sitofp_i16(<8 x i16> %a) #0 {
257; CHECK-CVT-LABEL: sitofp_i16:
258; CHECK-CVT:       // %bb.0:
259; CHECK-CVT-NEXT:    sshll v1.4s, v0.4h, #0
260; CHECK-CVT-NEXT:    sshll2 v2.4s, v0.8h, #0
261; CHECK-CVT-NEXT:    scvtf v1.4s, v1.4s
262; CHECK-CVT-NEXT:    fcvtn v0.4h, v1.4s
263; CHECK-CVT-NEXT:    scvtf v1.4s, v2.4s
264; CHECK-CVT-NEXT:    fcvtn2 v0.8h, v1.4s
265; CHECK-CVT-NEXT:    ret
266;
267; CHECK-FP16-LABEL: sitofp_i16:
268; CHECK-FP16:       // %bb.0:
269; CHECK-FP16-NEXT:    scvtf v0.8h, v0.8h
270; CHECK-FP16-NEXT:    ret
271  %1 = sitofp <8 x i16> %a to <8 x half>
272  ret <8 x half> %1
273}
274
275define <8 x half> @sitofp_i32(<8 x i32> %a) #0 {
276; CHECK-LABEL: sitofp_i32:
277; CHECK:       // %bb.0:
278; CHECK-NEXT:    scvtf v0.4s, v0.4s
279; CHECK-NEXT:    scvtf v1.4s, v1.4s
280; CHECK-NEXT:    fcvtn v0.4h, v0.4s
281; CHECK-NEXT:    fcvtn2 v0.8h, v1.4s
282; CHECK-NEXT:    ret
283  %1 = sitofp <8 x i32> %a to <8 x half>
284  ret <8 x half> %1
285}
286
287
288define <8 x half> @sitofp_i64(<8 x i64> %a) #0 {
289; CHECK-LABEL: sitofp_i64:
290; CHECK:       // %bb.0:
291; CHECK-NEXT:    scvtf v0.2d, v0.2d
292; CHECK-NEXT:    scvtf v2.2d, v2.2d
293; CHECK-NEXT:    scvtf v1.2d, v1.2d
294; CHECK-NEXT:    scvtf v3.2d, v3.2d
295; CHECK-NEXT:    fcvtn v0.2s, v0.2d
296; CHECK-NEXT:    fcvtn v2.2s, v2.2d
297; CHECK-NEXT:    fcvtn2 v0.4s, v1.2d
298; CHECK-NEXT:    fcvtn2 v2.4s, v3.2d
299; CHECK-NEXT:    fcvtn v0.4h, v0.4s
300; CHECK-NEXT:    fcvtn2 v0.8h, v2.4s
301; CHECK-NEXT:    ret
302  %1 = sitofp <8 x i64> %a to <8 x half>
303  ret <8 x half> %1
304}
305
306define <4 x half> @uitofp_v4i8(<4 x i8> %a) #0 {
307; CHECK-CVT-LABEL: uitofp_v4i8:
308; CHECK-CVT:       // %bb.0:
309; CHECK-CVT-NEXT:    bic v0.4h, #255, lsl #8
310; CHECK-CVT-NEXT:    ushll v0.4s, v0.4h, #0
311; CHECK-CVT-NEXT:    ucvtf v0.4s, v0.4s
312; CHECK-CVT-NEXT:    fcvtn v0.4h, v0.4s
313; CHECK-CVT-NEXT:    ret
314;
315; CHECK-FP16-LABEL: uitofp_v4i8:
316; CHECK-FP16:       // %bb.0:
317; CHECK-FP16-NEXT:    bic v0.4h, #255, lsl #8
318; CHECK-FP16-NEXT:    ucvtf v0.4h, v0.4h
319; CHECK-FP16-NEXT:    ret
320  %1 = uitofp <4 x i8> %a to <4 x half>
321  ret <4 x half> %1
322}
323
324define <8 x half> @uitofp_v8i8(<8 x i8> %a) #0 {
325; CHECK-CVT-LABEL: uitofp_v8i8:
326; CHECK-CVT:       // %bb.0:
327; CHECK-CVT-NEXT:    ushll v0.8h, v0.8b, #0
328; CHECK-CVT-NEXT:    ushll v1.4s, v0.4h, #0
329; CHECK-CVT-NEXT:    ushll2 v2.4s, v0.8h, #0
330; CHECK-CVT-NEXT:    ucvtf v1.4s, v1.4s
331; CHECK-CVT-NEXT:    fcvtn v0.4h, v1.4s
332; CHECK-CVT-NEXT:    ucvtf v1.4s, v2.4s
333; CHECK-CVT-NEXT:    fcvtn2 v0.8h, v1.4s
334; CHECK-CVT-NEXT:    ret
335;
336; CHECK-FP16-LABEL: uitofp_v8i8:
337; CHECK-FP16:       // %bb.0:
338; CHECK-FP16-NEXT:    ushll v0.8h, v0.8b, #0
339; CHECK-FP16-NEXT:    ucvtf v0.8h, v0.8h
340; CHECK-FP16-NEXT:    ret
341  %1 = uitofp <8 x i8> %a to <8 x half>
342  ret <8 x half> %1
343}
344
345define <16 x half> @uitofp_v16i8(<16 x i8> %a) #0 {
346; CHECK-CVT-LABEL: uitofp_v16i8:
347; CHECK-CVT:       // %bb.0:
348; CHECK-CVT-NEXT:    ushll2 v1.8h, v0.16b, #0
349; CHECK-CVT-NEXT:    ushll v0.8h, v0.8b, #0
350; CHECK-CVT-NEXT:    ushll v2.4s, v1.4h, #0
351; CHECK-CVT-NEXT:    ushll v3.4s, v0.4h, #0
352; CHECK-CVT-NEXT:    ushll2 v4.4s, v1.8h, #0
353; CHECK-CVT-NEXT:    ushll2 v5.4s, v0.8h, #0
354; CHECK-CVT-NEXT:    ucvtf v2.4s, v2.4s
355; CHECK-CVT-NEXT:    ucvtf v3.4s, v3.4s
356; CHECK-CVT-NEXT:    fcvtn v1.4h, v2.4s
357; CHECK-CVT-NEXT:    ucvtf v2.4s, v4.4s
358; CHECK-CVT-NEXT:    fcvtn v0.4h, v3.4s
359; CHECK-CVT-NEXT:    ucvtf v3.4s, v5.4s
360; CHECK-CVT-NEXT:    fcvtn2 v1.8h, v2.4s
361; CHECK-CVT-NEXT:    fcvtn2 v0.8h, v3.4s
362; CHECK-CVT-NEXT:    ret
363;
364; CHECK-FP16-LABEL: uitofp_v16i8:
365; CHECK-FP16:       // %bb.0:
366; CHECK-FP16-NEXT:    ushll2 v1.8h, v0.16b, #0
367; CHECK-FP16-NEXT:    ushll v0.8h, v0.8b, #0
368; CHECK-FP16-NEXT:    ucvtf v1.8h, v1.8h
369; CHECK-FP16-NEXT:    ucvtf v0.8h, v0.8h
370; CHECK-FP16-NEXT:    ret
371  %1 = uitofp <16 x i8> %a to <16 x half>
372  ret <16 x half> %1
373}
374
375
376define <8 x half> @uitofp_i16(<8 x i16> %a) #0 {
377; CHECK-CVT-LABEL: uitofp_i16:
378; CHECK-CVT:       // %bb.0:
379; CHECK-CVT-NEXT:    ushll v1.4s, v0.4h, #0
380; CHECK-CVT-NEXT:    ushll2 v2.4s, v0.8h, #0
381; CHECK-CVT-NEXT:    ucvtf v1.4s, v1.4s
382; CHECK-CVT-NEXT:    fcvtn v0.4h, v1.4s
383; CHECK-CVT-NEXT:    ucvtf v1.4s, v2.4s
384; CHECK-CVT-NEXT:    fcvtn2 v0.8h, v1.4s
385; CHECK-CVT-NEXT:    ret
386;
387; CHECK-FP16-LABEL: uitofp_i16:
388; CHECK-FP16:       // %bb.0:
389; CHECK-FP16-NEXT:    ucvtf v0.8h, v0.8h
390; CHECK-FP16-NEXT:    ret
391  %1 = uitofp <8 x i16> %a to <8 x half>
392  ret <8 x half> %1
393}
394
395
396define <8 x half> @uitofp_i32(<8 x i32> %a) #0 {
397; CHECK-LABEL: uitofp_i32:
398; CHECK:       // %bb.0:
399; CHECK-NEXT:    ucvtf v0.4s, v0.4s
400; CHECK-NEXT:    ucvtf v1.4s, v1.4s
401; CHECK-NEXT:    fcvtn v0.4h, v0.4s
402; CHECK-NEXT:    fcvtn2 v0.8h, v1.4s
403; CHECK-NEXT:    ret
404  %1 = uitofp <8 x i32> %a to <8 x half>
405  ret <8 x half> %1
406}
407
408
409define <8 x half> @uitofp_i64(<8 x i64> %a) #0 {
410; CHECK-LABEL: uitofp_i64:
411; CHECK:       // %bb.0:
412; CHECK-NEXT:    ucvtf v0.2d, v0.2d
413; CHECK-NEXT:    ucvtf v2.2d, v2.2d
414; CHECK-NEXT:    ucvtf v1.2d, v1.2d
415; CHECK-NEXT:    ucvtf v3.2d, v3.2d
416; CHECK-NEXT:    fcvtn v0.2s, v0.2d
417; CHECK-NEXT:    fcvtn v2.2s, v2.2d
418; CHECK-NEXT:    fcvtn2 v0.4s, v1.2d
419; CHECK-NEXT:    fcvtn2 v2.4s, v3.2d
420; CHECK-NEXT:    fcvtn v0.4h, v0.4s
421; CHECK-NEXT:    fcvtn2 v0.8h, v2.4s
422; CHECK-NEXT:    ret
423  %1 = uitofp <8 x i64> %a to <8 x half>
424  ret <8 x half> %1
425}
426
427define void @test_insert_at_zero(half %a, ptr %b) #0 {
428; CHECK-LABEL: test_insert_at_zero:
429; CHECK:       // %bb.0:
430; CHECK-NEXT:    // kill: def $h0 killed $h0 def $q0
431; CHECK-NEXT:    str q0, [x0]
432; CHECK-NEXT:    ret
433  %1 = insertelement <8 x half> undef, half %a, i64 0
434  store <8 x half> %1, ptr %b, align 4
435  ret void
436}
437
438define <8 x i8> @fptosi_i8(<8 x half> %a) #0 {
439; CHECK-CVT-LABEL: fptosi_i8:
440; CHECK-CVT:       // %bb.0:
441; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v0.8h
442; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
443; CHECK-CVT-NEXT:    fcvtzs v1.4s, v1.4s
444; CHECK-CVT-NEXT:    fcvtzs v0.4s, v0.4s
445; CHECK-CVT-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
446; CHECK-CVT-NEXT:    xtn v0.8b, v0.8h
447; CHECK-CVT-NEXT:    ret
448;
449; CHECK-FP16-LABEL: fptosi_i8:
450; CHECK-FP16:       // %bb.0:
451; CHECK-FP16-NEXT:    fcvtzs v0.8h, v0.8h
452; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
453; CHECK-FP16-NEXT:    ret
454  %1 = fptosi<8 x half> %a to <8 x i8>
455  ret <8 x i8> %1
456}
457
458define <8 x i16> @fptosi_i16(<8 x half> %a) #0 {
459; CHECK-CVT-LABEL: fptosi_i16:
460; CHECK-CVT:       // %bb.0:
461; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v0.8h
462; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
463; CHECK-CVT-NEXT:    fcvtzs v1.4s, v1.4s
464; CHECK-CVT-NEXT:    fcvtzs v0.4s, v0.4s
465; CHECK-CVT-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
466; CHECK-CVT-NEXT:    ret
467;
468; CHECK-FP16-LABEL: fptosi_i16:
469; CHECK-FP16:       // %bb.0:
470; CHECK-FP16-NEXT:    fcvtzs v0.8h, v0.8h
471; CHECK-FP16-NEXT:    ret
472  %1 = fptosi<8 x half> %a to <8 x i16>
473  ret <8 x i16> %1
474}
475
476define <8 x i8> @fptoui_i8(<8 x half> %a) #0 {
477; CHECK-CVT-LABEL: fptoui_i8:
478; CHECK-CVT:       // %bb.0:
479; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v0.8h
480; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
481; CHECK-CVT-NEXT:    fcvtzu v1.4s, v1.4s
482; CHECK-CVT-NEXT:    fcvtzu v0.4s, v0.4s
483; CHECK-CVT-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
484; CHECK-CVT-NEXT:    xtn v0.8b, v0.8h
485; CHECK-CVT-NEXT:    ret
486;
487; CHECK-FP16-LABEL: fptoui_i8:
488; CHECK-FP16:       // %bb.0:
489; CHECK-FP16-NEXT:    fcvtzu v0.8h, v0.8h
490; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
491; CHECK-FP16-NEXT:    ret
492  %1 = fptoui<8 x half> %a to <8 x i8>
493  ret <8 x i8> %1
494}
495
496define <8 x i16> @fptoui_i16(<8 x half> %a) #0 {
497; CHECK-CVT-LABEL: fptoui_i16:
498; CHECK-CVT:       // %bb.0:
499; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v0.8h
500; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
501; CHECK-CVT-NEXT:    fcvtzu v1.4s, v1.4s
502; CHECK-CVT-NEXT:    fcvtzu v0.4s, v0.4s
503; CHECK-CVT-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
504; CHECK-CVT-NEXT:    ret
505;
506; CHECK-FP16-LABEL: fptoui_i16:
507; CHECK-FP16:       // %bb.0:
508; CHECK-FP16-NEXT:    fcvtzu v0.8h, v0.8h
509; CHECK-FP16-NEXT:    ret
510  %1 = fptoui<8 x half> %a to <8 x i16>
511  ret <8 x i16> %1
512}
513
514define <8 x i1> @test_fcmp_une(<8 x half> %a, <8 x half> %b) #0 {
515; CHECK-CVT-LABEL: test_fcmp_une:
516; CHECK-CVT:       // %bb.0:
517; CHECK-CVT-NEXT:    mov h2, v1.h[1]
518; CHECK-CVT-NEXT:    mov h3, v0.h[1]
519; CHECK-CVT-NEXT:    fcvt s4, h1
520; CHECK-CVT-NEXT:    fcvt s5, h0
521; CHECK-CVT-NEXT:    mov h6, v1.h[2]
522; CHECK-CVT-NEXT:    fcvt s2, h2
523; CHECK-CVT-NEXT:    fcvt s3, h3
524; CHECK-CVT-NEXT:    fcmp s3, s2
525; CHECK-CVT-NEXT:    mov h2, v0.h[2]
526; CHECK-CVT-NEXT:    mov h3, v1.h[3]
527; CHECK-CVT-NEXT:    csetm w8, ne
528; CHECK-CVT-NEXT:    fcmp s5, s4
529; CHECK-CVT-NEXT:    fcvt s5, h6
530; CHECK-CVT-NEXT:    fcvt s2, h2
531; CHECK-CVT-NEXT:    mov h4, v0.h[3]
532; CHECK-CVT-NEXT:    fcvt s3, h3
533; CHECK-CVT-NEXT:    mov h6, v0.h[4]
534; CHECK-CVT-NEXT:    csetm w9, ne
535; CHECK-CVT-NEXT:    fcmp s2, s5
536; CHECK-CVT-NEXT:    fmov s2, w9
537; CHECK-CVT-NEXT:    fcvt s4, h4
538; CHECK-CVT-NEXT:    mov h5, v1.h[4]
539; CHECK-CVT-NEXT:    fcvt s6, h6
540; CHECK-CVT-NEXT:    mov v2.h[1], w8
541; CHECK-CVT-NEXT:    csetm w8, ne
542; CHECK-CVT-NEXT:    fcmp s4, s3
543; CHECK-CVT-NEXT:    mov h3, v1.h[5]
544; CHECK-CVT-NEXT:    mov h4, v0.h[5]
545; CHECK-CVT-NEXT:    fcvt s5, h5
546; CHECK-CVT-NEXT:    mov v2.h[2], w8
547; CHECK-CVT-NEXT:    csetm w8, ne
548; CHECK-CVT-NEXT:    fcvt s3, h3
549; CHECK-CVT-NEXT:    fcvt s4, h4
550; CHECK-CVT-NEXT:    fcmp s6, s5
551; CHECK-CVT-NEXT:    mov h5, v1.h[6]
552; CHECK-CVT-NEXT:    mov h6, v0.h[6]
553; CHECK-CVT-NEXT:    mov h1, v1.h[7]
554; CHECK-CVT-NEXT:    mov h0, v0.h[7]
555; CHECK-CVT-NEXT:    mov v2.h[3], w8
556; CHECK-CVT-NEXT:    csetm w8, ne
557; CHECK-CVT-NEXT:    fcmp s4, s3
558; CHECK-CVT-NEXT:    fcvt s3, h5
559; CHECK-CVT-NEXT:    fcvt s4, h6
560; CHECK-CVT-NEXT:    fcvt s1, h1
561; CHECK-CVT-NEXT:    fcvt s0, h0
562; CHECK-CVT-NEXT:    mov v2.h[4], w8
563; CHECK-CVT-NEXT:    csetm w8, ne
564; CHECK-CVT-NEXT:    fcmp s4, s3
565; CHECK-CVT-NEXT:    mov v2.h[5], w8
566; CHECK-CVT-NEXT:    csetm w8, ne
567; CHECK-CVT-NEXT:    fcmp s0, s1
568; CHECK-CVT-NEXT:    mov v2.h[6], w8
569; CHECK-CVT-NEXT:    csetm w8, ne
570; CHECK-CVT-NEXT:    mov v2.h[7], w8
571; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
572; CHECK-CVT-NEXT:    ret
573;
574; CHECK-FP16-LABEL: test_fcmp_une:
575; CHECK-FP16:       // %bb.0:
576; CHECK-FP16-NEXT:    fcmeq v0.8h, v0.8h, v1.8h
577; CHECK-FP16-NEXT:    mvn v0.16b, v0.16b
578; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
579; CHECK-FP16-NEXT:    ret
580  %1 = fcmp une <8 x half> %a, %b
581  ret <8 x i1> %1
582}
583
584define <8 x i1> @test_fcmp_ueq(<8 x half> %a, <8 x half> %b) #0 {
585; CHECK-CVT-LABEL: test_fcmp_ueq:
586; CHECK-CVT:       // %bb.0:
587; CHECK-CVT-NEXT:    mov h2, v1.h[1]
588; CHECK-CVT-NEXT:    mov h3, v0.h[1]
589; CHECK-CVT-NEXT:    fcvt s4, h1
590; CHECK-CVT-NEXT:    fcvt s6, h0
591; CHECK-CVT-NEXT:    mov h5, v1.h[2]
592; CHECK-CVT-NEXT:    fcvt s2, h2
593; CHECK-CVT-NEXT:    fcvt s3, h3
594; CHECK-CVT-NEXT:    fcmp s3, s2
595; CHECK-CVT-NEXT:    mov h2, v0.h[2]
596; CHECK-CVT-NEXT:    fcvt s3, h5
597; CHECK-CVT-NEXT:    mov h5, v0.h[3]
598; CHECK-CVT-NEXT:    csetm w8, eq
599; CHECK-CVT-NEXT:    csinv w8, w8, wzr, vc
600; CHECK-CVT-NEXT:    fcmp s6, s4
601; CHECK-CVT-NEXT:    fcvt s2, h2
602; CHECK-CVT-NEXT:    mov h4, v1.h[3]
603; CHECK-CVT-NEXT:    mov h6, v1.h[4]
604; CHECK-CVT-NEXT:    csetm w9, eq
605; CHECK-CVT-NEXT:    csinv w9, w9, wzr, vc
606; CHECK-CVT-NEXT:    fcmp s2, s3
607; CHECK-CVT-NEXT:    mov h2, v0.h[4]
608; CHECK-CVT-NEXT:    fcvt s3, h4
609; CHECK-CVT-NEXT:    fcvt s4, h5
610; CHECK-CVT-NEXT:    fmov s5, w9
611; CHECK-CVT-NEXT:    fcvt s6, h6
612; CHECK-CVT-NEXT:    mov v5.h[1], w8
613; CHECK-CVT-NEXT:    csetm w8, eq
614; CHECK-CVT-NEXT:    fcvt s2, h2
615; CHECK-CVT-NEXT:    csinv w8, w8, wzr, vc
616; CHECK-CVT-NEXT:    fcmp s4, s3
617; CHECK-CVT-NEXT:    mov h3, v1.h[5]
618; CHECK-CVT-NEXT:    mov h4, v0.h[5]
619; CHECK-CVT-NEXT:    mov v5.h[2], w8
620; CHECK-CVT-NEXT:    csetm w8, eq
621; CHECK-CVT-NEXT:    csinv w8, w8, wzr, vc
622; CHECK-CVT-NEXT:    fcmp s2, s6
623; CHECK-CVT-NEXT:    fcvt s2, h3
624; CHECK-CVT-NEXT:    fcvt s3, h4
625; CHECK-CVT-NEXT:    mov h4, v1.h[6]
626; CHECK-CVT-NEXT:    mov h6, v0.h[6]
627; CHECK-CVT-NEXT:    mov h1, v1.h[7]
628; CHECK-CVT-NEXT:    mov h0, v0.h[7]
629; CHECK-CVT-NEXT:    mov v5.h[3], w8
630; CHECK-CVT-NEXT:    csetm w8, eq
631; CHECK-CVT-NEXT:    csinv w8, w8, wzr, vc
632; CHECK-CVT-NEXT:    fcmp s3, s2
633; CHECK-CVT-NEXT:    fcvt s2, h4
634; CHECK-CVT-NEXT:    fcvt s3, h6
635; CHECK-CVT-NEXT:    fcvt s1, h1
636; CHECK-CVT-NEXT:    fcvt s0, h0
637; CHECK-CVT-NEXT:    mov v5.h[4], w8
638; CHECK-CVT-NEXT:    csetm w8, eq
639; CHECK-CVT-NEXT:    csinv w8, w8, wzr, vc
640; CHECK-CVT-NEXT:    fcmp s3, s2
641; CHECK-CVT-NEXT:    mov v5.h[5], w8
642; CHECK-CVT-NEXT:    csetm w8, eq
643; CHECK-CVT-NEXT:    csinv w8, w8, wzr, vc
644; CHECK-CVT-NEXT:    fcmp s0, s1
645; CHECK-CVT-NEXT:    mov v5.h[6], w8
646; CHECK-CVT-NEXT:    csetm w8, eq
647; CHECK-CVT-NEXT:    csinv w8, w8, wzr, vc
648; CHECK-CVT-NEXT:    mov v5.h[7], w8
649; CHECK-CVT-NEXT:    xtn v0.8b, v5.8h
650; CHECK-CVT-NEXT:    ret
651;
652; CHECK-FP16-LABEL: test_fcmp_ueq:
653; CHECK-FP16:       // %bb.0:
654; CHECK-FP16-NEXT:    fcmgt v2.8h, v0.8h, v1.8h
655; CHECK-FP16-NEXT:    fcmgt v0.8h, v1.8h, v0.8h
656; CHECK-FP16-NEXT:    orr v0.16b, v0.16b, v2.16b
657; CHECK-FP16-NEXT:    mvn v0.16b, v0.16b
658; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
659; CHECK-FP16-NEXT:    ret
660  %1 = fcmp ueq <8 x half> %a, %b
661  ret <8 x i1> %1
662}
663
664define <8 x i1> @test_fcmp_ugt(<8 x half> %a, <8 x half> %b) #0 {
665; CHECK-CVT-LABEL: test_fcmp_ugt:
666; CHECK-CVT:       // %bb.0:
667; CHECK-CVT-NEXT:    mov h2, v1.h[1]
668; CHECK-CVT-NEXT:    mov h3, v0.h[1]
669; CHECK-CVT-NEXT:    fcvt s4, h1
670; CHECK-CVT-NEXT:    fcvt s5, h0
671; CHECK-CVT-NEXT:    mov h6, v1.h[2]
672; CHECK-CVT-NEXT:    fcvt s2, h2
673; CHECK-CVT-NEXT:    fcvt s3, h3
674; CHECK-CVT-NEXT:    fcmp s3, s2
675; CHECK-CVT-NEXT:    mov h2, v0.h[2]
676; CHECK-CVT-NEXT:    mov h3, v1.h[3]
677; CHECK-CVT-NEXT:    csetm w8, hi
678; CHECK-CVT-NEXT:    fcmp s5, s4
679; CHECK-CVT-NEXT:    fcvt s5, h6
680; CHECK-CVT-NEXT:    fcvt s2, h2
681; CHECK-CVT-NEXT:    mov h4, v0.h[3]
682; CHECK-CVT-NEXT:    fcvt s3, h3
683; CHECK-CVT-NEXT:    mov h6, v0.h[4]
684; CHECK-CVT-NEXT:    csetm w9, hi
685; CHECK-CVT-NEXT:    fcmp s2, s5
686; CHECK-CVT-NEXT:    fmov s2, w9
687; CHECK-CVT-NEXT:    fcvt s4, h4
688; CHECK-CVT-NEXT:    mov h5, v1.h[4]
689; CHECK-CVT-NEXT:    fcvt s6, h6
690; CHECK-CVT-NEXT:    mov v2.h[1], w8
691; CHECK-CVT-NEXT:    csetm w8, hi
692; CHECK-CVT-NEXT:    fcmp s4, s3
693; CHECK-CVT-NEXT:    mov h3, v1.h[5]
694; CHECK-CVT-NEXT:    mov h4, v0.h[5]
695; CHECK-CVT-NEXT:    fcvt s5, h5
696; CHECK-CVT-NEXT:    mov v2.h[2], w8
697; CHECK-CVT-NEXT:    csetm w8, hi
698; CHECK-CVT-NEXT:    fcvt s3, h3
699; CHECK-CVT-NEXT:    fcvt s4, h4
700; CHECK-CVT-NEXT:    fcmp s6, s5
701; CHECK-CVT-NEXT:    mov h5, v1.h[6]
702; CHECK-CVT-NEXT:    mov h6, v0.h[6]
703; CHECK-CVT-NEXT:    mov h1, v1.h[7]
704; CHECK-CVT-NEXT:    mov h0, v0.h[7]
705; CHECK-CVT-NEXT:    mov v2.h[3], w8
706; CHECK-CVT-NEXT:    csetm w8, hi
707; CHECK-CVT-NEXT:    fcmp s4, s3
708; CHECK-CVT-NEXT:    fcvt s3, h5
709; CHECK-CVT-NEXT:    fcvt s4, h6
710; CHECK-CVT-NEXT:    fcvt s1, h1
711; CHECK-CVT-NEXT:    fcvt s0, h0
712; CHECK-CVT-NEXT:    mov v2.h[4], w8
713; CHECK-CVT-NEXT:    csetm w8, hi
714; CHECK-CVT-NEXT:    fcmp s4, s3
715; CHECK-CVT-NEXT:    mov v2.h[5], w8
716; CHECK-CVT-NEXT:    csetm w8, hi
717; CHECK-CVT-NEXT:    fcmp s0, s1
718; CHECK-CVT-NEXT:    mov v2.h[6], w8
719; CHECK-CVT-NEXT:    csetm w8, hi
720; CHECK-CVT-NEXT:    mov v2.h[7], w8
721; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
722; CHECK-CVT-NEXT:    ret
723;
724; CHECK-FP16-LABEL: test_fcmp_ugt:
725; CHECK-FP16:       // %bb.0:
726; CHECK-FP16-NEXT:    fcmge v0.8h, v1.8h, v0.8h
727; CHECK-FP16-NEXT:    mvn v0.16b, v0.16b
728; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
729; CHECK-FP16-NEXT:    ret
730  %1 = fcmp ugt <8 x half> %a, %b
731  ret <8 x i1> %1
732}
733
734define <8 x i1> @test_fcmp_uge(<8 x half> %a, <8 x half> %b) #0 {
735; CHECK-CVT-LABEL: test_fcmp_uge:
736; CHECK-CVT:       // %bb.0:
737; CHECK-CVT-NEXT:    mov h2, v1.h[1]
738; CHECK-CVT-NEXT:    mov h3, v0.h[1]
739; CHECK-CVT-NEXT:    fcvt s4, h1
740; CHECK-CVT-NEXT:    fcvt s5, h0
741; CHECK-CVT-NEXT:    mov h6, v1.h[2]
742; CHECK-CVT-NEXT:    fcvt s2, h2
743; CHECK-CVT-NEXT:    fcvt s3, h3
744; CHECK-CVT-NEXT:    fcmp s3, s2
745; CHECK-CVT-NEXT:    mov h2, v0.h[2]
746; CHECK-CVT-NEXT:    mov h3, v1.h[3]
747; CHECK-CVT-NEXT:    csetm w8, pl
748; CHECK-CVT-NEXT:    fcmp s5, s4
749; CHECK-CVT-NEXT:    fcvt s5, h6
750; CHECK-CVT-NEXT:    fcvt s2, h2
751; CHECK-CVT-NEXT:    mov h4, v0.h[3]
752; CHECK-CVT-NEXT:    fcvt s3, h3
753; CHECK-CVT-NEXT:    mov h6, v0.h[4]
754; CHECK-CVT-NEXT:    csetm w9, pl
755; CHECK-CVT-NEXT:    fcmp s2, s5
756; CHECK-CVT-NEXT:    fmov s2, w9
757; CHECK-CVT-NEXT:    fcvt s4, h4
758; CHECK-CVT-NEXT:    mov h5, v1.h[4]
759; CHECK-CVT-NEXT:    fcvt s6, h6
760; CHECK-CVT-NEXT:    mov v2.h[1], w8
761; CHECK-CVT-NEXT:    csetm w8, pl
762; CHECK-CVT-NEXT:    fcmp s4, s3
763; CHECK-CVT-NEXT:    mov h3, v1.h[5]
764; CHECK-CVT-NEXT:    mov h4, v0.h[5]
765; CHECK-CVT-NEXT:    fcvt s5, h5
766; CHECK-CVT-NEXT:    mov v2.h[2], w8
767; CHECK-CVT-NEXT:    csetm w8, pl
768; CHECK-CVT-NEXT:    fcvt s3, h3
769; CHECK-CVT-NEXT:    fcvt s4, h4
770; CHECK-CVT-NEXT:    fcmp s6, s5
771; CHECK-CVT-NEXT:    mov h5, v1.h[6]
772; CHECK-CVT-NEXT:    mov h6, v0.h[6]
773; CHECK-CVT-NEXT:    mov h1, v1.h[7]
774; CHECK-CVT-NEXT:    mov h0, v0.h[7]
775; CHECK-CVT-NEXT:    mov v2.h[3], w8
776; CHECK-CVT-NEXT:    csetm w8, pl
777; CHECK-CVT-NEXT:    fcmp s4, s3
778; CHECK-CVT-NEXT:    fcvt s3, h5
779; CHECK-CVT-NEXT:    fcvt s4, h6
780; CHECK-CVT-NEXT:    fcvt s1, h1
781; CHECK-CVT-NEXT:    fcvt s0, h0
782; CHECK-CVT-NEXT:    mov v2.h[4], w8
783; CHECK-CVT-NEXT:    csetm w8, pl
784; CHECK-CVT-NEXT:    fcmp s4, s3
785; CHECK-CVT-NEXT:    mov v2.h[5], w8
786; CHECK-CVT-NEXT:    csetm w8, pl
787; CHECK-CVT-NEXT:    fcmp s0, s1
788; CHECK-CVT-NEXT:    mov v2.h[6], w8
789; CHECK-CVT-NEXT:    csetm w8, pl
790; CHECK-CVT-NEXT:    mov v2.h[7], w8
791; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
792; CHECK-CVT-NEXT:    ret
793;
794; CHECK-FP16-LABEL: test_fcmp_uge:
795; CHECK-FP16:       // %bb.0:
796; CHECK-FP16-NEXT:    fcmgt v0.8h, v1.8h, v0.8h
797; CHECK-FP16-NEXT:    mvn v0.16b, v0.16b
798; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
799; CHECK-FP16-NEXT:    ret
800  %1 = fcmp uge <8 x half> %a, %b
801  ret <8 x i1> %1
802}
803
804define <8 x i1> @test_fcmp_ult(<8 x half> %a, <8 x half> %b) #0 {
805; CHECK-CVT-LABEL: test_fcmp_ult:
806; CHECK-CVT:       // %bb.0:
807; CHECK-CVT-NEXT:    mov h2, v1.h[1]
808; CHECK-CVT-NEXT:    mov h3, v0.h[1]
809; CHECK-CVT-NEXT:    fcvt s4, h1
810; CHECK-CVT-NEXT:    fcvt s5, h0
811; CHECK-CVT-NEXT:    mov h6, v1.h[2]
812; CHECK-CVT-NEXT:    fcvt s2, h2
813; CHECK-CVT-NEXT:    fcvt s3, h3
814; CHECK-CVT-NEXT:    fcmp s3, s2
815; CHECK-CVT-NEXT:    mov h2, v0.h[2]
816; CHECK-CVT-NEXT:    mov h3, v1.h[3]
817; CHECK-CVT-NEXT:    csetm w8, lt
818; CHECK-CVT-NEXT:    fcmp s5, s4
819; CHECK-CVT-NEXT:    fcvt s5, h6
820; CHECK-CVT-NEXT:    fcvt s2, h2
821; CHECK-CVT-NEXT:    mov h4, v0.h[3]
822; CHECK-CVT-NEXT:    fcvt s3, h3
823; CHECK-CVT-NEXT:    mov h6, v0.h[4]
824; CHECK-CVT-NEXT:    csetm w9, lt
825; CHECK-CVT-NEXT:    fcmp s2, s5
826; CHECK-CVT-NEXT:    fmov s2, w9
827; CHECK-CVT-NEXT:    fcvt s4, h4
828; CHECK-CVT-NEXT:    mov h5, v1.h[4]
829; CHECK-CVT-NEXT:    fcvt s6, h6
830; CHECK-CVT-NEXT:    mov v2.h[1], w8
831; CHECK-CVT-NEXT:    csetm w8, lt
832; CHECK-CVT-NEXT:    fcmp s4, s3
833; CHECK-CVT-NEXT:    mov h3, v1.h[5]
834; CHECK-CVT-NEXT:    mov h4, v0.h[5]
835; CHECK-CVT-NEXT:    fcvt s5, h5
836; CHECK-CVT-NEXT:    mov v2.h[2], w8
837; CHECK-CVT-NEXT:    csetm w8, lt
838; CHECK-CVT-NEXT:    fcvt s3, h3
839; CHECK-CVT-NEXT:    fcvt s4, h4
840; CHECK-CVT-NEXT:    fcmp s6, s5
841; CHECK-CVT-NEXT:    mov h5, v1.h[6]
842; CHECK-CVT-NEXT:    mov h6, v0.h[6]
843; CHECK-CVT-NEXT:    mov h1, v1.h[7]
844; CHECK-CVT-NEXT:    mov h0, v0.h[7]
845; CHECK-CVT-NEXT:    mov v2.h[3], w8
846; CHECK-CVT-NEXT:    csetm w8, lt
847; CHECK-CVT-NEXT:    fcmp s4, s3
848; CHECK-CVT-NEXT:    fcvt s3, h5
849; CHECK-CVT-NEXT:    fcvt s4, h6
850; CHECK-CVT-NEXT:    fcvt s1, h1
851; CHECK-CVT-NEXT:    fcvt s0, h0
852; CHECK-CVT-NEXT:    mov v2.h[4], w8
853; CHECK-CVT-NEXT:    csetm w8, lt
854; CHECK-CVT-NEXT:    fcmp s4, s3
855; CHECK-CVT-NEXT:    mov v2.h[5], w8
856; CHECK-CVT-NEXT:    csetm w8, lt
857; CHECK-CVT-NEXT:    fcmp s0, s1
858; CHECK-CVT-NEXT:    mov v2.h[6], w8
859; CHECK-CVT-NEXT:    csetm w8, lt
860; CHECK-CVT-NEXT:    mov v2.h[7], w8
861; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
862; CHECK-CVT-NEXT:    ret
863;
864; CHECK-FP16-LABEL: test_fcmp_ult:
865; CHECK-FP16:       // %bb.0:
866; CHECK-FP16-NEXT:    fcmge v0.8h, v0.8h, v1.8h
867; CHECK-FP16-NEXT:    mvn v0.16b, v0.16b
868; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
869; CHECK-FP16-NEXT:    ret
870  %1 = fcmp ult <8 x half> %a, %b
871  ret <8 x i1> %1
872}
873
874define <8 x i1> @test_fcmp_ule(<8 x half> %a, <8 x half> %b) #0 {
875; CHECK-CVT-LABEL: test_fcmp_ule:
876; CHECK-CVT:       // %bb.0:
877; CHECK-CVT-NEXT:    mov h2, v1.h[1]
878; CHECK-CVT-NEXT:    mov h3, v0.h[1]
879; CHECK-CVT-NEXT:    fcvt s4, h1
880; CHECK-CVT-NEXT:    fcvt s5, h0
881; CHECK-CVT-NEXT:    mov h6, v1.h[2]
882; CHECK-CVT-NEXT:    fcvt s2, h2
883; CHECK-CVT-NEXT:    fcvt s3, h3
884; CHECK-CVT-NEXT:    fcmp s3, s2
885; CHECK-CVT-NEXT:    mov h2, v0.h[2]
886; CHECK-CVT-NEXT:    mov h3, v1.h[3]
887; CHECK-CVT-NEXT:    csetm w8, le
888; CHECK-CVT-NEXT:    fcmp s5, s4
889; CHECK-CVT-NEXT:    fcvt s5, h6
890; CHECK-CVT-NEXT:    fcvt s2, h2
891; CHECK-CVT-NEXT:    mov h4, v0.h[3]
892; CHECK-CVT-NEXT:    fcvt s3, h3
893; CHECK-CVT-NEXT:    mov h6, v0.h[4]
894; CHECK-CVT-NEXT:    csetm w9, le
895; CHECK-CVT-NEXT:    fcmp s2, s5
896; CHECK-CVT-NEXT:    fmov s2, w9
897; CHECK-CVT-NEXT:    fcvt s4, h4
898; CHECK-CVT-NEXT:    mov h5, v1.h[4]
899; CHECK-CVT-NEXT:    fcvt s6, h6
900; CHECK-CVT-NEXT:    mov v2.h[1], w8
901; CHECK-CVT-NEXT:    csetm w8, le
902; CHECK-CVT-NEXT:    fcmp s4, s3
903; CHECK-CVT-NEXT:    mov h3, v1.h[5]
904; CHECK-CVT-NEXT:    mov h4, v0.h[5]
905; CHECK-CVT-NEXT:    fcvt s5, h5
906; CHECK-CVT-NEXT:    mov v2.h[2], w8
907; CHECK-CVT-NEXT:    csetm w8, le
908; CHECK-CVT-NEXT:    fcvt s3, h3
909; CHECK-CVT-NEXT:    fcvt s4, h4
910; CHECK-CVT-NEXT:    fcmp s6, s5
911; CHECK-CVT-NEXT:    mov h5, v1.h[6]
912; CHECK-CVT-NEXT:    mov h6, v0.h[6]
913; CHECK-CVT-NEXT:    mov h1, v1.h[7]
914; CHECK-CVT-NEXT:    mov h0, v0.h[7]
915; CHECK-CVT-NEXT:    mov v2.h[3], w8
916; CHECK-CVT-NEXT:    csetm w8, le
917; CHECK-CVT-NEXT:    fcmp s4, s3
918; CHECK-CVT-NEXT:    fcvt s3, h5
919; CHECK-CVT-NEXT:    fcvt s4, h6
920; CHECK-CVT-NEXT:    fcvt s1, h1
921; CHECK-CVT-NEXT:    fcvt s0, h0
922; CHECK-CVT-NEXT:    mov v2.h[4], w8
923; CHECK-CVT-NEXT:    csetm w8, le
924; CHECK-CVT-NEXT:    fcmp s4, s3
925; CHECK-CVT-NEXT:    mov v2.h[5], w8
926; CHECK-CVT-NEXT:    csetm w8, le
927; CHECK-CVT-NEXT:    fcmp s0, s1
928; CHECK-CVT-NEXT:    mov v2.h[6], w8
929; CHECK-CVT-NEXT:    csetm w8, le
930; CHECK-CVT-NEXT:    mov v2.h[7], w8
931; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
932; CHECK-CVT-NEXT:    ret
933;
934; CHECK-FP16-LABEL: test_fcmp_ule:
935; CHECK-FP16:       // %bb.0:
936; CHECK-FP16-NEXT:    fcmgt v0.8h, v0.8h, v1.8h
937; CHECK-FP16-NEXT:    mvn v0.16b, v0.16b
938; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
939; CHECK-FP16-NEXT:    ret
940  %1 = fcmp ule <8 x half> %a, %b
941  ret <8 x i1> %1
942}
943
944define <8 x i1> @test_fcmp_uno(<8 x half> %a, <8 x half> %b) #0 {
945; CHECK-CVT-LABEL: test_fcmp_uno:
946; CHECK-CVT:       // %bb.0:
947; CHECK-CVT-NEXT:    mov h2, v1.h[1]
948; CHECK-CVT-NEXT:    mov h3, v0.h[1]
949; CHECK-CVT-NEXT:    fcvt s4, h1
950; CHECK-CVT-NEXT:    fcvt s5, h0
951; CHECK-CVT-NEXT:    mov h6, v1.h[2]
952; CHECK-CVT-NEXT:    fcvt s2, h2
953; CHECK-CVT-NEXT:    fcvt s3, h3
954; CHECK-CVT-NEXT:    fcmp s3, s2
955; CHECK-CVT-NEXT:    mov h2, v0.h[2]
956; CHECK-CVT-NEXT:    mov h3, v1.h[3]
957; CHECK-CVT-NEXT:    csetm w8, vs
958; CHECK-CVT-NEXT:    fcmp s5, s4
959; CHECK-CVT-NEXT:    fcvt s5, h6
960; CHECK-CVT-NEXT:    fcvt s2, h2
961; CHECK-CVT-NEXT:    mov h4, v0.h[3]
962; CHECK-CVT-NEXT:    fcvt s3, h3
963; CHECK-CVT-NEXT:    mov h6, v0.h[4]
964; CHECK-CVT-NEXT:    csetm w9, vs
965; CHECK-CVT-NEXT:    fcmp s2, s5
966; CHECK-CVT-NEXT:    fmov s2, w9
967; CHECK-CVT-NEXT:    fcvt s4, h4
968; CHECK-CVT-NEXT:    mov h5, v1.h[4]
969; CHECK-CVT-NEXT:    fcvt s6, h6
970; CHECK-CVT-NEXT:    mov v2.h[1], w8
971; CHECK-CVT-NEXT:    csetm w8, vs
972; CHECK-CVT-NEXT:    fcmp s4, s3
973; CHECK-CVT-NEXT:    mov h3, v1.h[5]
974; CHECK-CVT-NEXT:    mov h4, v0.h[5]
975; CHECK-CVT-NEXT:    fcvt s5, h5
976; CHECK-CVT-NEXT:    mov v2.h[2], w8
977; CHECK-CVT-NEXT:    csetm w8, vs
978; CHECK-CVT-NEXT:    fcvt s3, h3
979; CHECK-CVT-NEXT:    fcvt s4, h4
980; CHECK-CVT-NEXT:    fcmp s6, s5
981; CHECK-CVT-NEXT:    mov h5, v1.h[6]
982; CHECK-CVT-NEXT:    mov h6, v0.h[6]
983; CHECK-CVT-NEXT:    mov h1, v1.h[7]
984; CHECK-CVT-NEXT:    mov h0, v0.h[7]
985; CHECK-CVT-NEXT:    mov v2.h[3], w8
986; CHECK-CVT-NEXT:    csetm w8, vs
987; CHECK-CVT-NEXT:    fcmp s4, s3
988; CHECK-CVT-NEXT:    fcvt s3, h5
989; CHECK-CVT-NEXT:    fcvt s4, h6
990; CHECK-CVT-NEXT:    fcvt s1, h1
991; CHECK-CVT-NEXT:    fcvt s0, h0
992; CHECK-CVT-NEXT:    mov v2.h[4], w8
993; CHECK-CVT-NEXT:    csetm w8, vs
994; CHECK-CVT-NEXT:    fcmp s4, s3
995; CHECK-CVT-NEXT:    mov v2.h[5], w8
996; CHECK-CVT-NEXT:    csetm w8, vs
997; CHECK-CVT-NEXT:    fcmp s0, s1
998; CHECK-CVT-NEXT:    mov v2.h[6], w8
999; CHECK-CVT-NEXT:    csetm w8, vs
1000; CHECK-CVT-NEXT:    mov v2.h[7], w8
1001; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
1002; CHECK-CVT-NEXT:    ret
1003;
1004; CHECK-FP16-LABEL: test_fcmp_uno:
1005; CHECK-FP16:       // %bb.0:
1006; CHECK-FP16-NEXT:    fcmge v2.8h, v0.8h, v1.8h
1007; CHECK-FP16-NEXT:    fcmgt v0.8h, v1.8h, v0.8h
1008; CHECK-FP16-NEXT:    orr v0.16b, v0.16b, v2.16b
1009; CHECK-FP16-NEXT:    mvn v0.16b, v0.16b
1010; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
1011; CHECK-FP16-NEXT:    ret
1012  %1 = fcmp uno <8 x half> %a, %b
1013  ret <8 x i1> %1
1014}
1015
1016define <8 x i1> @test_fcmp_one(<8 x half> %a, <8 x half> %b) #0 {
1017; CHECK-CVT-LABEL: test_fcmp_one:
1018; CHECK-CVT:       // %bb.0:
1019; CHECK-CVT-NEXT:    mov h2, v1.h[1]
1020; CHECK-CVT-NEXT:    mov h3, v0.h[1]
1021; CHECK-CVT-NEXT:    fcvt s4, h1
1022; CHECK-CVT-NEXT:    fcvt s6, h0
1023; CHECK-CVT-NEXT:    mov h5, v1.h[2]
1024; CHECK-CVT-NEXT:    fcvt s2, h2
1025; CHECK-CVT-NEXT:    fcvt s3, h3
1026; CHECK-CVT-NEXT:    fcmp s3, s2
1027; CHECK-CVT-NEXT:    mov h2, v0.h[2]
1028; CHECK-CVT-NEXT:    fcvt s3, h5
1029; CHECK-CVT-NEXT:    mov h5, v0.h[3]
1030; CHECK-CVT-NEXT:    csetm w8, mi
1031; CHECK-CVT-NEXT:    csinv w8, w8, wzr, le
1032; CHECK-CVT-NEXT:    fcmp s6, s4
1033; CHECK-CVT-NEXT:    fcvt s2, h2
1034; CHECK-CVT-NEXT:    mov h4, v1.h[3]
1035; CHECK-CVT-NEXT:    mov h6, v1.h[4]
1036; CHECK-CVT-NEXT:    csetm w9, mi
1037; CHECK-CVT-NEXT:    csinv w9, w9, wzr, le
1038; CHECK-CVT-NEXT:    fcmp s2, s3
1039; CHECK-CVT-NEXT:    mov h2, v0.h[4]
1040; CHECK-CVT-NEXT:    fcvt s3, h4
1041; CHECK-CVT-NEXT:    fcvt s4, h5
1042; CHECK-CVT-NEXT:    fmov s5, w9
1043; CHECK-CVT-NEXT:    fcvt s6, h6
1044; CHECK-CVT-NEXT:    mov v5.h[1], w8
1045; CHECK-CVT-NEXT:    csetm w8, mi
1046; CHECK-CVT-NEXT:    fcvt s2, h2
1047; CHECK-CVT-NEXT:    csinv w8, w8, wzr, le
1048; CHECK-CVT-NEXT:    fcmp s4, s3
1049; CHECK-CVT-NEXT:    mov h3, v1.h[5]
1050; CHECK-CVT-NEXT:    mov h4, v0.h[5]
1051; CHECK-CVT-NEXT:    mov v5.h[2], w8
1052; CHECK-CVT-NEXT:    csetm w8, mi
1053; CHECK-CVT-NEXT:    csinv w8, w8, wzr, le
1054; CHECK-CVT-NEXT:    fcmp s2, s6
1055; CHECK-CVT-NEXT:    fcvt s2, h3
1056; CHECK-CVT-NEXT:    fcvt s3, h4
1057; CHECK-CVT-NEXT:    mov h4, v1.h[6]
1058; CHECK-CVT-NEXT:    mov h6, v0.h[6]
1059; CHECK-CVT-NEXT:    mov h1, v1.h[7]
1060; CHECK-CVT-NEXT:    mov h0, v0.h[7]
1061; CHECK-CVT-NEXT:    mov v5.h[3], w8
1062; CHECK-CVT-NEXT:    csetm w8, mi
1063; CHECK-CVT-NEXT:    csinv w8, w8, wzr, le
1064; CHECK-CVT-NEXT:    fcmp s3, s2
1065; CHECK-CVT-NEXT:    fcvt s2, h4
1066; CHECK-CVT-NEXT:    fcvt s3, h6
1067; CHECK-CVT-NEXT:    fcvt s1, h1
1068; CHECK-CVT-NEXT:    fcvt s0, h0
1069; CHECK-CVT-NEXT:    mov v5.h[4], w8
1070; CHECK-CVT-NEXT:    csetm w8, mi
1071; CHECK-CVT-NEXT:    csinv w8, w8, wzr, le
1072; CHECK-CVT-NEXT:    fcmp s3, s2
1073; CHECK-CVT-NEXT:    mov v5.h[5], w8
1074; CHECK-CVT-NEXT:    csetm w8, mi
1075; CHECK-CVT-NEXT:    csinv w8, w8, wzr, le
1076; CHECK-CVT-NEXT:    fcmp s0, s1
1077; CHECK-CVT-NEXT:    mov v5.h[6], w8
1078; CHECK-CVT-NEXT:    csetm w8, mi
1079; CHECK-CVT-NEXT:    csinv w8, w8, wzr, le
1080; CHECK-CVT-NEXT:    mov v5.h[7], w8
1081; CHECK-CVT-NEXT:    xtn v0.8b, v5.8h
1082; CHECK-CVT-NEXT:    ret
1083;
1084; CHECK-FP16-LABEL: test_fcmp_one:
1085; CHECK-FP16:       // %bb.0:
1086; CHECK-FP16-NEXT:    fcmgt v2.8h, v0.8h, v1.8h
1087; CHECK-FP16-NEXT:    fcmgt v0.8h, v1.8h, v0.8h
1088; CHECK-FP16-NEXT:    orr v0.16b, v0.16b, v2.16b
1089; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
1090; CHECK-FP16-NEXT:    ret
1091  %1 = fcmp one <8 x half> %a, %b
1092  ret <8 x i1> %1
1093}
1094
1095define <8 x i1> @test_fcmp_oeq(<8 x half> %a, <8 x half> %b) #0 {
1096; CHECK-CVT-LABEL: test_fcmp_oeq:
1097; CHECK-CVT:       // %bb.0:
1098; CHECK-CVT-NEXT:    mov h2, v1.h[1]
1099; CHECK-CVT-NEXT:    mov h3, v0.h[1]
1100; CHECK-CVT-NEXT:    fcvt s4, h1
1101; CHECK-CVT-NEXT:    fcvt s5, h0
1102; CHECK-CVT-NEXT:    mov h6, v1.h[2]
1103; CHECK-CVT-NEXT:    fcvt s2, h2
1104; CHECK-CVT-NEXT:    fcvt s3, h3
1105; CHECK-CVT-NEXT:    fcmp s3, s2
1106; CHECK-CVT-NEXT:    mov h2, v0.h[2]
1107; CHECK-CVT-NEXT:    mov h3, v1.h[3]
1108; CHECK-CVT-NEXT:    csetm w8, eq
1109; CHECK-CVT-NEXT:    fcmp s5, s4
1110; CHECK-CVT-NEXT:    fcvt s5, h6
1111; CHECK-CVT-NEXT:    fcvt s2, h2
1112; CHECK-CVT-NEXT:    mov h4, v0.h[3]
1113; CHECK-CVT-NEXT:    fcvt s3, h3
1114; CHECK-CVT-NEXT:    mov h6, v0.h[4]
1115; CHECK-CVT-NEXT:    csetm w9, eq
1116; CHECK-CVT-NEXT:    fcmp s2, s5
1117; CHECK-CVT-NEXT:    fmov s2, w9
1118; CHECK-CVT-NEXT:    fcvt s4, h4
1119; CHECK-CVT-NEXT:    mov h5, v1.h[4]
1120; CHECK-CVT-NEXT:    fcvt s6, h6
1121; CHECK-CVT-NEXT:    mov v2.h[1], w8
1122; CHECK-CVT-NEXT:    csetm w8, eq
1123; CHECK-CVT-NEXT:    fcmp s4, s3
1124; CHECK-CVT-NEXT:    mov h3, v1.h[5]
1125; CHECK-CVT-NEXT:    mov h4, v0.h[5]
1126; CHECK-CVT-NEXT:    fcvt s5, h5
1127; CHECK-CVT-NEXT:    mov v2.h[2], w8
1128; CHECK-CVT-NEXT:    csetm w8, eq
1129; CHECK-CVT-NEXT:    fcvt s3, h3
1130; CHECK-CVT-NEXT:    fcvt s4, h4
1131; CHECK-CVT-NEXT:    fcmp s6, s5
1132; CHECK-CVT-NEXT:    mov h5, v1.h[6]
1133; CHECK-CVT-NEXT:    mov h6, v0.h[6]
1134; CHECK-CVT-NEXT:    mov h1, v1.h[7]
1135; CHECK-CVT-NEXT:    mov h0, v0.h[7]
1136; CHECK-CVT-NEXT:    mov v2.h[3], w8
1137; CHECK-CVT-NEXT:    csetm w8, eq
1138; CHECK-CVT-NEXT:    fcmp s4, s3
1139; CHECK-CVT-NEXT:    fcvt s3, h5
1140; CHECK-CVT-NEXT:    fcvt s4, h6
1141; CHECK-CVT-NEXT:    fcvt s1, h1
1142; CHECK-CVT-NEXT:    fcvt s0, h0
1143; CHECK-CVT-NEXT:    mov v2.h[4], w8
1144; CHECK-CVT-NEXT:    csetm w8, eq
1145; CHECK-CVT-NEXT:    fcmp s4, s3
1146; CHECK-CVT-NEXT:    mov v2.h[5], w8
1147; CHECK-CVT-NEXT:    csetm w8, eq
1148; CHECK-CVT-NEXT:    fcmp s0, s1
1149; CHECK-CVT-NEXT:    mov v2.h[6], w8
1150; CHECK-CVT-NEXT:    csetm w8, eq
1151; CHECK-CVT-NEXT:    mov v2.h[7], w8
1152; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
1153; CHECK-CVT-NEXT:    ret
1154;
1155; CHECK-FP16-LABEL: test_fcmp_oeq:
1156; CHECK-FP16:       // %bb.0:
1157; CHECK-FP16-NEXT:    fcmeq v0.8h, v0.8h, v1.8h
1158; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
1159; CHECK-FP16-NEXT:    ret
1160  %1 = fcmp oeq <8 x half> %a, %b
1161  ret <8 x i1> %1
1162}
1163
1164define <8 x i1> @test_fcmp_ogt(<8 x half> %a, <8 x half> %b) #0 {
1165; CHECK-CVT-LABEL: test_fcmp_ogt:
1166; CHECK-CVT:       // %bb.0:
1167; CHECK-CVT-NEXT:    mov h2, v1.h[1]
1168; CHECK-CVT-NEXT:    mov h3, v0.h[1]
1169; CHECK-CVT-NEXT:    fcvt s4, h1
1170; CHECK-CVT-NEXT:    fcvt s5, h0
1171; CHECK-CVT-NEXT:    mov h6, v1.h[2]
1172; CHECK-CVT-NEXT:    fcvt s2, h2
1173; CHECK-CVT-NEXT:    fcvt s3, h3
1174; CHECK-CVT-NEXT:    fcmp s3, s2
1175; CHECK-CVT-NEXT:    mov h2, v0.h[2]
1176; CHECK-CVT-NEXT:    mov h3, v1.h[3]
1177; CHECK-CVT-NEXT:    csetm w8, gt
1178; CHECK-CVT-NEXT:    fcmp s5, s4
1179; CHECK-CVT-NEXT:    fcvt s5, h6
1180; CHECK-CVT-NEXT:    fcvt s2, h2
1181; CHECK-CVT-NEXT:    mov h4, v0.h[3]
1182; CHECK-CVT-NEXT:    fcvt s3, h3
1183; CHECK-CVT-NEXT:    mov h6, v0.h[4]
1184; CHECK-CVT-NEXT:    csetm w9, gt
1185; CHECK-CVT-NEXT:    fcmp s2, s5
1186; CHECK-CVT-NEXT:    fmov s2, w9
1187; CHECK-CVT-NEXT:    fcvt s4, h4
1188; CHECK-CVT-NEXT:    mov h5, v1.h[4]
1189; CHECK-CVT-NEXT:    fcvt s6, h6
1190; CHECK-CVT-NEXT:    mov v2.h[1], w8
1191; CHECK-CVT-NEXT:    csetm w8, gt
1192; CHECK-CVT-NEXT:    fcmp s4, s3
1193; CHECK-CVT-NEXT:    mov h3, v1.h[5]
1194; CHECK-CVT-NEXT:    mov h4, v0.h[5]
1195; CHECK-CVT-NEXT:    fcvt s5, h5
1196; CHECK-CVT-NEXT:    mov v2.h[2], w8
1197; CHECK-CVT-NEXT:    csetm w8, gt
1198; CHECK-CVT-NEXT:    fcvt s3, h3
1199; CHECK-CVT-NEXT:    fcvt s4, h4
1200; CHECK-CVT-NEXT:    fcmp s6, s5
1201; CHECK-CVT-NEXT:    mov h5, v1.h[6]
1202; CHECK-CVT-NEXT:    mov h6, v0.h[6]
1203; CHECK-CVT-NEXT:    mov h1, v1.h[7]
1204; CHECK-CVT-NEXT:    mov h0, v0.h[7]
1205; CHECK-CVT-NEXT:    mov v2.h[3], w8
1206; CHECK-CVT-NEXT:    csetm w8, gt
1207; CHECK-CVT-NEXT:    fcmp s4, s3
1208; CHECK-CVT-NEXT:    fcvt s3, h5
1209; CHECK-CVT-NEXT:    fcvt s4, h6
1210; CHECK-CVT-NEXT:    fcvt s1, h1
1211; CHECK-CVT-NEXT:    fcvt s0, h0
1212; CHECK-CVT-NEXT:    mov v2.h[4], w8
1213; CHECK-CVT-NEXT:    csetm w8, gt
1214; CHECK-CVT-NEXT:    fcmp s4, s3
1215; CHECK-CVT-NEXT:    mov v2.h[5], w8
1216; CHECK-CVT-NEXT:    csetm w8, gt
1217; CHECK-CVT-NEXT:    fcmp s0, s1
1218; CHECK-CVT-NEXT:    mov v2.h[6], w8
1219; CHECK-CVT-NEXT:    csetm w8, gt
1220; CHECK-CVT-NEXT:    mov v2.h[7], w8
1221; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
1222; CHECK-CVT-NEXT:    ret
1223;
1224; CHECK-FP16-LABEL: test_fcmp_ogt:
1225; CHECK-FP16:       // %bb.0:
1226; CHECK-FP16-NEXT:    fcmgt v0.8h, v0.8h, v1.8h
1227; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
1228; CHECK-FP16-NEXT:    ret
1229  %1 = fcmp ogt <8 x half> %a, %b
1230  ret <8 x i1> %1
1231}
1232
1233define <8 x i1> @test_fcmp_oge(<8 x half> %a, <8 x half> %b) #0 {
1234; CHECK-CVT-LABEL: test_fcmp_oge:
1235; CHECK-CVT:       // %bb.0:
1236; CHECK-CVT-NEXT:    mov h2, v1.h[1]
1237; CHECK-CVT-NEXT:    mov h3, v0.h[1]
1238; CHECK-CVT-NEXT:    fcvt s4, h1
1239; CHECK-CVT-NEXT:    fcvt s5, h0
1240; CHECK-CVT-NEXT:    mov h6, v1.h[2]
1241; CHECK-CVT-NEXT:    fcvt s2, h2
1242; CHECK-CVT-NEXT:    fcvt s3, h3
1243; CHECK-CVT-NEXT:    fcmp s3, s2
1244; CHECK-CVT-NEXT:    mov h2, v0.h[2]
1245; CHECK-CVT-NEXT:    mov h3, v1.h[3]
1246; CHECK-CVT-NEXT:    csetm w8, ge
1247; CHECK-CVT-NEXT:    fcmp s5, s4
1248; CHECK-CVT-NEXT:    fcvt s5, h6
1249; CHECK-CVT-NEXT:    fcvt s2, h2
1250; CHECK-CVT-NEXT:    mov h4, v0.h[3]
1251; CHECK-CVT-NEXT:    fcvt s3, h3
1252; CHECK-CVT-NEXT:    mov h6, v0.h[4]
1253; CHECK-CVT-NEXT:    csetm w9, ge
1254; CHECK-CVT-NEXT:    fcmp s2, s5
1255; CHECK-CVT-NEXT:    fmov s2, w9
1256; CHECK-CVT-NEXT:    fcvt s4, h4
1257; CHECK-CVT-NEXT:    mov h5, v1.h[4]
1258; CHECK-CVT-NEXT:    fcvt s6, h6
1259; CHECK-CVT-NEXT:    mov v2.h[1], w8
1260; CHECK-CVT-NEXT:    csetm w8, ge
1261; CHECK-CVT-NEXT:    fcmp s4, s3
1262; CHECK-CVT-NEXT:    mov h3, v1.h[5]
1263; CHECK-CVT-NEXT:    mov h4, v0.h[5]
1264; CHECK-CVT-NEXT:    fcvt s5, h5
1265; CHECK-CVT-NEXT:    mov v2.h[2], w8
1266; CHECK-CVT-NEXT:    csetm w8, ge
1267; CHECK-CVT-NEXT:    fcvt s3, h3
1268; CHECK-CVT-NEXT:    fcvt s4, h4
1269; CHECK-CVT-NEXT:    fcmp s6, s5
1270; CHECK-CVT-NEXT:    mov h5, v1.h[6]
1271; CHECK-CVT-NEXT:    mov h6, v0.h[6]
1272; CHECK-CVT-NEXT:    mov h1, v1.h[7]
1273; CHECK-CVT-NEXT:    mov h0, v0.h[7]
1274; CHECK-CVT-NEXT:    mov v2.h[3], w8
1275; CHECK-CVT-NEXT:    csetm w8, ge
1276; CHECK-CVT-NEXT:    fcmp s4, s3
1277; CHECK-CVT-NEXT:    fcvt s3, h5
1278; CHECK-CVT-NEXT:    fcvt s4, h6
1279; CHECK-CVT-NEXT:    fcvt s1, h1
1280; CHECK-CVT-NEXT:    fcvt s0, h0
1281; CHECK-CVT-NEXT:    mov v2.h[4], w8
1282; CHECK-CVT-NEXT:    csetm w8, ge
1283; CHECK-CVT-NEXT:    fcmp s4, s3
1284; CHECK-CVT-NEXT:    mov v2.h[5], w8
1285; CHECK-CVT-NEXT:    csetm w8, ge
1286; CHECK-CVT-NEXT:    fcmp s0, s1
1287; CHECK-CVT-NEXT:    mov v2.h[6], w8
1288; CHECK-CVT-NEXT:    csetm w8, ge
1289; CHECK-CVT-NEXT:    mov v2.h[7], w8
1290; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
1291; CHECK-CVT-NEXT:    ret
1292;
1293; CHECK-FP16-LABEL: test_fcmp_oge:
1294; CHECK-FP16:       // %bb.0:
1295; CHECK-FP16-NEXT:    fcmge v0.8h, v0.8h, v1.8h
1296; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
1297; CHECK-FP16-NEXT:    ret
1298  %1 = fcmp oge <8 x half> %a, %b
1299  ret <8 x i1> %1
1300}
1301
1302define <8 x i1> @test_fcmp_olt(<8 x half> %a, <8 x half> %b) #0 {
1303; CHECK-CVT-LABEL: test_fcmp_olt:
1304; CHECK-CVT:       // %bb.0:
1305; CHECK-CVT-NEXT:    mov h2, v1.h[1]
1306; CHECK-CVT-NEXT:    mov h3, v0.h[1]
1307; CHECK-CVT-NEXT:    fcvt s4, h1
1308; CHECK-CVT-NEXT:    fcvt s5, h0
1309; CHECK-CVT-NEXT:    mov h6, v1.h[2]
1310; CHECK-CVT-NEXT:    fcvt s2, h2
1311; CHECK-CVT-NEXT:    fcvt s3, h3
1312; CHECK-CVT-NEXT:    fcmp s3, s2
1313; CHECK-CVT-NEXT:    mov h2, v0.h[2]
1314; CHECK-CVT-NEXT:    mov h3, v1.h[3]
1315; CHECK-CVT-NEXT:    csetm w8, mi
1316; CHECK-CVT-NEXT:    fcmp s5, s4
1317; CHECK-CVT-NEXT:    fcvt s5, h6
1318; CHECK-CVT-NEXT:    fcvt s2, h2
1319; CHECK-CVT-NEXT:    mov h4, v0.h[3]
1320; CHECK-CVT-NEXT:    fcvt s3, h3
1321; CHECK-CVT-NEXT:    mov h6, v0.h[4]
1322; CHECK-CVT-NEXT:    csetm w9, mi
1323; CHECK-CVT-NEXT:    fcmp s2, s5
1324; CHECK-CVT-NEXT:    fmov s2, w9
1325; CHECK-CVT-NEXT:    fcvt s4, h4
1326; CHECK-CVT-NEXT:    mov h5, v1.h[4]
1327; CHECK-CVT-NEXT:    fcvt s6, h6
1328; CHECK-CVT-NEXT:    mov v2.h[1], w8
1329; CHECK-CVT-NEXT:    csetm w8, mi
1330; CHECK-CVT-NEXT:    fcmp s4, s3
1331; CHECK-CVT-NEXT:    mov h3, v1.h[5]
1332; CHECK-CVT-NEXT:    mov h4, v0.h[5]
1333; CHECK-CVT-NEXT:    fcvt s5, h5
1334; CHECK-CVT-NEXT:    mov v2.h[2], w8
1335; CHECK-CVT-NEXT:    csetm w8, mi
1336; CHECK-CVT-NEXT:    fcvt s3, h3
1337; CHECK-CVT-NEXT:    fcvt s4, h4
1338; CHECK-CVT-NEXT:    fcmp s6, s5
1339; CHECK-CVT-NEXT:    mov h5, v1.h[6]
1340; CHECK-CVT-NEXT:    mov h6, v0.h[6]
1341; CHECK-CVT-NEXT:    mov h1, v1.h[7]
1342; CHECK-CVT-NEXT:    mov h0, v0.h[7]
1343; CHECK-CVT-NEXT:    mov v2.h[3], w8
1344; CHECK-CVT-NEXT:    csetm w8, mi
1345; CHECK-CVT-NEXT:    fcmp s4, s3
1346; CHECK-CVT-NEXT:    fcvt s3, h5
1347; CHECK-CVT-NEXT:    fcvt s4, h6
1348; CHECK-CVT-NEXT:    fcvt s1, h1
1349; CHECK-CVT-NEXT:    fcvt s0, h0
1350; CHECK-CVT-NEXT:    mov v2.h[4], w8
1351; CHECK-CVT-NEXT:    csetm w8, mi
1352; CHECK-CVT-NEXT:    fcmp s4, s3
1353; CHECK-CVT-NEXT:    mov v2.h[5], w8
1354; CHECK-CVT-NEXT:    csetm w8, mi
1355; CHECK-CVT-NEXT:    fcmp s0, s1
1356; CHECK-CVT-NEXT:    mov v2.h[6], w8
1357; CHECK-CVT-NEXT:    csetm w8, mi
1358; CHECK-CVT-NEXT:    mov v2.h[7], w8
1359; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
1360; CHECK-CVT-NEXT:    ret
1361;
1362; CHECK-FP16-LABEL: test_fcmp_olt:
1363; CHECK-FP16:       // %bb.0:
1364; CHECK-FP16-NEXT:    fcmgt v0.8h, v1.8h, v0.8h
1365; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
1366; CHECK-FP16-NEXT:    ret
1367  %1 = fcmp olt <8 x half> %a, %b
1368  ret <8 x i1> %1
1369}
1370
1371define <8 x i1> @test_fcmp_ole(<8 x half> %a, <8 x half> %b) #0 {
1372; CHECK-CVT-LABEL: test_fcmp_ole:
1373; CHECK-CVT:       // %bb.0:
1374; CHECK-CVT-NEXT:    mov h2, v1.h[1]
1375; CHECK-CVT-NEXT:    mov h3, v0.h[1]
1376; CHECK-CVT-NEXT:    fcvt s4, h1
1377; CHECK-CVT-NEXT:    fcvt s5, h0
1378; CHECK-CVT-NEXT:    mov h6, v1.h[2]
1379; CHECK-CVT-NEXT:    fcvt s2, h2
1380; CHECK-CVT-NEXT:    fcvt s3, h3
1381; CHECK-CVT-NEXT:    fcmp s3, s2
1382; CHECK-CVT-NEXT:    mov h2, v0.h[2]
1383; CHECK-CVT-NEXT:    mov h3, v1.h[3]
1384; CHECK-CVT-NEXT:    csetm w8, ls
1385; CHECK-CVT-NEXT:    fcmp s5, s4
1386; CHECK-CVT-NEXT:    fcvt s5, h6
1387; CHECK-CVT-NEXT:    fcvt s2, h2
1388; CHECK-CVT-NEXT:    mov h4, v0.h[3]
1389; CHECK-CVT-NEXT:    fcvt s3, h3
1390; CHECK-CVT-NEXT:    mov h6, v0.h[4]
1391; CHECK-CVT-NEXT:    csetm w9, ls
1392; CHECK-CVT-NEXT:    fcmp s2, s5
1393; CHECK-CVT-NEXT:    fmov s2, w9
1394; CHECK-CVT-NEXT:    fcvt s4, h4
1395; CHECK-CVT-NEXT:    mov h5, v1.h[4]
1396; CHECK-CVT-NEXT:    fcvt s6, h6
1397; CHECK-CVT-NEXT:    mov v2.h[1], w8
1398; CHECK-CVT-NEXT:    csetm w8, ls
1399; CHECK-CVT-NEXT:    fcmp s4, s3
1400; CHECK-CVT-NEXT:    mov h3, v1.h[5]
1401; CHECK-CVT-NEXT:    mov h4, v0.h[5]
1402; CHECK-CVT-NEXT:    fcvt s5, h5
1403; CHECK-CVT-NEXT:    mov v2.h[2], w8
1404; CHECK-CVT-NEXT:    csetm w8, ls
1405; CHECK-CVT-NEXT:    fcvt s3, h3
1406; CHECK-CVT-NEXT:    fcvt s4, h4
1407; CHECK-CVT-NEXT:    fcmp s6, s5
1408; CHECK-CVT-NEXT:    mov h5, v1.h[6]
1409; CHECK-CVT-NEXT:    mov h6, v0.h[6]
1410; CHECK-CVT-NEXT:    mov h1, v1.h[7]
1411; CHECK-CVT-NEXT:    mov h0, v0.h[7]
1412; CHECK-CVT-NEXT:    mov v2.h[3], w8
1413; CHECK-CVT-NEXT:    csetm w8, ls
1414; CHECK-CVT-NEXT:    fcmp s4, s3
1415; CHECK-CVT-NEXT:    fcvt s3, h5
1416; CHECK-CVT-NEXT:    fcvt s4, h6
1417; CHECK-CVT-NEXT:    fcvt s1, h1
1418; CHECK-CVT-NEXT:    fcvt s0, h0
1419; CHECK-CVT-NEXT:    mov v2.h[4], w8
1420; CHECK-CVT-NEXT:    csetm w8, ls
1421; CHECK-CVT-NEXT:    fcmp s4, s3
1422; CHECK-CVT-NEXT:    mov v2.h[5], w8
1423; CHECK-CVT-NEXT:    csetm w8, ls
1424; CHECK-CVT-NEXT:    fcmp s0, s1
1425; CHECK-CVT-NEXT:    mov v2.h[6], w8
1426; CHECK-CVT-NEXT:    csetm w8, ls
1427; CHECK-CVT-NEXT:    mov v2.h[7], w8
1428; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
1429; CHECK-CVT-NEXT:    ret
1430;
1431; CHECK-FP16-LABEL: test_fcmp_ole:
1432; CHECK-FP16:       // %bb.0:
1433; CHECK-FP16-NEXT:    fcmge v0.8h, v1.8h, v0.8h
1434; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
1435; CHECK-FP16-NEXT:    ret
1436  %1 = fcmp ole <8 x half> %a, %b
1437  ret <8 x i1> %1
1438}
1439
1440define <8 x i1> @test_fcmp_ord(<8 x half> %a, <8 x half> %b) #0 {
1441; CHECK-CVT-LABEL: test_fcmp_ord:
1442; CHECK-CVT:       // %bb.0:
1443; CHECK-CVT-NEXT:    mov h2, v1.h[1]
1444; CHECK-CVT-NEXT:    mov h3, v0.h[1]
1445; CHECK-CVT-NEXT:    fcvt s4, h1
1446; CHECK-CVT-NEXT:    fcvt s5, h0
1447; CHECK-CVT-NEXT:    mov h6, v1.h[2]
1448; CHECK-CVT-NEXT:    fcvt s2, h2
1449; CHECK-CVT-NEXT:    fcvt s3, h3
1450; CHECK-CVT-NEXT:    fcmp s3, s2
1451; CHECK-CVT-NEXT:    mov h2, v0.h[2]
1452; CHECK-CVT-NEXT:    mov h3, v1.h[3]
1453; CHECK-CVT-NEXT:    csetm w8, vc
1454; CHECK-CVT-NEXT:    fcmp s5, s4
1455; CHECK-CVT-NEXT:    fcvt s5, h6
1456; CHECK-CVT-NEXT:    fcvt s2, h2
1457; CHECK-CVT-NEXT:    mov h4, v0.h[3]
1458; CHECK-CVT-NEXT:    fcvt s3, h3
1459; CHECK-CVT-NEXT:    mov h6, v0.h[4]
1460; CHECK-CVT-NEXT:    csetm w9, vc
1461; CHECK-CVT-NEXT:    fcmp s2, s5
1462; CHECK-CVT-NEXT:    fmov s2, w9
1463; CHECK-CVT-NEXT:    fcvt s4, h4
1464; CHECK-CVT-NEXT:    mov h5, v1.h[4]
1465; CHECK-CVT-NEXT:    fcvt s6, h6
1466; CHECK-CVT-NEXT:    mov v2.h[1], w8
1467; CHECK-CVT-NEXT:    csetm w8, vc
1468; CHECK-CVT-NEXT:    fcmp s4, s3
1469; CHECK-CVT-NEXT:    mov h3, v1.h[5]
1470; CHECK-CVT-NEXT:    mov h4, v0.h[5]
1471; CHECK-CVT-NEXT:    fcvt s5, h5
1472; CHECK-CVT-NEXT:    mov v2.h[2], w8
1473; CHECK-CVT-NEXT:    csetm w8, vc
1474; CHECK-CVT-NEXT:    fcvt s3, h3
1475; CHECK-CVT-NEXT:    fcvt s4, h4
1476; CHECK-CVT-NEXT:    fcmp s6, s5
1477; CHECK-CVT-NEXT:    mov h5, v1.h[6]
1478; CHECK-CVT-NEXT:    mov h6, v0.h[6]
1479; CHECK-CVT-NEXT:    mov h1, v1.h[7]
1480; CHECK-CVT-NEXT:    mov h0, v0.h[7]
1481; CHECK-CVT-NEXT:    mov v2.h[3], w8
1482; CHECK-CVT-NEXT:    csetm w8, vc
1483; CHECK-CVT-NEXT:    fcmp s4, s3
1484; CHECK-CVT-NEXT:    fcvt s3, h5
1485; CHECK-CVT-NEXT:    fcvt s4, h6
1486; CHECK-CVT-NEXT:    fcvt s1, h1
1487; CHECK-CVT-NEXT:    fcvt s0, h0
1488; CHECK-CVT-NEXT:    mov v2.h[4], w8
1489; CHECK-CVT-NEXT:    csetm w8, vc
1490; CHECK-CVT-NEXT:    fcmp s4, s3
1491; CHECK-CVT-NEXT:    mov v2.h[5], w8
1492; CHECK-CVT-NEXT:    csetm w8, vc
1493; CHECK-CVT-NEXT:    fcmp s0, s1
1494; CHECK-CVT-NEXT:    mov v2.h[6], w8
1495; CHECK-CVT-NEXT:    csetm w8, vc
1496; CHECK-CVT-NEXT:    mov v2.h[7], w8
1497; CHECK-CVT-NEXT:    xtn v0.8b, v2.8h
1498; CHECK-CVT-NEXT:    ret
1499;
1500; CHECK-FP16-LABEL: test_fcmp_ord:
1501; CHECK-FP16:       // %bb.0:
1502; CHECK-FP16-NEXT:    fcmge v2.8h, v0.8h, v1.8h
1503; CHECK-FP16-NEXT:    fcmgt v0.8h, v1.8h, v0.8h
1504; CHECK-FP16-NEXT:    orr v0.16b, v0.16b, v2.16b
1505; CHECK-FP16-NEXT:    xtn v0.8b, v0.8h
1506; CHECK-FP16-NEXT:    ret
1507  %1 = fcmp ord <8 x half> %a, %b
1508  ret <8 x i1> %1
1509}
1510
1511attributes #0 = { nounwind }
1512