1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s 3 4 5define <16 x half> @sitofp_i32(<16 x i32> %a) #0 { 6; CHECK-LABEL: sitofp_i32: 7; CHECK: // %bb.0: 8; CHECK-NEXT: scvtf v0.4s, v0.4s 9; CHECK-NEXT: scvtf v2.4s, v2.4s 10; CHECK-NEXT: scvtf v4.4s, v1.4s 11; CHECK-NEXT: fcvtn v0.4h, v0.4s 12; CHECK-NEXT: fcvtn v1.4h, v2.4s 13; CHECK-NEXT: scvtf v2.4s, v3.4s 14; CHECK-NEXT: fcvtn2 v0.8h, v4.4s 15; CHECK-NEXT: fcvtn2 v1.8h, v2.4s 16; CHECK-NEXT: ret 17 18 %1 = sitofp <16 x i32> %a to <16 x half> 19 ret <16 x half> %1 20} 21 22 23define <16 x half> @sitofp_i64(<16 x i64> %a) #0 { 24; CHECK-LABEL: sitofp_i64: 25; CHECK: // %bb.0: 26; CHECK-NEXT: scvtf v0.2d, v0.2d 27; CHECK-NEXT: scvtf v4.2d, v4.2d 28; CHECK-NEXT: scvtf v2.2d, v2.2d 29; CHECK-NEXT: scvtf v1.2d, v1.2d 30; CHECK-NEXT: scvtf v6.2d, v6.2d 31; CHECK-NEXT: scvtf v5.2d, v5.2d 32; CHECK-NEXT: scvtf v3.2d, v3.2d 33; CHECK-NEXT: fcvtn v0.2s, v0.2d 34; CHECK-NEXT: fcvtn v4.2s, v4.2d 35; CHECK-NEXT: fcvtn v2.2s, v2.2d 36; CHECK-NEXT: fcvtn v6.2s, v6.2d 37; CHECK-NEXT: fcvtn2 v0.4s, v1.2d 38; CHECK-NEXT: scvtf v1.2d, v7.2d 39; CHECK-NEXT: fcvtn2 v4.4s, v5.2d 40; CHECK-NEXT: fcvtn2 v2.4s, v3.2d 41; CHECK-NEXT: fcvtn v0.4h, v0.4s 42; CHECK-NEXT: fcvtn2 v6.4s, v1.2d 43; CHECK-NEXT: fcvtn v1.4h, v4.4s 44; CHECK-NEXT: fcvtn2 v0.8h, v2.4s 45; CHECK-NEXT: fcvtn2 v1.8h, v6.4s 46; CHECK-NEXT: ret 47 48 49 50 51 %1 = sitofp <16 x i64> %a to <16 x half> 52 ret <16 x half> %1 53} 54 55 56define <16 x half> @uitofp_i32(<16 x i32> %a) #0 { 57; CHECK-LABEL: uitofp_i32: 58; CHECK: // %bb.0: 59; CHECK-NEXT: ucvtf v0.4s, v0.4s 60; CHECK-NEXT: ucvtf v2.4s, v2.4s 61; CHECK-NEXT: ucvtf v4.4s, v1.4s 62; CHECK-NEXT: fcvtn v0.4h, v0.4s 63; CHECK-NEXT: fcvtn v1.4h, v2.4s 64; CHECK-NEXT: ucvtf v2.4s, v3.4s 65; CHECK-NEXT: fcvtn2 v0.8h, v4.4s 66; CHECK-NEXT: fcvtn2 v1.8h, v2.4s 67; CHECK-NEXT: ret 68 69 %1 = uitofp <16 x i32> %a to <16 x half> 70 ret <16 x half> %1 71} 72 73 74define <16 x half> @uitofp_i64(<16 x i64> %a) #0 { 75; CHECK-LABEL: uitofp_i64: 76; CHECK: // %bb.0: 77; CHECK-NEXT: ucvtf v0.2d, v0.2d 78; CHECK-NEXT: ucvtf v4.2d, v4.2d 79; CHECK-NEXT: ucvtf v2.2d, v2.2d 80; CHECK-NEXT: ucvtf v1.2d, v1.2d 81; CHECK-NEXT: ucvtf v6.2d, v6.2d 82; CHECK-NEXT: ucvtf v5.2d, v5.2d 83; CHECK-NEXT: ucvtf v3.2d, v3.2d 84; CHECK-NEXT: fcvtn v0.2s, v0.2d 85; CHECK-NEXT: fcvtn v4.2s, v4.2d 86; CHECK-NEXT: fcvtn v2.2s, v2.2d 87; CHECK-NEXT: fcvtn v6.2s, v6.2d 88; CHECK-NEXT: fcvtn2 v0.4s, v1.2d 89; CHECK-NEXT: ucvtf v1.2d, v7.2d 90; CHECK-NEXT: fcvtn2 v4.4s, v5.2d 91; CHECK-NEXT: fcvtn2 v2.4s, v3.2d 92; CHECK-NEXT: fcvtn v0.4h, v0.4s 93; CHECK-NEXT: fcvtn2 v6.4s, v1.2d 94; CHECK-NEXT: fcvtn v1.4h, v4.4s 95; CHECK-NEXT: fcvtn2 v0.8h, v2.4s 96; CHECK-NEXT: fcvtn2 v1.8h, v6.4s 97; CHECK-NEXT: ret 98 99 100 101 102 %1 = uitofp <16 x i64> %a to <16 x half> 103 ret <16 x half> %1 104} 105 106attributes #0 = { nounwind } 107