1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16 3; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16 4; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16 5; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16 6 7define fp128 @f128_fp128(fp128 %a, fp128 %b, fp128 %d, fp128 %e) { 8; CHECK-SD-LABEL: f128_fp128: 9; CHECK-SD: // %bb.0: // %entry 10; CHECK-SD-NEXT: sub sp, sp, #48 11; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill 12; CHECK-SD-NEXT: .cfi_def_cfa_offset 48 13; CHECK-SD-NEXT: .cfi_offset w30, -16 14; CHECK-SD-NEXT: stp q2, q3, [sp] // 32-byte Folded Spill 15; CHECK-SD-NEXT: bl __lttf2 16; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload 17; CHECK-SD-NEXT: cmp w0, #0 18; CHECK-SD-NEXT: b.ge .LBB0_2 19; CHECK-SD-NEXT: // %bb.1: // %entry 20; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 21; CHECK-SD-NEXT: .LBB0_2: // %entry 22; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload 23; CHECK-SD-NEXT: add sp, sp, #48 24; CHECK-SD-NEXT: ret 25; 26; CHECK-GI-LABEL: f128_fp128: 27; CHECK-GI: // %bb.0: // %entry 28; CHECK-GI-NEXT: sub sp, sp, #48 29; CHECK-GI-NEXT: str x30, [sp, #32] // 8-byte Folded Spill 30; CHECK-GI-NEXT: .cfi_def_cfa_offset 48 31; CHECK-GI-NEXT: .cfi_offset w30, -16 32; CHECK-GI-NEXT: stp q3, q2, [sp] // 32-byte Folded Spill 33; CHECK-GI-NEXT: bl __lttf2 34; CHECK-GI-NEXT: ldp q3, q2, [sp] // 32-byte Folded Reload 35; CHECK-GI-NEXT: cmp w0, #0 36; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload 37; CHECK-GI-NEXT: mov d0, v2.d[1] 38; CHECK-GI-NEXT: mov d1, v3.d[1] 39; CHECK-GI-NEXT: fcsel d2, d2, d3, lt 40; CHECK-GI-NEXT: fmov x8, d2 41; CHECK-GI-NEXT: fcsel d1, d0, d1, lt 42; CHECK-GI-NEXT: mov v0.d[0], x8 43; CHECK-GI-NEXT: fmov x8, d1 44; CHECK-GI-NEXT: mov v0.d[1], x8 45; CHECK-GI-NEXT: add sp, sp, #48 46; CHECK-GI-NEXT: ret 47entry: 48 %c = fcmp olt fp128 %a, %b 49 %s = select i1 %c, fp128 %d, fp128 %e 50 ret fp128 %s 51} 52 53define i128 @f128_i128(fp128 %a, fp128 %b, i128 %d, i128 %e) { 54; CHECK-SD-LABEL: f128_i128: 55; CHECK-SD: // %bb.0: // %entry 56; CHECK-SD-NEXT: sub sp, sp, #80 57; CHECK-SD-NEXT: str x30, [sp, #32] // 8-byte Folded Spill 58; CHECK-SD-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill 59; CHECK-SD-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill 60; CHECK-SD-NEXT: .cfi_def_cfa_offset 80 61; CHECK-SD-NEXT: .cfi_offset w19, -8 62; CHECK-SD-NEXT: .cfi_offset w20, -16 63; CHECK-SD-NEXT: .cfi_offset w21, -24 64; CHECK-SD-NEXT: .cfi_offset w22, -32 65; CHECK-SD-NEXT: .cfi_offset w30, -48 66; CHECK-SD-NEXT: mov x19, x3 67; CHECK-SD-NEXT: mov x20, x2 68; CHECK-SD-NEXT: mov x21, x1 69; CHECK-SD-NEXT: mov x22, x0 70; CHECK-SD-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill 71; CHECK-SD-NEXT: bl __lttf2 72; CHECK-SD-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload 73; CHECK-SD-NEXT: cmp w0, #0 74; CHECK-SD-NEXT: csel x20, x22, x20, lt 75; CHECK-SD-NEXT: bl __lttf2 76; CHECK-SD-NEXT: mov w8, w0 77; CHECK-SD-NEXT: mov x0, x20 78; CHECK-SD-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload 79; CHECK-SD-NEXT: cmp w8, #0 80; CHECK-SD-NEXT: csel x1, x21, x19, lt 81; CHECK-SD-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload 82; CHECK-SD-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload 83; CHECK-SD-NEXT: add sp, sp, #80 84; CHECK-SD-NEXT: ret 85; 86; CHECK-GI-LABEL: f128_i128: 87; CHECK-GI: // %bb.0: // %entry 88; CHECK-GI-NEXT: str x30, [sp, #-48]! // 8-byte Folded Spill 89; CHECK-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill 90; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill 91; CHECK-GI-NEXT: .cfi_def_cfa_offset 48 92; CHECK-GI-NEXT: .cfi_offset w19, -8 93; CHECK-GI-NEXT: .cfi_offset w20, -16 94; CHECK-GI-NEXT: .cfi_offset w21, -24 95; CHECK-GI-NEXT: .cfi_offset w22, -32 96; CHECK-GI-NEXT: .cfi_offset w30, -48 97; CHECK-GI-NEXT: mov x19, x0 98; CHECK-GI-NEXT: mov x20, x1 99; CHECK-GI-NEXT: mov x21, x2 100; CHECK-GI-NEXT: mov x22, x3 101; CHECK-GI-NEXT: bl __lttf2 102; CHECK-GI-NEXT: cmp w0, #0 103; CHECK-GI-NEXT: csel x0, x19, x21, lt 104; CHECK-GI-NEXT: csel x1, x20, x22, lt 105; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload 106; CHECK-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload 107; CHECK-GI-NEXT: ldr x30, [sp], #48 // 8-byte Folded Reload 108; CHECK-GI-NEXT: ret 109entry: 110 %c = fcmp olt fp128 %a, %b 111 %s = select i1 %c, i128 %d, i128 %e 112 ret i128 %s 113} 114 115define double @f128_double(fp128 %a, fp128 %b, double %d, double %e) { 116; CHECK-SD-LABEL: f128_double: 117; CHECK-SD: // %bb.0: // %entry 118; CHECK-SD-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill 119; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill 120; CHECK-SD-NEXT: .cfi_def_cfa_offset 32 121; CHECK-SD-NEXT: .cfi_offset w30, -16 122; CHECK-SD-NEXT: .cfi_offset b8, -24 123; CHECK-SD-NEXT: .cfi_offset b9, -32 124; CHECK-SD-NEXT: fmov d8, d3 125; CHECK-SD-NEXT: fmov d9, d2 126; CHECK-SD-NEXT: bl __lttf2 127; CHECK-SD-NEXT: cmp w0, #0 128; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload 129; CHECK-SD-NEXT: fcsel d0, d9, d8, lt 130; CHECK-SD-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload 131; CHECK-SD-NEXT: ret 132; 133; CHECK-GI-LABEL: f128_double: 134; CHECK-GI: // %bb.0: // %entry 135; CHECK-GI-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill 136; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill 137; CHECK-GI-NEXT: .cfi_def_cfa_offset 32 138; CHECK-GI-NEXT: .cfi_offset w30, -16 139; CHECK-GI-NEXT: .cfi_offset b8, -24 140; CHECK-GI-NEXT: .cfi_offset b9, -32 141; CHECK-GI-NEXT: fmov d8, d2 142; CHECK-GI-NEXT: fmov d9, d3 143; CHECK-GI-NEXT: bl __lttf2 144; CHECK-GI-NEXT: cmp w0, #0 145; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload 146; CHECK-GI-NEXT: fcsel d0, d8, d9, lt 147; CHECK-GI-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload 148; CHECK-GI-NEXT: ret 149entry: 150 %c = fcmp olt fp128 %a, %b 151 %s = select i1 %c, double %d, double %e 152 ret double %s 153} 154 155define float @f128_float(fp128 %a, fp128 %b, float %d, float %e) { 156; CHECK-SD-LABEL: f128_float: 157; CHECK-SD: // %bb.0: // %entry 158; CHECK-SD-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill 159; CHECK-SD-NEXT: str x30, [sp, #16] // 8-byte Folded Spill 160; CHECK-SD-NEXT: .cfi_def_cfa_offset 32 161; CHECK-SD-NEXT: .cfi_offset w30, -16 162; CHECK-SD-NEXT: .cfi_offset b8, -24 163; CHECK-SD-NEXT: .cfi_offset b9, -32 164; CHECK-SD-NEXT: fmov s8, s3 165; CHECK-SD-NEXT: fmov s9, s2 166; CHECK-SD-NEXT: bl __lttf2 167; CHECK-SD-NEXT: cmp w0, #0 168; CHECK-SD-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload 169; CHECK-SD-NEXT: fcsel s0, s9, s8, lt 170; CHECK-SD-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload 171; CHECK-SD-NEXT: ret 172; 173; CHECK-GI-LABEL: f128_float: 174; CHECK-GI: // %bb.0: // %entry 175; CHECK-GI-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill 176; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill 177; CHECK-GI-NEXT: .cfi_def_cfa_offset 32 178; CHECK-GI-NEXT: .cfi_offset w30, -16 179; CHECK-GI-NEXT: .cfi_offset b8, -24 180; CHECK-GI-NEXT: .cfi_offset b9, -32 181; CHECK-GI-NEXT: fmov s8, s2 182; CHECK-GI-NEXT: fmov s9, s3 183; CHECK-GI-NEXT: bl __lttf2 184; CHECK-GI-NEXT: cmp w0, #0 185; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload 186; CHECK-GI-NEXT: fcsel s0, s8, s9, lt 187; CHECK-GI-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload 188; CHECK-GI-NEXT: ret 189entry: 190 %c = fcmp olt fp128 %a, %b 191 %s = select i1 %c, float %d, float %e 192 ret float %s 193} 194 195define i32 @f128_i32(fp128 %a, fp128 %b, i32 %d, i32 %e) { 196; CHECK-SD-LABEL: f128_i32: 197; CHECK-SD: // %bb.0: // %entry 198; CHECK-SD-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill 199; CHECK-SD-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill 200; CHECK-SD-NEXT: .cfi_def_cfa_offset 32 201; CHECK-SD-NEXT: .cfi_offset w19, -8 202; CHECK-SD-NEXT: .cfi_offset w20, -16 203; CHECK-SD-NEXT: .cfi_offset w30, -32 204; CHECK-SD-NEXT: mov w19, w1 205; CHECK-SD-NEXT: mov w20, w0 206; CHECK-SD-NEXT: bl __lttf2 207; CHECK-SD-NEXT: cmp w0, #0 208; CHECK-SD-NEXT: csel w0, w20, w19, lt 209; CHECK-SD-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload 210; CHECK-SD-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload 211; CHECK-SD-NEXT: ret 212; 213; CHECK-GI-LABEL: f128_i32: 214; CHECK-GI: // %bb.0: // %entry 215; CHECK-GI-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill 216; CHECK-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill 217; CHECK-GI-NEXT: .cfi_def_cfa_offset 32 218; CHECK-GI-NEXT: .cfi_offset w19, -8 219; CHECK-GI-NEXT: .cfi_offset w20, -16 220; CHECK-GI-NEXT: .cfi_offset w30, -32 221; CHECK-GI-NEXT: mov w19, w0 222; CHECK-GI-NEXT: mov w20, w1 223; CHECK-GI-NEXT: bl __lttf2 224; CHECK-GI-NEXT: cmp w0, #0 225; CHECK-GI-NEXT: csel w0, w19, w20, lt 226; CHECK-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload 227; CHECK-GI-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload 228; CHECK-GI-NEXT: ret 229entry: 230 %c = fcmp olt fp128 %a, %b 231 %s = select i1 %c, i32 %d, i32 %e 232 ret i32 %s 233} 234 235define half @f128_half(fp128 %a, fp128 %b, half %d, half %e) { 236; CHECK-SD-NOFP16-LABEL: f128_half: 237; CHECK-SD-NOFP16: // %bb.0: // %entry 238; CHECK-SD-NOFP16-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill 239; CHECK-SD-NOFP16-NEXT: str x30, [sp, #16] // 8-byte Folded Spill 240; CHECK-SD-NOFP16-NEXT: .cfi_def_cfa_offset 32 241; CHECK-SD-NOFP16-NEXT: .cfi_offset w30, -16 242; CHECK-SD-NOFP16-NEXT: .cfi_offset b8, -24 243; CHECK-SD-NOFP16-NEXT: .cfi_offset b9, -32 244; CHECK-SD-NOFP16-NEXT: fmov s8, s3 245; CHECK-SD-NOFP16-NEXT: fmov s9, s2 246; CHECK-SD-NOFP16-NEXT: bl __lttf2 247; CHECK-SD-NOFP16-NEXT: cmp w0, #0 248; CHECK-SD-NOFP16-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload 249; CHECK-SD-NOFP16-NEXT: fcsel s0, s9, s8, lt 250; CHECK-SD-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0 251; CHECK-SD-NOFP16-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload 252; CHECK-SD-NOFP16-NEXT: ret 253; 254; CHECK-SD-FP16-LABEL: f128_half: 255; CHECK-SD-FP16: // %bb.0: // %entry 256; CHECK-SD-FP16-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill 257; CHECK-SD-FP16-NEXT: str x30, [sp, #16] // 8-byte Folded Spill 258; CHECK-SD-FP16-NEXT: .cfi_def_cfa_offset 32 259; CHECK-SD-FP16-NEXT: .cfi_offset w30, -16 260; CHECK-SD-FP16-NEXT: .cfi_offset b8, -24 261; CHECK-SD-FP16-NEXT: .cfi_offset b9, -32 262; CHECK-SD-FP16-NEXT: fmov s8, s3 263; CHECK-SD-FP16-NEXT: fmov s9, s2 264; CHECK-SD-FP16-NEXT: bl __lttf2 265; CHECK-SD-FP16-NEXT: cmp w0, #0 266; CHECK-SD-FP16-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload 267; CHECK-SD-FP16-NEXT: fcsel h0, h9, h8, lt 268; CHECK-SD-FP16-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload 269; CHECK-SD-FP16-NEXT: ret 270; 271; CHECK-GI-LABEL: f128_half: 272; CHECK-GI: // %bb.0: // %entry 273; CHECK-GI-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill 274; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Folded Spill 275; CHECK-GI-NEXT: .cfi_def_cfa_offset 32 276; CHECK-GI-NEXT: .cfi_offset w30, -16 277; CHECK-GI-NEXT: .cfi_offset b8, -24 278; CHECK-GI-NEXT: .cfi_offset b9, -32 279; CHECK-GI-NEXT: fmov s8, s2 280; CHECK-GI-NEXT: fmov s9, s3 281; CHECK-GI-NEXT: bl __lttf2 282; CHECK-GI-NEXT: fmov w8, s8 283; CHECK-GI-NEXT: fmov w9, s9 284; CHECK-GI-NEXT: cmp w0, #0 285; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload 286; CHECK-GI-NEXT: csel w8, w8, w9, lt 287; CHECK-GI-NEXT: fmov s0, w8 288; CHECK-GI-NEXT: // kill: def $h0 killed $h0 killed $s0 289; CHECK-GI-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload 290; CHECK-GI-NEXT: ret 291entry: 292 %c = fcmp olt fp128 %a, %b 293 %s = select i1 %c, half %d, half %e 294 ret half %s 295} 296 297define double @f64_double(double %a, double %b, double %d, double %e) { 298; CHECK-LABEL: f64_double: 299; CHECK: // %bb.0: // %entry 300; CHECK-NEXT: fcmp d0, d1 301; CHECK-NEXT: fcsel d0, d2, d3, mi 302; CHECK-NEXT: ret 303entry: 304 %c = fcmp olt double %a, %b 305 %s = select i1 %c, double %d, double %e 306 ret double %s 307} 308 309define i32 @f64_i32(double %a, double %b, i32 %d, i32 %e) { 310; CHECK-LABEL: f64_i32: 311; CHECK: // %bb.0: // %entry 312; CHECK-NEXT: fcmp d0, d1 313; CHECK-NEXT: csel w0, w0, w1, mi 314; CHECK-NEXT: ret 315entry: 316 %c = fcmp olt double %a, %b 317 %s = select i1 %c, i32 %d, i32 %e 318 ret i32 %s 319} 320 321define float @f32_float(float %a, float %b, float %d, float %e) { 322; CHECK-LABEL: f32_float: 323; CHECK: // %bb.0: // %entry 324; CHECK-NEXT: fcmp s0, s1 325; CHECK-NEXT: fcsel s0, s2, s3, mi 326; CHECK-NEXT: ret 327entry: 328 %c = fcmp olt float %a, %b 329 %s = select i1 %c, float %d, float %e 330 ret float %s 331} 332 333define i32 @f32_i32(float %a, float %b, i32 %d, i32 %e) { 334; CHECK-LABEL: f32_i32: 335; CHECK: // %bb.0: // %entry 336; CHECK-NEXT: fcmp s0, s1 337; CHECK-NEXT: csel w0, w0, w1, mi 338; CHECK-NEXT: ret 339entry: 340 %c = fcmp olt float %a, %b 341 %s = select i1 %c, i32 %d, i32 %e 342 ret i32 %s 343} 344 345define half @f16_half(half %a, half %b, half %d, half %e) { 346; CHECK-SD-NOFP16-LABEL: f16_half: 347; CHECK-SD-NOFP16: // %bb.0: // %entry 348; CHECK-SD-NOFP16-NEXT: fcvt s1, h1 349; CHECK-SD-NOFP16-NEXT: fcvt s0, h0 350; CHECK-SD-NOFP16-NEXT: // kill: def $h3 killed $h3 def $s3 351; CHECK-SD-NOFP16-NEXT: // kill: def $h2 killed $h2 def $s2 352; CHECK-SD-NOFP16-NEXT: fcmp s0, s1 353; CHECK-SD-NOFP16-NEXT: fcsel s0, s2, s3, mi 354; CHECK-SD-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0 355; CHECK-SD-NOFP16-NEXT: ret 356; 357; CHECK-SD-FP16-LABEL: f16_half: 358; CHECK-SD-FP16: // %bb.0: // %entry 359; CHECK-SD-FP16-NEXT: fcmp h0, h1 360; CHECK-SD-FP16-NEXT: fcsel h0, h2, h3, mi 361; CHECK-SD-FP16-NEXT: ret 362; 363; CHECK-GI-NOFP16-LABEL: f16_half: 364; CHECK-GI-NOFP16: // %bb.0: // %entry 365; CHECK-GI-NOFP16-NEXT: fcvt s0, h0 366; CHECK-GI-NOFP16-NEXT: fcvt s1, h1 367; CHECK-GI-NOFP16-NEXT: // kill: def $h2 killed $h2 def $s2 368; CHECK-GI-NOFP16-NEXT: // kill: def $h3 killed $h3 def $s3 369; CHECK-GI-NOFP16-NEXT: fmov w8, s2 370; CHECK-GI-NOFP16-NEXT: fmov w9, s3 371; CHECK-GI-NOFP16-NEXT: fcmp s0, s1 372; CHECK-GI-NOFP16-NEXT: csel w8, w8, w9, mi 373; CHECK-GI-NOFP16-NEXT: fmov s0, w8 374; CHECK-GI-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0 375; CHECK-GI-NOFP16-NEXT: ret 376; 377; CHECK-GI-FP16-LABEL: f16_half: 378; CHECK-GI-FP16: // %bb.0: // %entry 379; CHECK-GI-FP16-NEXT: // kill: def $h2 killed $h2 def $s2 380; CHECK-GI-FP16-NEXT: // kill: def $h3 killed $h3 def $s3 381; CHECK-GI-FP16-NEXT: fcmp h0, h1 382; CHECK-GI-FP16-NEXT: fmov w8, s2 383; CHECK-GI-FP16-NEXT: fmov w9, s3 384; CHECK-GI-FP16-NEXT: csel w8, w8, w9, mi 385; CHECK-GI-FP16-NEXT: fmov s0, w8 386; CHECK-GI-FP16-NEXT: // kill: def $h0 killed $h0 killed $s0 387; CHECK-GI-FP16-NEXT: ret 388entry: 389 %c = fcmp olt half %a, %b 390 %s = select i1 %c, half %d, half %e 391 ret half %s 392} 393 394define i32 @f16_i32(half %a, half %b, i32 %d, i32 %e) { 395; CHECK-SD-NOFP16-LABEL: f16_i32: 396; CHECK-SD-NOFP16: // %bb.0: // %entry 397; CHECK-SD-NOFP16-NEXT: fcvt s1, h1 398; CHECK-SD-NOFP16-NEXT: fcvt s0, h0 399; CHECK-SD-NOFP16-NEXT: fcmp s0, s1 400; CHECK-SD-NOFP16-NEXT: csel w0, w0, w1, mi 401; CHECK-SD-NOFP16-NEXT: ret 402; 403; CHECK-SD-FP16-LABEL: f16_i32: 404; CHECK-SD-FP16: // %bb.0: // %entry 405; CHECK-SD-FP16-NEXT: fcmp h0, h1 406; CHECK-SD-FP16-NEXT: csel w0, w0, w1, mi 407; CHECK-SD-FP16-NEXT: ret 408; 409; CHECK-GI-NOFP16-LABEL: f16_i32: 410; CHECK-GI-NOFP16: // %bb.0: // %entry 411; CHECK-GI-NOFP16-NEXT: fcvt s0, h0 412; CHECK-GI-NOFP16-NEXT: fcvt s1, h1 413; CHECK-GI-NOFP16-NEXT: fcmp s0, s1 414; CHECK-GI-NOFP16-NEXT: csel w0, w0, w1, mi 415; CHECK-GI-NOFP16-NEXT: ret 416; 417; CHECK-GI-FP16-LABEL: f16_i32: 418; CHECK-GI-FP16: // %bb.0: // %entry 419; CHECK-GI-FP16-NEXT: fcmp h0, h1 420; CHECK-GI-FP16-NEXT: csel w0, w0, w1, mi 421; CHECK-GI-FP16-NEXT: ret 422entry: 423 %c = fcmp olt half %a, %b 424 %s = select i1 %c, i32 %d, i32 %e 425 ret i32 %s 426} 427 428define <2 x fp128> @v2f128_fp128(<2 x fp128> %a, <2 x fp128> %b, <2 x fp128> %d, <2 x fp128> %e) { 429; CHECK-SD-LABEL: v2f128_fp128: 430; CHECK-SD: // %bb.0: // %entry 431; CHECK-SD-NEXT: sub sp, sp, #112 432; CHECK-SD-NEXT: str x30, [sp, #96] // 8-byte Folded Spill 433; CHECK-SD-NEXT: .cfi_def_cfa_offset 112 434; CHECK-SD-NEXT: .cfi_offset w30, -16 435; CHECK-SD-NEXT: stp q4, q5, [sp] // 32-byte Folded Spill 436; CHECK-SD-NEXT: stp q1, q3, [sp, #32] // 32-byte Folded Spill 437; CHECK-SD-NEXT: mov v1.16b, v2.16b 438; CHECK-SD-NEXT: stp q7, q6, [sp, #64] // 32-byte Folded Spill 439; CHECK-SD-NEXT: bl __lttf2 440; CHECK-SD-NEXT: cmp w0, #0 441; CHECK-SD-NEXT: b.ge .LBB12_2 442; CHECK-SD-NEXT: // %bb.1: // %entry 443; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 444; CHECK-SD-NEXT: str q0, [sp, #80] // 16-byte Folded Spill 445; CHECK-SD-NEXT: .LBB12_2: // %entry 446; CHECK-SD-NEXT: ldp q0, q1, [sp, #32] // 32-byte Folded Reload 447; CHECK-SD-NEXT: bl __lttf2 448; CHECK-SD-NEXT: ldr q1, [sp, #64] // 16-byte Folded Reload 449; CHECK-SD-NEXT: cmp w0, #0 450; CHECK-SD-NEXT: b.ge .LBB12_4 451; CHECK-SD-NEXT: // %bb.3: // %entry 452; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 453; CHECK-SD-NEXT: .LBB12_4: // %entry 454; CHECK-SD-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload 455; CHECK-SD-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload 456; CHECK-SD-NEXT: add sp, sp, #112 457; CHECK-SD-NEXT: ret 458; 459; CHECK-GI-LABEL: v2f128_fp128: 460; CHECK-GI: // %bb.0: // %entry 461; CHECK-GI-NEXT: sub sp, sp, #112 462; CHECK-GI-NEXT: stp x30, x19, [sp, #96] // 16-byte Folded Spill 463; CHECK-GI-NEXT: .cfi_def_cfa_offset 112 464; CHECK-GI-NEXT: .cfi_offset w19, -8 465; CHECK-GI-NEXT: .cfi_offset w30, -16 466; CHECK-GI-NEXT: stp q3, q1, [sp] // 32-byte Folded Spill 467; CHECK-GI-NEXT: mov v1.16b, v2.16b 468; CHECK-GI-NEXT: stp q6, q4, [sp, #32] // 32-byte Folded Spill 469; CHECK-GI-NEXT: stp q7, q5, [sp, #64] // 32-byte Folded Spill 470; CHECK-GI-NEXT: bl __lttf2 471; CHECK-GI-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload 472; CHECK-GI-NEXT: mov w19, w0 473; CHECK-GI-NEXT: bl __lttf2 474; CHECK-GI-NEXT: ldp q3, q2, [sp, #32] // 32-byte Folded Reload 475; CHECK-GI-NEXT: cmp w19, #0 476; CHECK-GI-NEXT: ldp x30, x19, [sp, #96] // 16-byte Folded Reload 477; CHECK-GI-NEXT: mov d0, v2.d[1] 478; CHECK-GI-NEXT: mov d1, v3.d[1] 479; CHECK-GI-NEXT: fcsel d2, d2, d3, lt 480; CHECK-GI-NEXT: fmov x8, d2 481; CHECK-GI-NEXT: fcsel d3, d0, d1, lt 482; CHECK-GI-NEXT: ldp q5, q0, [sp, #64] // 32-byte Folded Reload 483; CHECK-GI-NEXT: cmp w0, #0 484; CHECK-GI-NEXT: mov d1, v0.d[1] 485; CHECK-GI-NEXT: mov d4, v5.d[1] 486; CHECK-GI-NEXT: fcsel d0, d0, d5, lt 487; CHECK-GI-NEXT: fmov x9, d0 488; CHECK-GI-NEXT: mov v0.d[0], x8 489; CHECK-GI-NEXT: fmov x8, d3 490; CHECK-GI-NEXT: fcsel d2, d1, d4, lt 491; CHECK-GI-NEXT: mov v1.d[0], x9 492; CHECK-GI-NEXT: fmov x9, d2 493; CHECK-GI-NEXT: mov v0.d[1], x8 494; CHECK-GI-NEXT: mov v1.d[1], x9 495; CHECK-GI-NEXT: add sp, sp, #112 496; CHECK-GI-NEXT: ret 497entry: 498 %c = fcmp olt <2 x fp128> %a, %b 499 %s = select <2 x i1> %c, <2 x fp128> %d, <2 x fp128> %e 500 ret <2 x fp128> %s 501} 502 503define <3 x fp128> @v3f128_fp128(<3 x fp128> %a, <3 x fp128> %b, <3 x fp128> %d, <3 x fp128> %e) { 504; CHECK-SD-LABEL: v3f128_fp128: 505; CHECK-SD: // %bb.0: // %entry 506; CHECK-SD-NEXT: sub sp, sp, #112 507; CHECK-SD-NEXT: str x30, [sp, #96] // 8-byte Folded Spill 508; CHECK-SD-NEXT: .cfi_def_cfa_offset 112 509; CHECK-SD-NEXT: .cfi_offset w30, -16 510; CHECK-SD-NEXT: stp q1, q4, [sp] // 32-byte Folded Spill 511; CHECK-SD-NEXT: mov v1.16b, v3.16b 512; CHECK-SD-NEXT: stp q2, q5, [sp, #32] // 32-byte Folded Spill 513; CHECK-SD-NEXT: stp q6, q7, [sp, #64] // 32-byte Folded Spill 514; CHECK-SD-NEXT: bl __lttf2 515; CHECK-SD-NEXT: cmp w0, #0 516; CHECK-SD-NEXT: b.lt .LBB13_2 517; CHECK-SD-NEXT: // %bb.1: 518; CHECK-SD-NEXT: ldr q0, [sp, #128] 519; CHECK-SD-NEXT: str q0, [sp, #64] // 16-byte Folded Spill 520; CHECK-SD-NEXT: .LBB13_2: // %entry 521; CHECK-SD-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload 522; CHECK-SD-NEXT: bl __lttf2 523; CHECK-SD-NEXT: cmp w0, #0 524; CHECK-SD-NEXT: b.lt .LBB13_4 525; CHECK-SD-NEXT: // %bb.3: 526; CHECK-SD-NEXT: ldr q0, [sp, #144] 527; CHECK-SD-NEXT: str q0, [sp, #80] // 16-byte Folded Spill 528; CHECK-SD-NEXT: .LBB13_4: // %entry 529; CHECK-SD-NEXT: ldp q0, q1, [sp, #32] // 32-byte Folded Reload 530; CHECK-SD-NEXT: bl __lttf2 531; CHECK-SD-NEXT: add x8, sp, #160 532; CHECK-SD-NEXT: cmp w0, #0 533; CHECK-SD-NEXT: add x9, sp, #112 534; CHECK-SD-NEXT: csel x8, x9, x8, lt 535; CHECK-SD-NEXT: ldp q0, q1, [sp, #64] // 32-byte Folded Reload 536; CHECK-SD-NEXT: ldr q2, [x8] 537; CHECK-SD-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload 538; CHECK-SD-NEXT: add sp, sp, #112 539; CHECK-SD-NEXT: ret 540; 541; CHECK-GI-LABEL: v3f128_fp128: 542; CHECK-GI: // %bb.0: // %entry 543; CHECK-GI-NEXT: sub sp, sp, #192 544; CHECK-GI-NEXT: str x30, [sp, #160] // 8-byte Folded Spill 545; CHECK-GI-NEXT: stp x20, x19, [sp, #176] // 16-byte Folded Spill 546; CHECK-GI-NEXT: .cfi_def_cfa_offset 192 547; CHECK-GI-NEXT: .cfi_offset w19, -8 548; CHECK-GI-NEXT: .cfi_offset w20, -16 549; CHECK-GI-NEXT: .cfi_offset w30, -32 550; CHECK-GI-NEXT: stp q4, q1, [sp] // 32-byte Folded Spill 551; CHECK-GI-NEXT: mov v1.16b, v3.16b 552; CHECK-GI-NEXT: stp q5, q2, [sp, #32] // 32-byte Folded Spill 553; CHECK-GI-NEXT: ldr q2, [sp, #192] 554; CHECK-GI-NEXT: str q2, [sp, #144] // 16-byte Folded Spill 555; CHECK-GI-NEXT: ldr q2, [sp, #208] 556; CHECK-GI-NEXT: stp q2, q6, [sp, #64] // 32-byte Folded Spill 557; CHECK-GI-NEXT: ldr q2, [sp, #224] 558; CHECK-GI-NEXT: stp q7, q2, [sp, #96] // 32-byte Folded Spill 559; CHECK-GI-NEXT: ldr q2, [sp, #240] 560; CHECK-GI-NEXT: str q2, [sp, #128] // 16-byte Folded Spill 561; CHECK-GI-NEXT: bl __lttf2 562; CHECK-GI-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload 563; CHECK-GI-NEXT: mov w19, w0 564; CHECK-GI-NEXT: bl __lttf2 565; CHECK-GI-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload 566; CHECK-GI-NEXT: mov w20, w0 567; CHECK-GI-NEXT: bl __lttf2 568; CHECK-GI-NEXT: ldp q5, q4, [sp, #64] // 32-byte Folded Reload 569; CHECK-GI-NEXT: cmp w19, #0 570; CHECK-GI-NEXT: ldp q7, q6, [sp, #96] // 32-byte Folded Reload 571; CHECK-GI-NEXT: ldr x30, [sp, #160] // 8-byte Folded Reload 572; CHECK-GI-NEXT: mov d0, v4.d[1] 573; CHECK-GI-NEXT: mov d1, v5.d[1] 574; CHECK-GI-NEXT: fcsel d4, d4, d5, lt 575; CHECK-GI-NEXT: mov d2, v7.d[1] 576; CHECK-GI-NEXT: mov d3, v6.d[1] 577; CHECK-GI-NEXT: fmov x8, d4 578; CHECK-GI-NEXT: fcsel d5, d0, d1, lt 579; CHECK-GI-NEXT: cmp w20, #0 580; CHECK-GI-NEXT: fcsel d1, d7, d6, lt 581; CHECK-GI-NEXT: ldp q7, q0, [sp, #128] // 32-byte Folded Reload 582; CHECK-GI-NEXT: fcsel d3, d2, d3, lt 583; CHECK-GI-NEXT: cmp w0, #0 584; CHECK-GI-NEXT: ldp x20, x19, [sp, #176] // 16-byte Folded Reload 585; CHECK-GI-NEXT: mov d2, v0.d[1] 586; CHECK-GI-NEXT: mov d6, v7.d[1] 587; CHECK-GI-NEXT: fcsel d7, d0, d7, lt 588; CHECK-GI-NEXT: mov v0.d[0], x8 589; CHECK-GI-NEXT: fmov x8, d1 590; CHECK-GI-NEXT: fmov x9, d7 591; CHECK-GI-NEXT: fcsel d4, d2, d6, lt 592; CHECK-GI-NEXT: mov v1.d[0], x8 593; CHECK-GI-NEXT: fmov x8, d5 594; CHECK-GI-NEXT: mov v2.d[0], x9 595; CHECK-GI-NEXT: fmov x9, d3 596; CHECK-GI-NEXT: fmov x10, d4 597; CHECK-GI-NEXT: mov v0.d[1], x8 598; CHECK-GI-NEXT: mov v1.d[1], x9 599; CHECK-GI-NEXT: mov v2.d[1], x10 600; CHECK-GI-NEXT: add sp, sp, #192 601; CHECK-GI-NEXT: ret 602entry: 603 %c = fcmp olt <3 x fp128> %a, %b 604 %s = select <3 x i1> %c, <3 x fp128> %d, <3 x fp128> %e 605 ret <3 x fp128> %s 606} 607 608 609define <2 x double> @v2f128_double(<2 x fp128> %a, <2 x fp128> %b, <2 x double> %d, <2 x double> %e) { 610; CHECK-SD-LABEL: v2f128_double: 611; CHECK-SD: // %bb.0: // %entry 612; CHECK-SD-NEXT: sub sp, sp, #96 613; CHECK-SD-NEXT: str x30, [sp, #80] // 8-byte Folded Spill 614; CHECK-SD-NEXT: .cfi_def_cfa_offset 96 615; CHECK-SD-NEXT: .cfi_offset w30, -16 616; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 617; CHECK-SD-NEXT: mov v0.16b, v1.16b 618; CHECK-SD-NEXT: mov v1.16b, v3.16b 619; CHECK-SD-NEXT: stp q4, q5, [sp, #48] // 32-byte Folded Spill 620; CHECK-SD-NEXT: str q2, [sp, #32] // 16-byte Folded Spill 621; CHECK-SD-NEXT: bl __lttf2 622; CHECK-SD-NEXT: cmp w0, #0 623; CHECK-SD-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload 624; CHECK-SD-NEXT: cset w8, lt 625; CHECK-SD-NEXT: sbfx x8, x8, #0, #1 626; CHECK-SD-NEXT: fmov d0, x8 627; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Folded Spill 628; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 629; CHECK-SD-NEXT: bl __lttf2 630; CHECK-SD-NEXT: cmp w0, #0 631; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload 632; CHECK-SD-NEXT: ldr x30, [sp, #80] // 8-byte Folded Reload 633; CHECK-SD-NEXT: cset w8, lt 634; CHECK-SD-NEXT: sbfx x8, x8, #0, #1 635; CHECK-SD-NEXT: fmov d0, x8 636; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] 637; CHECK-SD-NEXT: ldp q2, q1, [sp, #48] // 32-byte Folded Reload 638; CHECK-SD-NEXT: bsl v0.16b, v2.16b, v1.16b 639; CHECK-SD-NEXT: add sp, sp, #96 640; CHECK-SD-NEXT: ret 641; 642; CHECK-GI-LABEL: v2f128_double: 643; CHECK-GI: // %bb.0: // %entry 644; CHECK-GI-NEXT: sub sp, sp, #80 645; CHECK-GI-NEXT: stp x30, x19, [sp, #64] // 16-byte Folded Spill 646; CHECK-GI-NEXT: .cfi_def_cfa_offset 80 647; CHECK-GI-NEXT: .cfi_offset w19, -8 648; CHECK-GI-NEXT: .cfi_offset w30, -16 649; CHECK-GI-NEXT: stp q3, q1, [sp] // 32-byte Folded Spill 650; CHECK-GI-NEXT: mov v1.16b, v2.16b 651; CHECK-GI-NEXT: stp q5, q4, [sp, #32] // 32-byte Folded Spill 652; CHECK-GI-NEXT: bl __lttf2 653; CHECK-GI-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload 654; CHECK-GI-NEXT: cmp w0, #0 655; CHECK-GI-NEXT: cset w19, lt 656; CHECK-GI-NEXT: bl __lttf2 657; CHECK-GI-NEXT: mov v0.d[0], x19 658; CHECK-GI-NEXT: cmp w0, #0 659; CHECK-GI-NEXT: cset w8, lt 660; CHECK-GI-NEXT: ldp q2, q1, [sp, #32] // 32-byte Folded Reload 661; CHECK-GI-NEXT: ldp x30, x19, [sp, #64] // 16-byte Folded Reload 662; CHECK-GI-NEXT: mov v0.d[1], x8 663; CHECK-GI-NEXT: shl v0.2d, v0.2d, #63 664; CHECK-GI-NEXT: sshr v0.2d, v0.2d, #63 665; CHECK-GI-NEXT: bsl v0.16b, v1.16b, v2.16b 666; CHECK-GI-NEXT: add sp, sp, #80 667; CHECK-GI-NEXT: ret 668entry: 669 %c = fcmp olt <2 x fp128> %a, %b 670 %s = select <2 x i1> %c, <2 x double> %d, <2 x double> %e 671 ret <2 x double> %s 672} 673 674define <3 x double> @v3f128_double(<3 x fp128> %a, <3 x fp128> %b, <3 x double> %d, <3 x double> %e) { 675; CHECK-SD-LABEL: v3f128_double: 676; CHECK-SD: // %bb.0: // %entry 677; CHECK-SD-NEXT: sub sp, sp, #160 678; CHECK-SD-NEXT: str x30, [sp, #144] // 8-byte Folded Spill 679; CHECK-SD-NEXT: .cfi_def_cfa_offset 160 680; CHECK-SD-NEXT: .cfi_offset w30, -16 681; CHECK-SD-NEXT: stp q2, q5, [sp, #112] // 32-byte Folded Spill 682; CHECK-SD-NEXT: // kill: def $d6 killed $d6 def $q6 683; CHECK-SD-NEXT: // kill: def $d7 killed $d7 def $q7 684; CHECK-SD-NEXT: ldr d5, [sp, #184] 685; CHECK-SD-NEXT: str q3, [sp, #64] // 16-byte Folded Spill 686; CHECK-SD-NEXT: ldp d3, d2, [sp, #168] 687; CHECK-SD-NEXT: mov v6.d[1], v7.d[0] 688; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Folded Spill 689; CHECK-SD-NEXT: mov v0.16b, v1.16b 690; CHECK-SD-NEXT: mov v1.16b, v4.16b 691; CHECK-SD-NEXT: str q5, [sp, #96] // 16-byte Folded Spill 692; CHECK-SD-NEXT: ldr d5, [sp, #160] 693; CHECK-SD-NEXT: mov v3.d[1], v2.d[0] 694; CHECK-SD-NEXT: str q5, [sp, #80] // 16-byte Folded Spill 695; CHECK-SD-NEXT: stp q6, q3, [sp, #32] // 32-byte Folded Spill 696; CHECK-SD-NEXT: bl __lttf2 697; CHECK-SD-NEXT: cmp w0, #0 698; CHECK-SD-NEXT: ldr q1, [sp, #64] // 16-byte Folded Reload 699; CHECK-SD-NEXT: cset w8, lt 700; CHECK-SD-NEXT: sbfx x8, x8, #0, #1 701; CHECK-SD-NEXT: fmov d0, x8 702; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill 703; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload 704; CHECK-SD-NEXT: bl __lttf2 705; CHECK-SD-NEXT: cmp w0, #0 706; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload 707; CHECK-SD-NEXT: cset w8, lt 708; CHECK-SD-NEXT: sbfx x8, x8, #0, #1 709; CHECK-SD-NEXT: fmov d1, x8 710; CHECK-SD-NEXT: mov v1.d[1], v0.d[0] 711; CHECK-SD-NEXT: str q1, [sp, #64] // 16-byte Folded Spill 712; CHECK-SD-NEXT: ldp q0, q1, [sp, #112] // 32-byte Folded Reload 713; CHECK-SD-NEXT: bl __lttf2 714; CHECK-SD-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload 715; CHECK-SD-NEXT: cmp w0, #0 716; CHECK-SD-NEXT: ldp q2, q4, [sp, #64] // 32-byte Folded Reload 717; CHECK-SD-NEXT: cset w8, lt 718; CHECK-SD-NEXT: sbfx x8, x8, #0, #1 719; CHECK-SD-NEXT: ldr q3, [sp, #96] // 16-byte Folded Reload 720; CHECK-SD-NEXT: ldr x30, [sp, #144] // 8-byte Folded Reload 721; CHECK-SD-NEXT: bit v0.16b, v1.16b, v2.16b 722; CHECK-SD-NEXT: fmov d2, x8 723; CHECK-SD-NEXT: bsl v2.16b, v4.16b, v3.16b 724; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8 725; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 726; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2 727; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1 728; CHECK-SD-NEXT: add sp, sp, #160 729; CHECK-SD-NEXT: ret 730; 731; CHECK-GI-LABEL: v3f128_double: 732; CHECK-GI: // %bb.0: // %entry 733; CHECK-GI-NEXT: sub sp, sp, #176 734; CHECK-GI-NEXT: str x30, [sp, #128] // 8-byte Folded Spill 735; CHECK-GI-NEXT: stp x22, x21, [sp, #144] // 16-byte Folded Spill 736; CHECK-GI-NEXT: stp x20, x19, [sp, #160] // 16-byte Folded Spill 737; CHECK-GI-NEXT: .cfi_def_cfa_offset 176 738; CHECK-GI-NEXT: .cfi_offset w19, -8 739; CHECK-GI-NEXT: .cfi_offset w20, -16 740; CHECK-GI-NEXT: .cfi_offset w21, -24 741; CHECK-GI-NEXT: .cfi_offset w22, -32 742; CHECK-GI-NEXT: .cfi_offset w30, -48 743; CHECK-GI-NEXT: stp q4, q1, [sp] // 32-byte Folded Spill 744; CHECK-GI-NEXT: mov v1.16b, v3.16b 745; CHECK-GI-NEXT: ldr x19, [sp, #176] 746; CHECK-GI-NEXT: stp q5, q2, [sp, #32] // 32-byte Folded Spill 747; CHECK-GI-NEXT: ldr d2, [sp, #184] 748; CHECK-GI-NEXT: ldr x20, [sp, #200] 749; CHECK-GI-NEXT: // kill: def $d6 killed $d6 def $q6 750; CHECK-GI-NEXT: // kill: def $d7 killed $d7 def $q7 751; CHECK-GI-NEXT: str q7, [sp, #64] // 16-byte Folded Spill 752; CHECK-GI-NEXT: str q2, [sp, #112] // 16-byte Folded Spill 753; CHECK-GI-NEXT: ldr d2, [sp, #192] 754; CHECK-GI-NEXT: stp q6, q2, [sp, #80] // 32-byte Folded Spill 755; CHECK-GI-NEXT: bl __lttf2 756; CHECK-GI-NEXT: ldp q1, q0, [sp] // 32-byte Folded Reload 757; CHECK-GI-NEXT: cmp w0, #0 758; CHECK-GI-NEXT: cset w21, lt 759; CHECK-GI-NEXT: bl __lttf2 760; CHECK-GI-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload 761; CHECK-GI-NEXT: cmp w0, #0 762; CHECK-GI-NEXT: cset w22, lt 763; CHECK-GI-NEXT: bl __lttf2 764; CHECK-GI-NEXT: sbfx x8, x21, #0, #1 765; CHECK-GI-NEXT: ldp q3, q2, [sp, #64] // 32-byte Folded Reload 766; CHECK-GI-NEXT: cmp w0, #0 767; CHECK-GI-NEXT: ldr x30, [sp, #128] // 8-byte Folded Reload 768; CHECK-GI-NEXT: mov v0.d[0], x8 769; CHECK-GI-NEXT: mov v1.d[0], x8 770; CHECK-GI-NEXT: sbfx x8, x22, #0, #1 771; CHECK-GI-NEXT: mov v2.d[1], v3.d[0] 772; CHECK-GI-NEXT: ldp q4, q3, [sp, #96] // 32-byte Folded Reload 773; CHECK-GI-NEXT: ldp x22, x21, [sp, #144] // 16-byte Folded Reload 774; CHECK-GI-NEXT: mov v0.d[1], x8 775; CHECK-GI-NEXT: mov v1.d[1], x8 776; CHECK-GI-NEXT: mov v3.d[1], v4.d[0] 777; CHECK-GI-NEXT: cset w8, lt 778; CHECK-GI-NEXT: sbfx x8, x8, #0, #1 779; CHECK-GI-NEXT: and v1.16b, v2.16b, v1.16b 780; CHECK-GI-NEXT: bic v0.16b, v3.16b, v0.16b 781; CHECK-GI-NEXT: and x9, x19, x8 782; CHECK-GI-NEXT: bic x8, x20, x8 783; CHECK-GI-NEXT: ldp x20, x19, [sp, #160] // 16-byte Folded Reload 784; CHECK-GI-NEXT: orr x8, x9, x8 785; CHECK-GI-NEXT: orr v0.16b, v1.16b, v0.16b 786; CHECK-GI-NEXT: fmov d2, x8 787; CHECK-GI-NEXT: mov d1, v0.d[1] 788; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 789; CHECK-GI-NEXT: add sp, sp, #176 790; CHECK-GI-NEXT: ret 791entry: 792 %c = fcmp olt <3 x fp128> %a, %b 793 %s = select <3 x i1> %c, <3 x double> %d, <3 x double> %e 794 ret <3 x double> %s 795} 796 797define <2 x double> @v2f64_double(<2 x double> %a, <2 x double> %b, <2 x double> %d, <2 x double> %e) { 798; CHECK-LABEL: v2f64_double: 799; CHECK: // %bb.0: // %entry 800; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d 801; CHECK-NEXT: bsl v0.16b, v2.16b, v3.16b 802; CHECK-NEXT: ret 803entry: 804 %c = fcmp olt <2 x double> %a, %b 805 %s = select <2 x i1> %c, <2 x double> %d, <2 x double> %e 806 ret <2 x double> %s 807} 808 809define <3 x double> @v3f64_double(<3 x double> %a, <3 x double> %b, <3 x double> %d, <3 x double> %e) { 810; CHECK-SD-LABEL: v3f64_double: 811; CHECK-SD: // %bb.0: // %entry 812; CHECK-SD-NEXT: // kill: def $d3 killed $d3 def $q3 813; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 814; CHECK-SD-NEXT: // kill: def $d4 killed $d4 def $q4 815; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 816; CHECK-SD-NEXT: // kill: def $d6 killed $d6 def $q6 817; CHECK-SD-NEXT: // kill: def $d7 killed $d7 def $q7 818; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2 819; CHECK-SD-NEXT: // kill: def $d5 killed $d5 def $q5 820; CHECK-SD-NEXT: ldr d16, [sp, #24] 821; CHECK-SD-NEXT: ldr d17, [sp] 822; CHECK-SD-NEXT: mov v3.d[1], v4.d[0] 823; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] 824; CHECK-SD-NEXT: mov v6.d[1], v7.d[0] 825; CHECK-SD-NEXT: ldp d1, d4, [sp, #8] 826; CHECK-SD-NEXT: fcmgt v2.2d, v5.2d, v2.2d 827; CHECK-SD-NEXT: mov v1.d[1], v4.d[0] 828; CHECK-SD-NEXT: fcmgt v0.2d, v3.2d, v0.2d 829; CHECK-SD-NEXT: bsl v2.16b, v17.16b, v16.16b 830; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2 831; CHECK-SD-NEXT: bsl v0.16b, v6.16b, v1.16b 832; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8 833; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 834; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1 835; CHECK-SD-NEXT: ret 836; 837; CHECK-GI-LABEL: v3f64_double: 838; CHECK-GI: // %bb.0: // %entry 839; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 840; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3 841; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 842; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4 843; CHECK-GI-NEXT: // kill: def $d6 killed $d6 def $q6 844; CHECK-GI-NEXT: // kill: def $d7 killed $d7 def $q7 845; CHECK-GI-NEXT: fcmp d2, d5 846; CHECK-GI-NEXT: ldr x8, [sp] 847; CHECK-GI-NEXT: ldr x10, [sp, #24] 848; CHECK-GI-NEXT: mov v0.d[1], v1.d[0] 849; CHECK-GI-NEXT: mov v3.d[1], v4.d[0] 850; CHECK-GI-NEXT: mov v6.d[1], v7.d[0] 851; CHECK-GI-NEXT: ldp d1, d4, [sp, #8] 852; CHECK-GI-NEXT: cset w9, mi 853; CHECK-GI-NEXT: sbfx x9, x9, #0, #1 854; CHECK-GI-NEXT: fcmgt v0.2d, v3.2d, v0.2d 855; CHECK-GI-NEXT: mov v1.d[1], v4.d[0] 856; CHECK-GI-NEXT: and x8, x8, x9 857; CHECK-GI-NEXT: bic x9, x10, x9 858; CHECK-GI-NEXT: orr x8, x8, x9 859; CHECK-GI-NEXT: fmov d2, x8 860; CHECK-GI-NEXT: bsl v0.16b, v6.16b, v1.16b 861; CHECK-GI-NEXT: mov d1, v0.d[1] 862; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 863; CHECK-GI-NEXT: ret 864entry: 865 %c = fcmp olt <3 x double> %a, %b 866 %s = select <3 x i1> %c, <3 x double> %d, <3 x double> %e 867 ret <3 x double> %s 868} 869 870define <4 x double> @v4f64_double(<4 x double> %a, <4 x double> %b, <4 x double> %d, <4 x double> %e) { 871; CHECK-SD-LABEL: v4f64_double: 872; CHECK-SD: // %bb.0: // %entry 873; CHECK-SD-NEXT: fcmgt v1.2d, v3.2d, v1.2d 874; CHECK-SD-NEXT: fcmgt v0.2d, v2.2d, v0.2d 875; CHECK-SD-NEXT: bsl v1.16b, v5.16b, v7.16b 876; CHECK-SD-NEXT: bsl v0.16b, v4.16b, v6.16b 877; CHECK-SD-NEXT: ret 878; 879; CHECK-GI-LABEL: v4f64_double: 880; CHECK-GI: // %bb.0: // %entry 881; CHECK-GI-NEXT: fcmgt v0.2d, v2.2d, v0.2d 882; CHECK-GI-NEXT: fcmgt v1.2d, v3.2d, v1.2d 883; CHECK-GI-NEXT: bsl v0.16b, v4.16b, v6.16b 884; CHECK-GI-NEXT: bsl v1.16b, v5.16b, v7.16b 885; CHECK-GI-NEXT: ret 886entry: 887 %c = fcmp olt <4 x double> %a, %b 888 %s = select <4 x i1> %c, <4 x double> %d, <4 x double> %e 889 ret <4 x double> %s 890} 891 892define <2 x i32> @v2f64_i32(<2 x double> %a, <2 x double> %b, <2 x i32> %d, <2 x i32> %e) { 893; CHECK-LABEL: v2f64_i32: 894; CHECK: // %bb.0: // %entry 895; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d 896; CHECK-NEXT: xtn v0.2s, v0.2d 897; CHECK-NEXT: bsl v0.8b, v2.8b, v3.8b 898; CHECK-NEXT: ret 899entry: 900 %c = fcmp olt <2 x double> %a, %b 901 %s = select <2 x i1> %c, <2 x i32> %d, <2 x i32> %e 902 ret <2 x i32> %s 903} 904 905define <3 x i32> @v3f64_i32(<3 x double> %a, <3 x double> %b, <3 x i32> %d, <3 x i32> %e) { 906; CHECK-SD-LABEL: v3f64_i32: 907; CHECK-SD: // %bb.0: // %entry 908; CHECK-SD-NEXT: // kill: def $d3 killed $d3 def $q3 909; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 910; CHECK-SD-NEXT: // kill: def $d4 killed $d4 def $q4 911; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 912; CHECK-SD-NEXT: // kill: def $d5 killed $d5 def $q5 913; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2 914; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] 915; CHECK-SD-NEXT: mov v3.d[1], v4.d[0] 916; CHECK-SD-NEXT: fcmgt v1.2d, v5.2d, v2.2d 917; CHECK-SD-NEXT: fcmgt v0.2d, v3.2d, v0.2d 918; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s 919; CHECK-SD-NEXT: bsl v0.16b, v6.16b, v7.16b 920; CHECK-SD-NEXT: ret 921; 922; CHECK-GI-LABEL: v3f64_i32: 923; CHECK-GI: // %bb.0: // %entry 924; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 925; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3 926; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 927; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4 928; CHECK-GI-NEXT: mov w8, #31 // =0x1f 929; CHECK-GI-NEXT: fcmp d2, d5 930; CHECK-GI-NEXT: mov v0.d[1], v1.d[0] 931; CHECK-GI-NEXT: mov v3.d[1], v4.d[0] 932; CHECK-GI-NEXT: mov v1.s[0], w8 933; CHECK-GI-NEXT: cset w9, mi 934; CHECK-GI-NEXT: mov v2.s[0], w9 935; CHECK-GI-NEXT: mov w9, #-1 // =0xffffffff 936; CHECK-GI-NEXT: fcmgt v0.2d, v3.2d, v0.2d 937; CHECK-GI-NEXT: mov v1.s[1], w8 938; CHECK-GI-NEXT: mov v3.s[0], w9 939; CHECK-GI-NEXT: xtn v0.2s, v0.2d 940; CHECK-GI-NEXT: mov v1.s[2], w8 941; CHECK-GI-NEXT: mov v3.s[1], w9 942; CHECK-GI-NEXT: mov v0.d[1], v2.d[0] 943; CHECK-GI-NEXT: mov v3.s[2], w9 944; CHECK-GI-NEXT: ushl v0.4s, v0.4s, v1.4s 945; CHECK-GI-NEXT: neg v1.4s, v1.4s 946; CHECK-GI-NEXT: sshl v0.4s, v0.4s, v1.4s 947; CHECK-GI-NEXT: eor v1.16b, v0.16b, v3.16b 948; CHECK-GI-NEXT: and v0.16b, v6.16b, v0.16b 949; CHECK-GI-NEXT: and v1.16b, v7.16b, v1.16b 950; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b 951; CHECK-GI-NEXT: ret 952entry: 953 %c = fcmp olt <3 x double> %a, %b 954 %s = select <3 x i1> %c, <3 x i32> %d, <3 x i32> %e 955 ret <3 x i32> %s 956} 957 958define <4 x i32> @v4f64_i32(<4 x double> %a, <4 x double> %b, <4 x i32> %d, <4 x i32> %e) { 959; CHECK-SD-LABEL: v4f64_i32: 960; CHECK-SD: // %bb.0: // %entry 961; CHECK-SD-NEXT: fcmgt v1.2d, v3.2d, v1.2d 962; CHECK-SD-NEXT: fcmgt v0.2d, v2.2d, v0.2d 963; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s 964; CHECK-SD-NEXT: bsl v0.16b, v4.16b, v5.16b 965; CHECK-SD-NEXT: ret 966; 967; CHECK-GI-LABEL: v4f64_i32: 968; CHECK-GI: // %bb.0: // %entry 969; CHECK-GI-NEXT: fcmgt v0.2d, v2.2d, v0.2d 970; CHECK-GI-NEXT: fcmgt v1.2d, v3.2d, v1.2d 971; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s 972; CHECK-GI-NEXT: shl v0.4s, v0.4s, #31 973; CHECK-GI-NEXT: sshr v0.4s, v0.4s, #31 974; CHECK-GI-NEXT: bsl v0.16b, v4.16b, v5.16b 975; CHECK-GI-NEXT: ret 976entry: 977 %c = fcmp olt <4 x double> %a, %b 978 %s = select <4 x i1> %c, <4 x i32> %d, <4 x i32> %e 979 ret <4 x i32> %s 980} 981 982define <2 x float> @v2f32_float(<2 x float> %a, <2 x float> %b, <2 x float> %d, <2 x float> %e) { 983; CHECK-LABEL: v2f32_float: 984; CHECK: // %bb.0: // %entry 985; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s 986; CHECK-NEXT: bsl v0.8b, v2.8b, v3.8b 987; CHECK-NEXT: ret 988entry: 989 %c = fcmp olt <2 x float> %a, %b 990 %s = select <2 x i1> %c, <2 x float> %d, <2 x float> %e 991 ret <2 x float> %s 992} 993 994define <3 x float> @v3f32_float(<3 x float> %a, <3 x float> %b, <3 x float> %d, <3 x float> %e) { 995; CHECK-SD-LABEL: v3f32_float: 996; CHECK-SD: // %bb.0: // %entry 997; CHECK-SD-NEXT: fcmgt v0.4s, v1.4s, v0.4s 998; CHECK-SD-NEXT: bsl v0.16b, v2.16b, v3.16b 999; CHECK-SD-NEXT: ret 1000; 1001; CHECK-GI-LABEL: v3f32_float: 1002; CHECK-GI: // %bb.0: // %entry 1003; CHECK-GI-NEXT: mov w8, #31 // =0x1f 1004; CHECK-GI-NEXT: mov w9, #-1 // =0xffffffff 1005; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1006; CHECK-GI-NEXT: mov v4.s[0], w8 1007; CHECK-GI-NEXT: mov v5.s[0], w9 1008; CHECK-GI-NEXT: mov v4.s[1], w8 1009; CHECK-GI-NEXT: mov v5.s[1], w9 1010; CHECK-GI-NEXT: mov v4.s[2], w8 1011; CHECK-GI-NEXT: mov v5.s[2], w9 1012; CHECK-GI-NEXT: ushl v0.4s, v0.4s, v4.4s 1013; CHECK-GI-NEXT: neg v1.4s, v4.4s 1014; CHECK-GI-NEXT: sshl v0.4s, v0.4s, v1.4s 1015; CHECK-GI-NEXT: eor v1.16b, v0.16b, v5.16b 1016; CHECK-GI-NEXT: and v0.16b, v2.16b, v0.16b 1017; CHECK-GI-NEXT: and v1.16b, v3.16b, v1.16b 1018; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b 1019; CHECK-GI-NEXT: ret 1020entry: 1021 %c = fcmp olt <3 x float> %a, %b 1022 %s = select <3 x i1> %c, <3 x float> %d, <3 x float> %e 1023 ret <3 x float> %s 1024} 1025 1026define <4 x float> @v4f32_float(<4 x float> %a, <4 x float> %b, <4 x float> %d, <4 x float> %e) { 1027; CHECK-LABEL: v4f32_float: 1028; CHECK: // %bb.0: // %entry 1029; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1030; CHECK-NEXT: bsl v0.16b, v2.16b, v3.16b 1031; CHECK-NEXT: ret 1032entry: 1033 %c = fcmp olt <4 x float> %a, %b 1034 %s = select <4 x i1> %c, <4 x float> %d, <4 x float> %e 1035 ret <4 x float> %s 1036} 1037 1038define <8 x float> @v8f32_float(<8 x float> %a, <8 x float> %b, <8 x float> %d, <8 x float> %e) { 1039; CHECK-SD-LABEL: v8f32_float: 1040; CHECK-SD: // %bb.0: // %entry 1041; CHECK-SD-NEXT: fcmgt v1.4s, v3.4s, v1.4s 1042; CHECK-SD-NEXT: fcmgt v0.4s, v2.4s, v0.4s 1043; CHECK-SD-NEXT: bsl v1.16b, v5.16b, v7.16b 1044; CHECK-SD-NEXT: bsl v0.16b, v4.16b, v6.16b 1045; CHECK-SD-NEXT: ret 1046; 1047; CHECK-GI-LABEL: v8f32_float: 1048; CHECK-GI: // %bb.0: // %entry 1049; CHECK-GI-NEXT: fcmgt v0.4s, v2.4s, v0.4s 1050; CHECK-GI-NEXT: fcmgt v1.4s, v3.4s, v1.4s 1051; CHECK-GI-NEXT: bsl v0.16b, v4.16b, v6.16b 1052; CHECK-GI-NEXT: bsl v1.16b, v5.16b, v7.16b 1053; CHECK-GI-NEXT: ret 1054entry: 1055 %c = fcmp olt <8 x float> %a, %b 1056 %s = select <8 x i1> %c, <8 x float> %d, <8 x float> %e 1057 ret <8 x float> %s 1058} 1059 1060define <2 x i32> @v2f32_i32(<2 x float> %a, <2 x float> %b, <2 x i32> %d, <2 x i32> %e) { 1061; CHECK-LABEL: v2f32_i32: 1062; CHECK: // %bb.0: // %entry 1063; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s 1064; CHECK-NEXT: bsl v0.8b, v2.8b, v3.8b 1065; CHECK-NEXT: ret 1066entry: 1067 %c = fcmp olt <2 x float> %a, %b 1068 %s = select <2 x i1> %c, <2 x i32> %d, <2 x i32> %e 1069 ret <2 x i32> %s 1070} 1071 1072define <3 x i32> @v3f32_i32(<3 x float> %a, <3 x float> %b, <3 x i32> %d, <3 x i32> %e) { 1073; CHECK-SD-LABEL: v3f32_i32: 1074; CHECK-SD: // %bb.0: // %entry 1075; CHECK-SD-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1076; CHECK-SD-NEXT: bsl v0.16b, v2.16b, v3.16b 1077; CHECK-SD-NEXT: ret 1078; 1079; CHECK-GI-LABEL: v3f32_i32: 1080; CHECK-GI: // %bb.0: // %entry 1081; CHECK-GI-NEXT: mov w8, #31 // =0x1f 1082; CHECK-GI-NEXT: mov w9, #-1 // =0xffffffff 1083; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1084; CHECK-GI-NEXT: mov v4.s[0], w8 1085; CHECK-GI-NEXT: mov v5.s[0], w9 1086; CHECK-GI-NEXT: mov v4.s[1], w8 1087; CHECK-GI-NEXT: mov v5.s[1], w9 1088; CHECK-GI-NEXT: mov v4.s[2], w8 1089; CHECK-GI-NEXT: mov v5.s[2], w9 1090; CHECK-GI-NEXT: ushl v0.4s, v0.4s, v4.4s 1091; CHECK-GI-NEXT: neg v1.4s, v4.4s 1092; CHECK-GI-NEXT: sshl v0.4s, v0.4s, v1.4s 1093; CHECK-GI-NEXT: eor v1.16b, v0.16b, v5.16b 1094; CHECK-GI-NEXT: and v0.16b, v2.16b, v0.16b 1095; CHECK-GI-NEXT: and v1.16b, v3.16b, v1.16b 1096; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b 1097; CHECK-GI-NEXT: ret 1098entry: 1099 %c = fcmp olt <3 x float> %a, %b 1100 %s = select <3 x i1> %c, <3 x i32> %d, <3 x i32> %e 1101 ret <3 x i32> %s 1102} 1103 1104define <4 x i32> @v4f32_i32(<4 x float> %a, <4 x float> %b, <4 x i32> %d, <4 x i32> %e) { 1105; CHECK-LABEL: v4f32_i32: 1106; CHECK: // %bb.0: // %entry 1107; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1108; CHECK-NEXT: bsl v0.16b, v2.16b, v3.16b 1109; CHECK-NEXT: ret 1110entry: 1111 %c = fcmp olt <4 x float> %a, %b 1112 %s = select <4 x i1> %c, <4 x i32> %d, <4 x i32> %e 1113 ret <4 x i32> %s 1114} 1115 1116define <8 x i32> @v8f32_i32(<8 x float> %a, <8 x float> %b, <8 x i32> %d, <8 x i32> %e) { 1117; CHECK-SD-LABEL: v8f32_i32: 1118; CHECK-SD: // %bb.0: // %entry 1119; CHECK-SD-NEXT: fcmgt v1.4s, v3.4s, v1.4s 1120; CHECK-SD-NEXT: fcmgt v0.4s, v2.4s, v0.4s 1121; CHECK-SD-NEXT: bsl v1.16b, v5.16b, v7.16b 1122; CHECK-SD-NEXT: bsl v0.16b, v4.16b, v6.16b 1123; CHECK-SD-NEXT: ret 1124; 1125; CHECK-GI-LABEL: v8f32_i32: 1126; CHECK-GI: // %bb.0: // %entry 1127; CHECK-GI-NEXT: fcmgt v0.4s, v2.4s, v0.4s 1128; CHECK-GI-NEXT: fcmgt v1.4s, v3.4s, v1.4s 1129; CHECK-GI-NEXT: bsl v0.16b, v4.16b, v6.16b 1130; CHECK-GI-NEXT: bsl v1.16b, v5.16b, v7.16b 1131; CHECK-GI-NEXT: ret 1132entry: 1133 %c = fcmp olt <8 x float> %a, %b 1134 %s = select <8 x i1> %c, <8 x i32> %d, <8 x i32> %e 1135 ret <8 x i32> %s 1136} 1137 1138define <7 x half> @v7f16_half(<7 x half> %a, <7 x half> %b, <7 x half> %d, <7 x half> %e) { 1139; CHECK-SD-NOFP16-LABEL: v7f16_half: 1140; CHECK-SD-NOFP16: // %bb.0: // %entry 1141; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[1] 1142; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[1] 1143; CHECK-SD-NOFP16-NEXT: fcvt s6, h1 1144; CHECK-SD-NOFP16-NEXT: fcvt s7, h0 1145; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2] 1146; CHECK-SD-NOFP16-NEXT: fcvt s4, h4 1147; CHECK-SD-NOFP16-NEXT: fcvt s5, h5 1148; CHECK-SD-NOFP16-NEXT: fcmp s5, s4 1149; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[2] 1150; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[3] 1151; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1152; CHECK-SD-NOFP16-NEXT: fcmp s7, s6 1153; CHECK-SD-NOFP16-NEXT: fcvt s7, h16 1154; CHECK-SD-NOFP16-NEXT: fcvt s4, h4 1155; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[3] 1156; CHECK-SD-NOFP16-NEXT: fcvt s5, h5 1157; CHECK-SD-NOFP16-NEXT: mov h16, v0.h[4] 1158; CHECK-SD-NOFP16-NEXT: csetm w9, mi 1159; CHECK-SD-NOFP16-NEXT: fcmp s4, s7 1160; CHECK-SD-NOFP16-NEXT: fmov s4, w9 1161; CHECK-SD-NOFP16-NEXT: fcvt s6, h6 1162; CHECK-SD-NOFP16-NEXT: mov h7, v1.h[4] 1163; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1164; CHECK-SD-NOFP16-NEXT: mov v4.h[1], w8 1165; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1166; CHECK-SD-NOFP16-NEXT: fcmp s6, s5 1167; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[5] 1168; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[5] 1169; CHECK-SD-NOFP16-NEXT: fcvt s7, h7 1170; CHECK-SD-NOFP16-NEXT: mov v4.h[2], w8 1171; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1172; CHECK-SD-NOFP16-NEXT: fcvt s5, h5 1173; CHECK-SD-NOFP16-NEXT: fcvt s6, h6 1174; CHECK-SD-NOFP16-NEXT: fcmp s16, s7 1175; CHECK-SD-NOFP16-NEXT: mov h7, v1.h[6] 1176; CHECK-SD-NOFP16-NEXT: mov h16, v0.h[6] 1177; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[7] 1178; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7] 1179; CHECK-SD-NOFP16-NEXT: mov v4.h[3], w8 1180; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1181; CHECK-SD-NOFP16-NEXT: fcmp s6, s5 1182; CHECK-SD-NOFP16-NEXT: fcvt s5, h7 1183; CHECK-SD-NOFP16-NEXT: fcvt s6, h16 1184; CHECK-SD-NOFP16-NEXT: fcvt s1, h1 1185; CHECK-SD-NOFP16-NEXT: fcvt s0, h0 1186; CHECK-SD-NOFP16-NEXT: mov v4.h[4], w8 1187; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1188; CHECK-SD-NOFP16-NEXT: fcmp s6, s5 1189; CHECK-SD-NOFP16-NEXT: mov v4.h[5], w8 1190; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1191; CHECK-SD-NOFP16-NEXT: fcmp s0, s1 1192; CHECK-SD-NOFP16-NEXT: mov v4.h[6], w8 1193; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1194; CHECK-SD-NOFP16-NEXT: mov v4.h[7], w8 1195; CHECK-SD-NOFP16-NEXT: mov v0.16b, v4.16b 1196; CHECK-SD-NOFP16-NEXT: bsl v0.16b, v2.16b, v3.16b 1197; CHECK-SD-NOFP16-NEXT: ret 1198; 1199; CHECK-SD-FP16-LABEL: v7f16_half: 1200; CHECK-SD-FP16: // %bb.0: // %entry 1201; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h 1202; CHECK-SD-FP16-NEXT: bsl v0.16b, v2.16b, v3.16b 1203; CHECK-SD-FP16-NEXT: ret 1204; 1205; CHECK-GI-NOFP16-LABEL: v7f16_half: 1206; CHECK-GI-NOFP16: // %bb.0: // %entry 1207; CHECK-GI-NOFP16-NEXT: mov w8, #15 // =0xf 1208; CHECK-GI-NOFP16-NEXT: mov v4.h[0], v0.h[4] 1209; CHECK-GI-NOFP16-NEXT: mov v6.h[0], v1.h[4] 1210; CHECK-GI-NOFP16-NEXT: fmov s5, w8 1211; CHECK-GI-NOFP16-NEXT: mov w9, #65535 // =0xffff 1212; CHECK-GI-NOFP16-NEXT: fmov s7, w9 1213; CHECK-GI-NOFP16-NEXT: mov v5.h[1], w8 1214; CHECK-GI-NOFP16-NEXT: mov v4.h[1], v0.h[5] 1215; CHECK-GI-NOFP16-NEXT: mov v6.h[1], v1.h[5] 1216; CHECK-GI-NOFP16-NEXT: mov v7.h[1], w9 1217; CHECK-GI-NOFP16-NEXT: mov v5.h[2], w8 1218; CHECK-GI-NOFP16-NEXT: mov v4.h[2], v0.h[6] 1219; CHECK-GI-NOFP16-NEXT: mov v6.h[2], v1.h[6] 1220; CHECK-GI-NOFP16-NEXT: mov v7.h[2], w9 1221; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h 1222; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h 1223; CHECK-GI-NOFP16-NEXT: mov v5.h[3], w8 1224; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v4.4h 1225; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v6.4h 1226; CHECK-GI-NOFP16-NEXT: mov v7.h[3], w9 1227; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1228; CHECK-GI-NOFP16-NEXT: mov v5.h[4], w8 1229; CHECK-GI-NOFP16-NEXT: fcmgt v1.4s, v6.4s, v4.4s 1230; CHECK-GI-NOFP16-NEXT: mov v7.h[4], w9 1231; CHECK-GI-NOFP16-NEXT: mov v5.h[5], w8 1232; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h 1233; CHECK-GI-NOFP16-NEXT: mov v7.h[5], w9 1234; CHECK-GI-NOFP16-NEXT: mov v5.h[6], w8 1235; CHECK-GI-NOFP16-NEXT: mov v7.h[6], w9 1236; CHECK-GI-NOFP16-NEXT: ushl v0.8h, v0.8h, v5.8h 1237; CHECK-GI-NOFP16-NEXT: neg v1.8h, v5.8h 1238; CHECK-GI-NOFP16-NEXT: sshl v0.8h, v0.8h, v1.8h 1239; CHECK-GI-NOFP16-NEXT: eor v1.16b, v0.16b, v7.16b 1240; CHECK-GI-NOFP16-NEXT: and v0.16b, v2.16b, v0.16b 1241; CHECK-GI-NOFP16-NEXT: and v1.16b, v3.16b, v1.16b 1242; CHECK-GI-NOFP16-NEXT: orr v0.16b, v0.16b, v1.16b 1243; CHECK-GI-NOFP16-NEXT: ret 1244; 1245; CHECK-GI-FP16-LABEL: v7f16_half: 1246; CHECK-GI-FP16: // %bb.0: // %entry 1247; CHECK-GI-FP16-NEXT: mov w8, #15 // =0xf 1248; CHECK-GI-FP16-NEXT: mov w9, #65535 // =0xffff 1249; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h 1250; CHECK-GI-FP16-NEXT: fmov s4, w8 1251; CHECK-GI-FP16-NEXT: fmov s5, w9 1252; CHECK-GI-FP16-NEXT: mov v4.h[1], w8 1253; CHECK-GI-FP16-NEXT: mov v5.h[1], w9 1254; CHECK-GI-FP16-NEXT: mov v4.h[2], w8 1255; CHECK-GI-FP16-NEXT: mov v5.h[2], w9 1256; CHECK-GI-FP16-NEXT: mov v4.h[3], w8 1257; CHECK-GI-FP16-NEXT: mov v5.h[3], w9 1258; CHECK-GI-FP16-NEXT: mov v4.h[4], w8 1259; CHECK-GI-FP16-NEXT: mov v5.h[4], w9 1260; CHECK-GI-FP16-NEXT: mov v4.h[5], w8 1261; CHECK-GI-FP16-NEXT: mov v5.h[5], w9 1262; CHECK-GI-FP16-NEXT: mov v4.h[6], w8 1263; CHECK-GI-FP16-NEXT: mov v5.h[6], w9 1264; CHECK-GI-FP16-NEXT: ushl v0.8h, v0.8h, v4.8h 1265; CHECK-GI-FP16-NEXT: neg v1.8h, v4.8h 1266; CHECK-GI-FP16-NEXT: sshl v0.8h, v0.8h, v1.8h 1267; CHECK-GI-FP16-NEXT: eor v1.16b, v0.16b, v5.16b 1268; CHECK-GI-FP16-NEXT: and v0.16b, v2.16b, v0.16b 1269; CHECK-GI-FP16-NEXT: and v1.16b, v3.16b, v1.16b 1270; CHECK-GI-FP16-NEXT: orr v0.16b, v0.16b, v1.16b 1271; CHECK-GI-FP16-NEXT: ret 1272entry: 1273 %c = fcmp olt <7 x half> %a, %b 1274 %s = select <7 x i1> %c, <7 x half> %d, <7 x half> %e 1275 ret <7 x half> %s 1276} 1277 1278define <4 x half> @v4f16_half(<4 x half> %a, <4 x half> %b, <4 x half> %d, <4 x half> %e) { 1279; CHECK-SD-NOFP16-LABEL: v4f16_half: 1280; CHECK-SD-NOFP16: // %bb.0: // %entry 1281; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h 1282; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h 1283; CHECK-SD-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1284; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s 1285; CHECK-SD-NOFP16-NEXT: bsl v0.8b, v2.8b, v3.8b 1286; CHECK-SD-NOFP16-NEXT: ret 1287; 1288; CHECK-SD-FP16-LABEL: v4f16_half: 1289; CHECK-SD-FP16: // %bb.0: // %entry 1290; CHECK-SD-FP16-NEXT: fcmgt v0.4h, v1.4h, v0.4h 1291; CHECK-SD-FP16-NEXT: bsl v0.8b, v2.8b, v3.8b 1292; CHECK-SD-FP16-NEXT: ret 1293; 1294; CHECK-GI-NOFP16-LABEL: v4f16_half: 1295; CHECK-GI-NOFP16: // %bb.0: // %entry 1296; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h 1297; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h 1298; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1299; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s 1300; CHECK-GI-NOFP16-NEXT: bsl v0.8b, v2.8b, v3.8b 1301; CHECK-GI-NOFP16-NEXT: ret 1302; 1303; CHECK-GI-FP16-LABEL: v4f16_half: 1304; CHECK-GI-FP16: // %bb.0: // %entry 1305; CHECK-GI-FP16-NEXT: fcmgt v0.4h, v1.4h, v0.4h 1306; CHECK-GI-FP16-NEXT: bsl v0.8b, v2.8b, v3.8b 1307; CHECK-GI-FP16-NEXT: ret 1308entry: 1309 %c = fcmp olt <4 x half> %a, %b 1310 %s = select <4 x i1> %c, <4 x half> %d, <4 x half> %e 1311 ret <4 x half> %s 1312} 1313 1314define <8 x half> @v8f16_half(<8 x half> %a, <8 x half> %b, <8 x half> %d, <8 x half> %e) { 1315; CHECK-SD-NOFP16-LABEL: v8f16_half: 1316; CHECK-SD-NOFP16: // %bb.0: // %entry 1317; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[1] 1318; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[1] 1319; CHECK-SD-NOFP16-NEXT: fcvt s6, h1 1320; CHECK-SD-NOFP16-NEXT: fcvt s7, h0 1321; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2] 1322; CHECK-SD-NOFP16-NEXT: fcvt s4, h4 1323; CHECK-SD-NOFP16-NEXT: fcvt s5, h5 1324; CHECK-SD-NOFP16-NEXT: fcmp s5, s4 1325; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[2] 1326; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[3] 1327; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1328; CHECK-SD-NOFP16-NEXT: fcmp s7, s6 1329; CHECK-SD-NOFP16-NEXT: fcvt s7, h16 1330; CHECK-SD-NOFP16-NEXT: fcvt s4, h4 1331; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[3] 1332; CHECK-SD-NOFP16-NEXT: fcvt s5, h5 1333; CHECK-SD-NOFP16-NEXT: mov h16, v0.h[4] 1334; CHECK-SD-NOFP16-NEXT: csetm w9, mi 1335; CHECK-SD-NOFP16-NEXT: fcmp s4, s7 1336; CHECK-SD-NOFP16-NEXT: fmov s4, w9 1337; CHECK-SD-NOFP16-NEXT: fcvt s6, h6 1338; CHECK-SD-NOFP16-NEXT: mov h7, v1.h[4] 1339; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1340; CHECK-SD-NOFP16-NEXT: mov v4.h[1], w8 1341; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1342; CHECK-SD-NOFP16-NEXT: fcmp s6, s5 1343; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[5] 1344; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[5] 1345; CHECK-SD-NOFP16-NEXT: fcvt s7, h7 1346; CHECK-SD-NOFP16-NEXT: mov v4.h[2], w8 1347; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1348; CHECK-SD-NOFP16-NEXT: fcvt s5, h5 1349; CHECK-SD-NOFP16-NEXT: fcvt s6, h6 1350; CHECK-SD-NOFP16-NEXT: fcmp s16, s7 1351; CHECK-SD-NOFP16-NEXT: mov h7, v1.h[6] 1352; CHECK-SD-NOFP16-NEXT: mov h16, v0.h[6] 1353; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[7] 1354; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7] 1355; CHECK-SD-NOFP16-NEXT: mov v4.h[3], w8 1356; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1357; CHECK-SD-NOFP16-NEXT: fcmp s6, s5 1358; CHECK-SD-NOFP16-NEXT: fcvt s5, h7 1359; CHECK-SD-NOFP16-NEXT: fcvt s6, h16 1360; CHECK-SD-NOFP16-NEXT: fcvt s1, h1 1361; CHECK-SD-NOFP16-NEXT: fcvt s0, h0 1362; CHECK-SD-NOFP16-NEXT: mov v4.h[4], w8 1363; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1364; CHECK-SD-NOFP16-NEXT: fcmp s6, s5 1365; CHECK-SD-NOFP16-NEXT: mov v4.h[5], w8 1366; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1367; CHECK-SD-NOFP16-NEXT: fcmp s0, s1 1368; CHECK-SD-NOFP16-NEXT: mov v4.h[6], w8 1369; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1370; CHECK-SD-NOFP16-NEXT: mov v4.h[7], w8 1371; CHECK-SD-NOFP16-NEXT: mov v0.16b, v4.16b 1372; CHECK-SD-NOFP16-NEXT: bsl v0.16b, v2.16b, v3.16b 1373; CHECK-SD-NOFP16-NEXT: ret 1374; 1375; CHECK-SD-FP16-LABEL: v8f16_half: 1376; CHECK-SD-FP16: // %bb.0: // %entry 1377; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h 1378; CHECK-SD-FP16-NEXT: bsl v0.16b, v2.16b, v3.16b 1379; CHECK-SD-FP16-NEXT: ret 1380; 1381; CHECK-GI-NOFP16-LABEL: v8f16_half: 1382; CHECK-GI-NOFP16: // %bb.0: // %entry 1383; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h 1384; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h 1385; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h 1386; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h 1387; CHECK-GI-NOFP16-NEXT: fcmgt v4.4s, v5.4s, v4.4s 1388; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1389; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v4.8h, v0.8h 1390; CHECK-GI-NOFP16-NEXT: shl v0.8h, v0.8h, #15 1391; CHECK-GI-NOFP16-NEXT: sshr v0.8h, v0.8h, #15 1392; CHECK-GI-NOFP16-NEXT: bsl v0.16b, v2.16b, v3.16b 1393; CHECK-GI-NOFP16-NEXT: ret 1394; 1395; CHECK-GI-FP16-LABEL: v8f16_half: 1396; CHECK-GI-FP16: // %bb.0: // %entry 1397; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h 1398; CHECK-GI-FP16-NEXT: bsl v0.16b, v2.16b, v3.16b 1399; CHECK-GI-FP16-NEXT: ret 1400entry: 1401 %c = fcmp olt <8 x half> %a, %b 1402 %s = select <8 x i1> %c, <8 x half> %d, <8 x half> %e 1403 ret <8 x half> %s 1404} 1405 1406define <16 x half> @v16f16_half(<16 x half> %a, <16 x half> %b, <16 x half> %d, <16 x half> %e) { 1407; CHECK-SD-NOFP16-LABEL: v16f16_half: 1408; CHECK-SD-NOFP16: // %bb.0: // %entry 1409; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[1] 1410; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[1] 1411; CHECK-SD-NOFP16-NEXT: mov h18, v3.h[2] 1412; CHECK-SD-NOFP16-NEXT: mov h19, v1.h[2] 1413; CHECK-SD-NOFP16-NEXT: fcvt s20, h3 1414; CHECK-SD-NOFP16-NEXT: fcvt s21, h1 1415; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1416; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 1417; CHECK-SD-NOFP16-NEXT: fcvt s18, h18 1418; CHECK-SD-NOFP16-NEXT: fcvt s19, h19 1419; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1420; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[3] 1421; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[3] 1422; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1423; CHECK-SD-NOFP16-NEXT: fcmp s21, s20 1424; CHECK-SD-NOFP16-NEXT: mov h20, v3.h[4] 1425; CHECK-SD-NOFP16-NEXT: mov h21, v1.h[4] 1426; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1427; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 1428; CHECK-SD-NOFP16-NEXT: csetm w14, mi 1429; CHECK-SD-NOFP16-NEXT: fcmp s19, s18 1430; CHECK-SD-NOFP16-NEXT: mov h18, v3.h[5] 1431; CHECK-SD-NOFP16-NEXT: mov h19, v1.h[5] 1432; CHECK-SD-NOFP16-NEXT: fcvt s20, h20 1433; CHECK-SD-NOFP16-NEXT: fcvt s21, h21 1434; CHECK-SD-NOFP16-NEXT: csetm w13, mi 1435; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1436; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[6] 1437; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[6] 1438; CHECK-SD-NOFP16-NEXT: fcvt s18, h18 1439; CHECK-SD-NOFP16-NEXT: mov h3, v3.h[7] 1440; CHECK-SD-NOFP16-NEXT: fcvt s19, h19 1441; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[7] 1442; CHECK-SD-NOFP16-NEXT: csetm w11, mi 1443; CHECK-SD-NOFP16-NEXT: fcmp s21, s20 1444; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1445; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 1446; CHECK-SD-NOFP16-NEXT: fcvt s3, h3 1447; CHECK-SD-NOFP16-NEXT: csetm w12, mi 1448; CHECK-SD-NOFP16-NEXT: fcmp s19, s18 1449; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[1] 1450; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[1] 1451; CHECK-SD-NOFP16-NEXT: fcvt s1, h1 1452; CHECK-SD-NOFP16-NEXT: csetm w10, mi 1453; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1454; CHECK-SD-NOFP16-NEXT: fcvt s16, h18 1455; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[2] 1456; CHECK-SD-NOFP16-NEXT: fcvt s17, h19 1457; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[2] 1458; CHECK-SD-NOFP16-NEXT: csetm w9, mi 1459; CHECK-SD-NOFP16-NEXT: fcmp s1, s3 1460; CHECK-SD-NOFP16-NEXT: fcvt s1, h2 1461; CHECK-SD-NOFP16-NEXT: fcvt s3, h0 1462; CHECK-SD-NOFP16-NEXT: fcvt s18, h18 1463; CHECK-SD-NOFP16-NEXT: csetm w15, mi 1464; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1465; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[3] 1466; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[3] 1467; CHECK-SD-NOFP16-NEXT: fcvt s19, h19 1468; CHECK-SD-NOFP16-NEXT: csetm w16, mi 1469; CHECK-SD-NOFP16-NEXT: fcmp s3, s1 1470; CHECK-SD-NOFP16-NEXT: fmov s1, w14 1471; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1472; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 1473; CHECK-SD-NOFP16-NEXT: csetm w14, mi 1474; CHECK-SD-NOFP16-NEXT: fcmp s19, s18 1475; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[4] 1476; CHECK-SD-NOFP16-NEXT: fmov s3, w14 1477; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[4] 1478; CHECK-SD-NOFP16-NEXT: mov v1.h[1], w8 1479; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1480; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1481; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[5] 1482; CHECK-SD-NOFP16-NEXT: mov v3.h[1], w16 1483; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[5] 1484; CHECK-SD-NOFP16-NEXT: fcvt s18, h18 1485; CHECK-SD-NOFP16-NEXT: fcvt s19, h19 1486; CHECK-SD-NOFP16-NEXT: mov v1.h[2], w13 1487; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1488; CHECK-SD-NOFP16-NEXT: mov v3.h[2], w8 1489; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1490; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 1491; CHECK-SD-NOFP16-NEXT: fcmp s19, s18 1492; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[6] 1493; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[6] 1494; CHECK-SD-NOFP16-NEXT: mov v1.h[3], w11 1495; CHECK-SD-NOFP16-NEXT: mov h2, v2.h[7] 1496; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7] 1497; CHECK-SD-NOFP16-NEXT: mov v3.h[3], w8 1498; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1499; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1500; CHECK-SD-NOFP16-NEXT: fcvt s16, h18 1501; CHECK-SD-NOFP16-NEXT: fcvt s17, h19 1502; CHECK-SD-NOFP16-NEXT: mov v1.h[4], w12 1503; CHECK-SD-NOFP16-NEXT: fcvt s2, h2 1504; CHECK-SD-NOFP16-NEXT: fcvt s0, h0 1505; CHECK-SD-NOFP16-NEXT: mov v3.h[4], w8 1506; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1507; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1508; CHECK-SD-NOFP16-NEXT: mov v1.h[5], w10 1509; CHECK-SD-NOFP16-NEXT: mov v3.h[5], w8 1510; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1511; CHECK-SD-NOFP16-NEXT: fcmp s0, s2 1512; CHECK-SD-NOFP16-NEXT: mov v1.h[6], w9 1513; CHECK-SD-NOFP16-NEXT: mov v3.h[6], w8 1514; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1515; CHECK-SD-NOFP16-NEXT: mov v1.h[7], w15 1516; CHECK-SD-NOFP16-NEXT: mov v3.h[7], w8 1517; CHECK-SD-NOFP16-NEXT: bsl v1.16b, v5.16b, v7.16b 1518; CHECK-SD-NOFP16-NEXT: mov v0.16b, v3.16b 1519; CHECK-SD-NOFP16-NEXT: bsl v0.16b, v4.16b, v6.16b 1520; CHECK-SD-NOFP16-NEXT: ret 1521; 1522; CHECK-SD-FP16-LABEL: v16f16_half: 1523; CHECK-SD-FP16: // %bb.0: // %entry 1524; CHECK-SD-FP16-NEXT: fcmgt v1.8h, v3.8h, v1.8h 1525; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v2.8h, v0.8h 1526; CHECK-SD-FP16-NEXT: bsl v1.16b, v5.16b, v7.16b 1527; CHECK-SD-FP16-NEXT: bsl v0.16b, v4.16b, v6.16b 1528; CHECK-SD-FP16-NEXT: ret 1529; 1530; CHECK-GI-NOFP16-LABEL: v16f16_half: 1531; CHECK-GI-NOFP16: // %bb.0: // %entry 1532; CHECK-GI-NOFP16-NEXT: fcvtl v16.4s, v0.4h 1533; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h 1534; CHECK-GI-NOFP16-NEXT: fcvtl v17.4s, v1.4h 1535; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h 1536; CHECK-GI-NOFP16-NEXT: fcvtl v18.4s, v2.4h 1537; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h 1538; CHECK-GI-NOFP16-NEXT: fcvtl v19.4s, v3.4h 1539; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h 1540; CHECK-GI-NOFP16-NEXT: fcmgt v16.4s, v18.4s, v16.4s 1541; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v2.4s, v0.4s 1542; CHECK-GI-NOFP16-NEXT: fcmgt v2.4s, v19.4s, v17.4s 1543; CHECK-GI-NOFP16-NEXT: fcmgt v1.4s, v3.4s, v1.4s 1544; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v16.8h, v0.8h 1545; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v2.8h, v1.8h 1546; CHECK-GI-NOFP16-NEXT: shl v0.8h, v0.8h, #15 1547; CHECK-GI-NOFP16-NEXT: shl v1.8h, v1.8h, #15 1548; CHECK-GI-NOFP16-NEXT: sshr v0.8h, v0.8h, #15 1549; CHECK-GI-NOFP16-NEXT: sshr v1.8h, v1.8h, #15 1550; CHECK-GI-NOFP16-NEXT: bsl v0.16b, v4.16b, v6.16b 1551; CHECK-GI-NOFP16-NEXT: bsl v1.16b, v5.16b, v7.16b 1552; CHECK-GI-NOFP16-NEXT: ret 1553; 1554; CHECK-GI-FP16-LABEL: v16f16_half: 1555; CHECK-GI-FP16: // %bb.0: // %entry 1556; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v2.8h, v0.8h 1557; CHECK-GI-FP16-NEXT: fcmgt v1.8h, v3.8h, v1.8h 1558; CHECK-GI-FP16-NEXT: bsl v0.16b, v4.16b, v6.16b 1559; CHECK-GI-FP16-NEXT: bsl v1.16b, v5.16b, v7.16b 1560; CHECK-GI-FP16-NEXT: ret 1561entry: 1562 %c = fcmp olt <16 x half> %a, %b 1563 %s = select <16 x i1> %c, <16 x half> %d, <16 x half> %e 1564 ret <16 x half> %s 1565} 1566 1567define <7 x i32> @v7f16_i32(<7 x half> %a, <7 x half> %b, <7 x i32> %d, <7 x i32> %e) { 1568; CHECK-SD-NOFP16-LABEL: v7f16_i32: 1569; CHECK-SD-NOFP16: // %bb.0: // %entry 1570; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[1] 1571; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[1] 1572; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[2] 1573; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[2] 1574; CHECK-SD-NOFP16-NEXT: fcvt s6, h1 1575; CHECK-SD-NOFP16-NEXT: fcvt s7, h0 1576; CHECK-SD-NOFP16-NEXT: fcvt s2, h2 1577; CHECK-SD-NOFP16-NEXT: fcvt s3, h3 1578; CHECK-SD-NOFP16-NEXT: fcvt s4, h4 1579; CHECK-SD-NOFP16-NEXT: fcvt s5, h5 1580; CHECK-SD-NOFP16-NEXT: fcmp s3, s2 1581; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[3] 1582; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[3] 1583; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1584; CHECK-SD-NOFP16-NEXT: fcmp s7, s6 1585; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[5] 1586; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[5] 1587; CHECK-SD-NOFP16-NEXT: fcvt s2, h2 1588; CHECK-SD-NOFP16-NEXT: fcvt s3, h3 1589; CHECK-SD-NOFP16-NEXT: csetm w9, mi 1590; CHECK-SD-NOFP16-NEXT: fcmp s5, s4 1591; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[4] 1592; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[4] 1593; CHECK-SD-NOFP16-NEXT: fcvt s6, h6 1594; CHECK-SD-NOFP16-NEXT: fcvt s7, h7 1595; CHECK-SD-NOFP16-NEXT: csetm w10, mi 1596; CHECK-SD-NOFP16-NEXT: fcmp s3, s2 1597; CHECK-SD-NOFP16-NEXT: fcvt s2, h4 1598; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[6] 1599; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[7] 1600; CHECK-SD-NOFP16-NEXT: fcvt s3, h5 1601; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[6] 1602; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7] 1603; CHECK-SD-NOFP16-NEXT: csetm w11, mi 1604; CHECK-SD-NOFP16-NEXT: fcmp s7, s6 1605; CHECK-SD-NOFP16-NEXT: fcvt s1, h1 1606; CHECK-SD-NOFP16-NEXT: csetm w12, mi 1607; CHECK-SD-NOFP16-NEXT: fcmp s3, s2 1608; CHECK-SD-NOFP16-NEXT: fcvt s2, h4 1609; CHECK-SD-NOFP16-NEXT: fcvt s3, h5 1610; CHECK-SD-NOFP16-NEXT: fmov s4, w9 1611; CHECK-SD-NOFP16-NEXT: fcvt s0, h0 1612; CHECK-SD-NOFP16-NEXT: add x9, sp, #8 1613; CHECK-SD-NOFP16-NEXT: csetm w13, mi 1614; CHECK-SD-NOFP16-NEXT: fmov s5, w13 1615; CHECK-SD-NOFP16-NEXT: mov v4.h[1], w8 1616; CHECK-SD-NOFP16-NEXT: mov x8, sp 1617; CHECK-SD-NOFP16-NEXT: fcmp s3, s2 1618; CHECK-SD-NOFP16-NEXT: fmov s2, w7 1619; CHECK-SD-NOFP16-NEXT: fmov s3, w0 1620; CHECK-SD-NOFP16-NEXT: mov v5.h[1], w12 1621; CHECK-SD-NOFP16-NEXT: ld1 { v2.s }[1], [x8] 1622; CHECK-SD-NOFP16-NEXT: mov v3.s[1], w1 1623; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1624; CHECK-SD-NOFP16-NEXT: mov v4.h[2], w10 1625; CHECK-SD-NOFP16-NEXT: fcmp s0, s1 1626; CHECK-SD-NOFP16-NEXT: fmov s1, w4 1627; CHECK-SD-NOFP16-NEXT: ldr s0, [sp, #24] 1628; CHECK-SD-NOFP16-NEXT: mov v5.h[2], w8 1629; CHECK-SD-NOFP16-NEXT: ld1 { v2.s }[2], [x9] 1630; CHECK-SD-NOFP16-NEXT: add x9, sp, #32 1631; CHECK-SD-NOFP16-NEXT: mov v3.s[2], w2 1632; CHECK-SD-NOFP16-NEXT: mov v1.s[1], w5 1633; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1634; CHECK-SD-NOFP16-NEXT: mov v4.h[3], w11 1635; CHECK-SD-NOFP16-NEXT: ld1 { v0.s }[1], [x9] 1636; CHECK-SD-NOFP16-NEXT: mov v5.h[3], w8 1637; CHECK-SD-NOFP16-NEXT: add x8, sp, #16 1638; CHECK-SD-NOFP16-NEXT: ld1 { v2.s }[3], [x8] 1639; CHECK-SD-NOFP16-NEXT: mov v3.s[3], w3 1640; CHECK-SD-NOFP16-NEXT: add x8, sp, #40 1641; CHECK-SD-NOFP16-NEXT: mov v1.s[2], w6 1642; CHECK-SD-NOFP16-NEXT: sshll v4.4s, v4.4h, #0 1643; CHECK-SD-NOFP16-NEXT: ld1 { v0.s }[2], [x8] 1644; CHECK-SD-NOFP16-NEXT: sshll v5.4s, v5.4h, #0 1645; CHECK-SD-NOFP16-NEXT: bit v2.16b, v3.16b, v4.16b 1646; CHECK-SD-NOFP16-NEXT: bit v0.16b, v1.16b, v5.16b 1647; CHECK-SD-NOFP16-NEXT: mov w1, v2.s[1] 1648; CHECK-SD-NOFP16-NEXT: mov w2, v2.s[2] 1649; CHECK-SD-NOFP16-NEXT: mov w3, v2.s[3] 1650; CHECK-SD-NOFP16-NEXT: fmov w0, s2 1651; CHECK-SD-NOFP16-NEXT: mov w5, v0.s[1] 1652; CHECK-SD-NOFP16-NEXT: mov w6, v0.s[2] 1653; CHECK-SD-NOFP16-NEXT: fmov w4, s0 1654; CHECK-SD-NOFP16-NEXT: ret 1655; 1656; CHECK-SD-FP16-LABEL: v7f16_i32: 1657; CHECK-SD-FP16: // %bb.0: // %entry 1658; CHECK-SD-FP16-NEXT: fmov s2, w0 1659; CHECK-SD-FP16-NEXT: fmov s3, w7 1660; CHECK-SD-FP16-NEXT: mov x8, sp 1661; CHECK-SD-FP16-NEXT: fmov s5, w4 1662; CHECK-SD-FP16-NEXT: ldr s4, [sp, #24] 1663; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h 1664; CHECK-SD-FP16-NEXT: add x9, sp, #32 1665; CHECK-SD-FP16-NEXT: mov v2.s[1], w1 1666; CHECK-SD-FP16-NEXT: ld1 { v3.s }[1], [x8] 1667; CHECK-SD-FP16-NEXT: add x8, sp, #8 1668; CHECK-SD-FP16-NEXT: mov v5.s[1], w5 1669; CHECK-SD-FP16-NEXT: ld1 { v4.s }[1], [x9] 1670; CHECK-SD-FP16-NEXT: add x9, sp, #16 1671; CHECK-SD-FP16-NEXT: sshll v1.4s, v0.4h, #0 1672; CHECK-SD-FP16-NEXT: sshll2 v0.4s, v0.8h, #0 1673; CHECK-SD-FP16-NEXT: ld1 { v3.s }[2], [x8] 1674; CHECK-SD-FP16-NEXT: add x8, sp, #40 1675; CHECK-SD-FP16-NEXT: mov v2.s[2], w2 1676; CHECK-SD-FP16-NEXT: ld1 { v4.s }[2], [x8] 1677; CHECK-SD-FP16-NEXT: mov v5.s[2], w6 1678; CHECK-SD-FP16-NEXT: ld1 { v3.s }[3], [x9] 1679; CHECK-SD-FP16-NEXT: mov v2.s[3], w3 1680; CHECK-SD-FP16-NEXT: bsl v0.16b, v5.16b, v4.16b 1681; CHECK-SD-FP16-NEXT: bsl v1.16b, v2.16b, v3.16b 1682; CHECK-SD-FP16-NEXT: mov w5, v0.s[1] 1683; CHECK-SD-FP16-NEXT: mov w6, v0.s[2] 1684; CHECK-SD-FP16-NEXT: fmov w4, s0 1685; CHECK-SD-FP16-NEXT: mov w1, v1.s[1] 1686; CHECK-SD-FP16-NEXT: mov w2, v1.s[2] 1687; CHECK-SD-FP16-NEXT: mov w3, v1.s[3] 1688; CHECK-SD-FP16-NEXT: fmov w0, s1 1689; CHECK-SD-FP16-NEXT: ret 1690; 1691; CHECK-GI-NOFP16-LABEL: v7f16_i32: 1692; CHECK-GI-NOFP16: // %bb.0: // %entry 1693; CHECK-GI-NOFP16-NEXT: mov v2.h[0], v0.h[4] 1694; CHECK-GI-NOFP16-NEXT: mov v3.h[0], v1.h[4] 1695; CHECK-GI-NOFP16-NEXT: mov w8, #31 // =0x1f 1696; CHECK-GI-NOFP16-NEXT: mov v4.s[0], w8 1697; CHECK-GI-NOFP16-NEXT: mov w9, #-1 // =0xffffffff 1698; CHECK-GI-NOFP16-NEXT: mov v5.s[0], w0 1699; CHECK-GI-NOFP16-NEXT: mov v6.s[0], w9 1700; CHECK-GI-NOFP16-NEXT: mov v7.s[0], w7 1701; CHECK-GI-NOFP16-NEXT: ldr s16, [sp] 1702; CHECK-GI-NOFP16-NEXT: ldr s17, [sp, #24] 1703; CHECK-GI-NOFP16-NEXT: ldr s18, [sp, #32] 1704; CHECK-GI-NOFP16-NEXT: mov v2.h[1], v0.h[5] 1705; CHECK-GI-NOFP16-NEXT: mov v3.h[1], v1.h[5] 1706; CHECK-GI-NOFP16-NEXT: mov v4.s[1], w8 1707; CHECK-GI-NOFP16-NEXT: mov v5.s[1], w1 1708; CHECK-GI-NOFP16-NEXT: mov v17.s[1], v18.s[0] 1709; CHECK-GI-NOFP16-NEXT: mov v6.s[1], w9 1710; CHECK-GI-NOFP16-NEXT: mov v7.s[1], v16.s[0] 1711; CHECK-GI-NOFP16-NEXT: ldr s16, [sp, #8] 1712; CHECK-GI-NOFP16-NEXT: mov v2.h[2], v0.h[6] 1713; CHECK-GI-NOFP16-NEXT: mov v3.h[2], v1.h[6] 1714; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h 1715; CHECK-GI-NOFP16-NEXT: mov v4.s[2], w8 1716; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h 1717; CHECK-GI-NOFP16-NEXT: mov v5.s[2], w2 1718; CHECK-GI-NOFP16-NEXT: mov v6.s[2], w9 1719; CHECK-GI-NOFP16-NEXT: mov v7.s[2], v16.s[0] 1720; CHECK-GI-NOFP16-NEXT: ldr s16, [sp, #40] 1721; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v2.4h 1722; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v3.4h 1723; CHECK-GI-NOFP16-NEXT: mov v17.s[2], v16.s[0] 1724; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1725; CHECK-GI-NOFP16-NEXT: mov v5.s[3], w3 1726; CHECK-GI-NOFP16-NEXT: fcmgt v2.4s, v3.4s, v2.4s 1727; CHECK-GI-NOFP16-NEXT: mov v3.s[0], w4 1728; CHECK-GI-NOFP16-NEXT: ushl v2.4s, v2.4s, v4.4s 1729; CHECK-GI-NOFP16-NEXT: neg v4.4s, v4.4s 1730; CHECK-GI-NOFP16-NEXT: mov v3.s[1], w5 1731; CHECK-GI-NOFP16-NEXT: sshl v2.4s, v2.4s, v4.4s 1732; CHECK-GI-NOFP16-NEXT: ldr s4, [sp, #16] 1733; CHECK-GI-NOFP16-NEXT: mov v3.s[2], w6 1734; CHECK-GI-NOFP16-NEXT: mov v7.s[3], v4.s[0] 1735; CHECK-GI-NOFP16-NEXT: eor v1.16b, v2.16b, v6.16b 1736; CHECK-GI-NOFP16-NEXT: and v2.16b, v3.16b, v2.16b 1737; CHECK-GI-NOFP16-NEXT: and v1.16b, v17.16b, v1.16b 1738; CHECK-GI-NOFP16-NEXT: bsl v0.16b, v5.16b, v7.16b 1739; CHECK-GI-NOFP16-NEXT: orr v1.16b, v2.16b, v1.16b 1740; CHECK-GI-NOFP16-NEXT: mov s2, v0.s[1] 1741; CHECK-GI-NOFP16-NEXT: mov s3, v0.s[2] 1742; CHECK-GI-NOFP16-NEXT: mov s4, v0.s[3] 1743; CHECK-GI-NOFP16-NEXT: fmov w0, s0 1744; CHECK-GI-NOFP16-NEXT: mov s5, v1.s[1] 1745; CHECK-GI-NOFP16-NEXT: mov s6, v1.s[2] 1746; CHECK-GI-NOFP16-NEXT: fmov w4, s1 1747; CHECK-GI-NOFP16-NEXT: fmov w1, s2 1748; CHECK-GI-NOFP16-NEXT: fmov w2, s3 1749; CHECK-GI-NOFP16-NEXT: fmov w3, s4 1750; CHECK-GI-NOFP16-NEXT: fmov w5, s5 1751; CHECK-GI-NOFP16-NEXT: fmov w6, s6 1752; CHECK-GI-NOFP16-NEXT: ret 1753; 1754; CHECK-GI-FP16-LABEL: v7f16_i32: 1755; CHECK-GI-FP16: // %bb.0: // %entry 1756; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h 1757; CHECK-GI-FP16-NEXT: mov w9, #31 // =0x1f 1758; CHECK-GI-FP16-NEXT: mov v4.s[0], w0 1759; CHECK-GI-FP16-NEXT: mov v2.s[0], w9 1760; CHECK-GI-FP16-NEXT: mov v5.s[0], w7 1761; CHECK-GI-FP16-NEXT: ldr s6, [sp] 1762; CHECK-GI-FP16-NEXT: mov v7.s[0], w4 1763; CHECK-GI-FP16-NEXT: ldr s16, [sp, #32] 1764; CHECK-GI-FP16-NEXT: ldr s17, [sp, #8] 1765; CHECK-GI-FP16-NEXT: umov w8, v0.h[4] 1766; CHECK-GI-FP16-NEXT: umov w10, v0.h[5] 1767; CHECK-GI-FP16-NEXT: mov v4.s[1], w1 1768; CHECK-GI-FP16-NEXT: mov v2.s[1], w9 1769; CHECK-GI-FP16-NEXT: mov v5.s[1], v6.s[0] 1770; CHECK-GI-FP16-NEXT: ldr s6, [sp, #24] 1771; CHECK-GI-FP16-NEXT: mov v7.s[1], w5 1772; CHECK-GI-FP16-NEXT: mov v6.s[1], v16.s[0] 1773; CHECK-GI-FP16-NEXT: ldr s16, [sp, #40] 1774; CHECK-GI-FP16-NEXT: mov v1.s[0], w8 1775; CHECK-GI-FP16-NEXT: umov w8, v0.h[6] 1776; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0 1777; CHECK-GI-FP16-NEXT: mov v2.s[2], w9 1778; CHECK-GI-FP16-NEXT: mov v4.s[2], w2 1779; CHECK-GI-FP16-NEXT: mov v5.s[2], v17.s[0] 1780; CHECK-GI-FP16-NEXT: mov v7.s[2], w6 1781; CHECK-GI-FP16-NEXT: shl v0.4s, v0.4s, #31 1782; CHECK-GI-FP16-NEXT: mov v6.s[2], v16.s[0] 1783; CHECK-GI-FP16-NEXT: mov v1.s[1], w10 1784; CHECK-GI-FP16-NEXT: mov w10, #-1 // =0xffffffff 1785; CHECK-GI-FP16-NEXT: mov v3.s[0], w10 1786; CHECK-GI-FP16-NEXT: mov v4.s[3], w3 1787; CHECK-GI-FP16-NEXT: sshr v0.4s, v0.4s, #31 1788; CHECK-GI-FP16-NEXT: mov v1.s[2], w8 1789; CHECK-GI-FP16-NEXT: mov v3.s[1], w10 1790; CHECK-GI-FP16-NEXT: ushl v1.4s, v1.4s, v2.4s 1791; CHECK-GI-FP16-NEXT: neg v2.4s, v2.4s 1792; CHECK-GI-FP16-NEXT: mov v3.s[2], w10 1793; CHECK-GI-FP16-NEXT: sshl v1.4s, v1.4s, v2.4s 1794; CHECK-GI-FP16-NEXT: ldr s2, [sp, #16] 1795; CHECK-GI-FP16-NEXT: mov v5.s[3], v2.s[0] 1796; CHECK-GI-FP16-NEXT: eor v3.16b, v1.16b, v3.16b 1797; CHECK-GI-FP16-NEXT: and v1.16b, v7.16b, v1.16b 1798; CHECK-GI-FP16-NEXT: and v2.16b, v6.16b, v3.16b 1799; CHECK-GI-FP16-NEXT: bsl v0.16b, v4.16b, v5.16b 1800; CHECK-GI-FP16-NEXT: orr v1.16b, v1.16b, v2.16b 1801; CHECK-GI-FP16-NEXT: mov s2, v0.s[1] 1802; CHECK-GI-FP16-NEXT: mov s3, v0.s[2] 1803; CHECK-GI-FP16-NEXT: mov s4, v0.s[3] 1804; CHECK-GI-FP16-NEXT: fmov w0, s0 1805; CHECK-GI-FP16-NEXT: mov s5, v1.s[1] 1806; CHECK-GI-FP16-NEXT: mov s6, v1.s[2] 1807; CHECK-GI-FP16-NEXT: fmov w4, s1 1808; CHECK-GI-FP16-NEXT: fmov w1, s2 1809; CHECK-GI-FP16-NEXT: fmov w2, s3 1810; CHECK-GI-FP16-NEXT: fmov w3, s4 1811; CHECK-GI-FP16-NEXT: fmov w5, s5 1812; CHECK-GI-FP16-NEXT: fmov w6, s6 1813; CHECK-GI-FP16-NEXT: ret 1814entry: 1815 %c = fcmp olt <7 x half> %a, %b 1816 %s = select <7 x i1> %c, <7 x i32> %d, <7 x i32> %e 1817 ret <7 x i32> %s 1818} 1819 1820define <4 x i32> @v4f16_i32(<4 x half> %a, <4 x half> %b, <4 x i32> %d, <4 x i32> %e) { 1821; CHECK-SD-NOFP16-LABEL: v4f16_i32: 1822; CHECK-SD-NOFP16: // %bb.0: // %entry 1823; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h 1824; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h 1825; CHECK-SD-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1826; CHECK-SD-NOFP16-NEXT: bsl v0.16b, v2.16b, v3.16b 1827; CHECK-SD-NOFP16-NEXT: ret 1828; 1829; CHECK-SD-FP16-LABEL: v4f16_i32: 1830; CHECK-SD-FP16: // %bb.0: // %entry 1831; CHECK-SD-FP16-NEXT: fcmgt v0.4h, v1.4h, v0.4h 1832; CHECK-SD-FP16-NEXT: sshll v0.4s, v0.4h, #0 1833; CHECK-SD-FP16-NEXT: bsl v0.16b, v2.16b, v3.16b 1834; CHECK-SD-FP16-NEXT: ret 1835; 1836; CHECK-GI-NOFP16-LABEL: v4f16_i32: 1837; CHECK-GI-NOFP16: // %bb.0: // %entry 1838; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h 1839; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h 1840; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s 1841; CHECK-GI-NOFP16-NEXT: bsl v0.16b, v2.16b, v3.16b 1842; CHECK-GI-NOFP16-NEXT: ret 1843; 1844; CHECK-GI-FP16-LABEL: v4f16_i32: 1845; CHECK-GI-FP16: // %bb.0: // %entry 1846; CHECK-GI-FP16-NEXT: fcmgt v0.4h, v1.4h, v0.4h 1847; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0 1848; CHECK-GI-FP16-NEXT: shl v0.4s, v0.4s, #31 1849; CHECK-GI-FP16-NEXT: sshr v0.4s, v0.4s, #31 1850; CHECK-GI-FP16-NEXT: bsl v0.16b, v2.16b, v3.16b 1851; CHECK-GI-FP16-NEXT: ret 1852entry: 1853 %c = fcmp olt <4 x half> %a, %b 1854 %s = select <4 x i1> %c, <4 x i32> %d, <4 x i32> %e 1855 ret <4 x i32> %s 1856} 1857 1858define <8 x i32> @v8f16_i32(<8 x half> %a, <8 x half> %b, <8 x i32> %d, <8 x i32> %e) { 1859; CHECK-SD-NOFP16-LABEL: v8f16_i32: 1860; CHECK-SD-NOFP16: // %bb.0: // %entry 1861; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[5] 1862; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[5] 1863; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[4] 1864; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[4] 1865; CHECK-SD-NOFP16-NEXT: mov h18, v1.h[6] 1866; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[6] 1867; CHECK-SD-NOFP16-NEXT: fcvt s6, h6 1868; CHECK-SD-NOFP16-NEXT: fcvt s7, h7 1869; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1870; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 1871; CHECK-SD-NOFP16-NEXT: fcvt s18, h18 1872; CHECK-SD-NOFP16-NEXT: fcvt s19, h19 1873; CHECK-SD-NOFP16-NEXT: fcmp s7, s6 1874; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[7] 1875; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[7] 1876; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1877; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1878; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[1] 1879; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[1] 1880; CHECK-SD-NOFP16-NEXT: fcvt s6, h6 1881; CHECK-SD-NOFP16-NEXT: fcvt s7, h7 1882; CHECK-SD-NOFP16-NEXT: csetm w9, mi 1883; CHECK-SD-NOFP16-NEXT: fcmp s19, s18 1884; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1885; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 1886; CHECK-SD-NOFP16-NEXT: csetm w10, mi 1887; CHECK-SD-NOFP16-NEXT: fcmp s7, s6 1888; CHECK-SD-NOFP16-NEXT: fcvt s6, h1 1889; CHECK-SD-NOFP16-NEXT: fcvt s7, h0 1890; CHECK-SD-NOFP16-NEXT: csetm w11, mi 1891; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1892; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2] 1893; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[2] 1894; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[3] 1895; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3] 1896; CHECK-SD-NOFP16-NEXT: csetm w12, mi 1897; CHECK-SD-NOFP16-NEXT: fcmp s7, s6 1898; CHECK-SD-NOFP16-NEXT: fcvt s6, h16 1899; CHECK-SD-NOFP16-NEXT: fmov s16, w9 1900; CHECK-SD-NOFP16-NEXT: fcvt s7, h17 1901; CHECK-SD-NOFP16-NEXT: fcvt s1, h1 1902; CHECK-SD-NOFP16-NEXT: fcvt s0, h0 1903; CHECK-SD-NOFP16-NEXT: csetm w13, mi 1904; CHECK-SD-NOFP16-NEXT: fmov s17, w13 1905; CHECK-SD-NOFP16-NEXT: mov v16.h[1], w8 1906; CHECK-SD-NOFP16-NEXT: fcmp s7, s6 1907; CHECK-SD-NOFP16-NEXT: mov v17.h[1], w12 1908; CHECK-SD-NOFP16-NEXT: mov v16.h[2], w10 1909; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1910; CHECK-SD-NOFP16-NEXT: fcmp s0, s1 1911; CHECK-SD-NOFP16-NEXT: mov v17.h[2], w8 1912; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1913; CHECK-SD-NOFP16-NEXT: mov v16.h[3], w11 1914; CHECK-SD-NOFP16-NEXT: mov v17.h[3], w8 1915; CHECK-SD-NOFP16-NEXT: sshll v1.4s, v16.4h, #0 1916; CHECK-SD-NOFP16-NEXT: sshll v0.4s, v17.4h, #0 1917; CHECK-SD-NOFP16-NEXT: bsl v1.16b, v3.16b, v5.16b 1918; CHECK-SD-NOFP16-NEXT: bsl v0.16b, v2.16b, v4.16b 1919; CHECK-SD-NOFP16-NEXT: ret 1920; 1921; CHECK-SD-FP16-LABEL: v8f16_i32: 1922; CHECK-SD-FP16: // %bb.0: // %entry 1923; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h 1924; CHECK-SD-FP16-NEXT: sshll v6.4s, v0.4h, #0 1925; CHECK-SD-FP16-NEXT: sshll2 v0.4s, v0.8h, #0 1926; CHECK-SD-FP16-NEXT: mov v1.16b, v0.16b 1927; CHECK-SD-FP16-NEXT: mov v0.16b, v6.16b 1928; CHECK-SD-FP16-NEXT: bsl v1.16b, v3.16b, v5.16b 1929; CHECK-SD-FP16-NEXT: bsl v0.16b, v2.16b, v4.16b 1930; CHECK-SD-FP16-NEXT: ret 1931; 1932; CHECK-GI-NOFP16-LABEL: v8f16_i32: 1933; CHECK-GI-NOFP16: // %bb.0: // %entry 1934; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v0.4h 1935; CHECK-GI-NOFP16-NEXT: fcvtl v7.4s, v1.4h 1936; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h 1937; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h 1938; CHECK-GI-NOFP16-NEXT: fcmgt v6.4s, v7.4s, v6.4s 1939; CHECK-GI-NOFP16-NEXT: fcmgt v1.4s, v1.4s, v0.4s 1940; CHECK-GI-NOFP16-NEXT: mov v0.16b, v6.16b 1941; CHECK-GI-NOFP16-NEXT: bsl v1.16b, v3.16b, v5.16b 1942; CHECK-GI-NOFP16-NEXT: bsl v0.16b, v2.16b, v4.16b 1943; CHECK-GI-NOFP16-NEXT: ret 1944; 1945; CHECK-GI-FP16-LABEL: v8f16_i32: 1946; CHECK-GI-FP16: // %bb.0: // %entry 1947; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h 1948; CHECK-GI-FP16-NEXT: ushll v1.4s, v0.4h, #0 1949; CHECK-GI-FP16-NEXT: ushll2 v0.4s, v0.8h, #0 1950; CHECK-GI-FP16-NEXT: shl v1.4s, v1.4s, #31 1951; CHECK-GI-FP16-NEXT: shl v0.4s, v0.4s, #31 1952; CHECK-GI-FP16-NEXT: sshr v1.4s, v1.4s, #31 1953; CHECK-GI-FP16-NEXT: sshr v6.4s, v0.4s, #31 1954; CHECK-GI-FP16-NEXT: mov v0.16b, v1.16b 1955; CHECK-GI-FP16-NEXT: mov v1.16b, v6.16b 1956; CHECK-GI-FP16-NEXT: bsl v0.16b, v2.16b, v4.16b 1957; CHECK-GI-FP16-NEXT: bsl v1.16b, v3.16b, v5.16b 1958; CHECK-GI-FP16-NEXT: ret 1959entry: 1960 %c = fcmp olt <8 x half> %a, %b 1961 %s = select <8 x i1> %c, <8 x i32> %d, <8 x i32> %e 1962 ret <8 x i32> %s 1963} 1964 1965define <16 x i32> @v16f16_i32(<16 x half> %a, <16 x half> %b, <16 x i32> %d, <16 x i32> %e) { 1966; CHECK-SD-NOFP16-LABEL: v16f16_i32: 1967; CHECK-SD-NOFP16: // %bb.0: // %entry 1968; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[5] 1969; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[5] 1970; CHECK-SD-NOFP16-NEXT: mov h18, v3.h[4] 1971; CHECK-SD-NOFP16-NEXT: mov h19, v1.h[4] 1972; CHECK-SD-NOFP16-NEXT: mov h20, v3.h[6] 1973; CHECK-SD-NOFP16-NEXT: mov h21, v1.h[6] 1974; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1975; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 1976; CHECK-SD-NOFP16-NEXT: fcvt s18, h18 1977; CHECK-SD-NOFP16-NEXT: fcvt s19, h19 1978; CHECK-SD-NOFP16-NEXT: fcvt s20, h20 1979; CHECK-SD-NOFP16-NEXT: fcvt s21, h21 1980; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1981; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[7] 1982; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[7] 1983; CHECK-SD-NOFP16-NEXT: csetm w8, mi 1984; CHECK-SD-NOFP16-NEXT: fcmp s19, s18 1985; CHECK-SD-NOFP16-NEXT: mov h18, v3.h[1] 1986; CHECK-SD-NOFP16-NEXT: mov h19, v1.h[1] 1987; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 1988; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 1989; CHECK-SD-NOFP16-NEXT: csetm w10, mi 1990; CHECK-SD-NOFP16-NEXT: fcmp s21, s20 1991; CHECK-SD-NOFP16-NEXT: fcvt s20, h3 1992; CHECK-SD-NOFP16-NEXT: fcvt s18, h18 1993; CHECK-SD-NOFP16-NEXT: fcvt s21, h1 1994; CHECK-SD-NOFP16-NEXT: fcvt s19, h19 1995; CHECK-SD-NOFP16-NEXT: csetm w9, mi 1996; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 1997; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[2] 1998; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[2] 1999; CHECK-SD-NOFP16-NEXT: mov h3, v3.h[3] 2000; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[3] 2001; CHECK-SD-NOFP16-NEXT: csetm w11, mi 2002; CHECK-SD-NOFP16-NEXT: fcmp s19, s18 2003; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[5] 2004; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 2005; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[5] 2006; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 2007; CHECK-SD-NOFP16-NEXT: fcvt s3, h3 2008; CHECK-SD-NOFP16-NEXT: fcvt s1, h1 2009; CHECK-SD-NOFP16-NEXT: csetm w12, mi 2010; CHECK-SD-NOFP16-NEXT: fcmp s21, s20 2011; CHECK-SD-NOFP16-NEXT: fcvt s18, h18 2012; CHECK-SD-NOFP16-NEXT: fcvt s19, h19 2013; CHECK-SD-NOFP16-NEXT: csetm w14, mi 2014; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 2015; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[4] 2016; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[4] 2017; CHECK-SD-NOFP16-NEXT: csetm w13, mi 2018; CHECK-SD-NOFP16-NEXT: fcmp s1, s3 2019; CHECK-SD-NOFP16-NEXT: mov h1, v2.h[6] 2020; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[6] 2021; CHECK-SD-NOFP16-NEXT: fcvt s16, h16 2022; CHECK-SD-NOFP16-NEXT: fcvt s17, h17 2023; CHECK-SD-NOFP16-NEXT: csetm w15, mi 2024; CHECK-SD-NOFP16-NEXT: fcmp s19, s18 2025; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[7] 2026; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[7] 2027; CHECK-SD-NOFP16-NEXT: fcvt s1, h1 2028; CHECK-SD-NOFP16-NEXT: fcvt s3, h3 2029; CHECK-SD-NOFP16-NEXT: csetm w16, mi 2030; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 2031; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[1] 2032; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[1] 2033; CHECK-SD-NOFP16-NEXT: fcvt s18, h18 2034; CHECK-SD-NOFP16-NEXT: fcvt s19, h19 2035; CHECK-SD-NOFP16-NEXT: csetm w17, mi 2036; CHECK-SD-NOFP16-NEXT: fcmp s3, s1 2037; CHECK-SD-NOFP16-NEXT: fcvt s1, h16 2038; CHECK-SD-NOFP16-NEXT: fcvt s16, h2 2039; CHECK-SD-NOFP16-NEXT: fcvt s3, h17 2040; CHECK-SD-NOFP16-NEXT: fcvt s17, h0 2041; CHECK-SD-NOFP16-NEXT: csetm w18, mi 2042; CHECK-SD-NOFP16-NEXT: fcmp s19, s18 2043; CHECK-SD-NOFP16-NEXT: fmov s18, w14 2044; CHECK-SD-NOFP16-NEXT: fmov s19, w17 2045; CHECK-SD-NOFP16-NEXT: csetm w0, mi 2046; CHECK-SD-NOFP16-NEXT: fcmp s3, s1 2047; CHECK-SD-NOFP16-NEXT: mov h1, v2.h[2] 2048; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[2] 2049; CHECK-SD-NOFP16-NEXT: mov h2, v2.h[3] 2050; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3] 2051; CHECK-SD-NOFP16-NEXT: mov v18.h[1], w12 2052; CHECK-SD-NOFP16-NEXT: mov v19.h[1], w16 2053; CHECK-SD-NOFP16-NEXT: csetm w1, mi 2054; CHECK-SD-NOFP16-NEXT: fcmp s17, s16 2055; CHECK-SD-NOFP16-NEXT: fmov s16, w10 2056; CHECK-SD-NOFP16-NEXT: fcvt s1, h1 2057; CHECK-SD-NOFP16-NEXT: fcvt s3, h3 2058; CHECK-SD-NOFP16-NEXT: fcvt s2, h2 2059; CHECK-SD-NOFP16-NEXT: fcvt s0, h0 2060; CHECK-SD-NOFP16-NEXT: csetm w2, mi 2061; CHECK-SD-NOFP16-NEXT: mov v16.h[1], w8 2062; CHECK-SD-NOFP16-NEXT: mov v18.h[2], w13 2063; CHECK-SD-NOFP16-NEXT: fmov s17, w2 2064; CHECK-SD-NOFP16-NEXT: mov v19.h[2], w18 2065; CHECK-SD-NOFP16-NEXT: fcmp s3, s1 2066; CHECK-SD-NOFP16-NEXT: mov v17.h[1], w1 2067; CHECK-SD-NOFP16-NEXT: mov v16.h[2], w9 2068; CHECK-SD-NOFP16-NEXT: mov v18.h[3], w15 2069; CHECK-SD-NOFP16-NEXT: mov v19.h[3], w0 2070; CHECK-SD-NOFP16-NEXT: csetm w8, mi 2071; CHECK-SD-NOFP16-NEXT: fcmp s0, s2 2072; CHECK-SD-NOFP16-NEXT: mov v17.h[2], w8 2073; CHECK-SD-NOFP16-NEXT: mov v16.h[3], w11 2074; CHECK-SD-NOFP16-NEXT: csetm w8, mi 2075; CHECK-SD-NOFP16-NEXT: mov v17.h[3], w8 2076; CHECK-SD-NOFP16-NEXT: sshll v2.4s, v16.4h, #0 2077; CHECK-SD-NOFP16-NEXT: sshll v16.4s, v18.4h, #0 2078; CHECK-SD-NOFP16-NEXT: ldp q0, q18, [sp] 2079; CHECK-SD-NOFP16-NEXT: sshll v1.4s, v17.4h, #0 2080; CHECK-SD-NOFP16-NEXT: sshll v17.4s, v19.4h, #0 2081; CHECK-SD-NOFP16-NEXT: ldp q19, q3, [sp, #32] 2082; CHECK-SD-NOFP16-NEXT: bit v0.16b, v4.16b, v1.16b 2083; CHECK-SD-NOFP16-NEXT: mov v1.16b, v17.16b 2084; CHECK-SD-NOFP16-NEXT: bit v3.16b, v7.16b, v2.16b 2085; CHECK-SD-NOFP16-NEXT: mov v2.16b, v16.16b 2086; CHECK-SD-NOFP16-NEXT: bsl v1.16b, v5.16b, v18.16b 2087; CHECK-SD-NOFP16-NEXT: bsl v2.16b, v6.16b, v19.16b 2088; CHECK-SD-NOFP16-NEXT: ret 2089; 2090; CHECK-SD-FP16-LABEL: v16f16_i32: 2091; CHECK-SD-FP16: // %bb.0: // %entry 2092; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v2.8h, v0.8h 2093; CHECK-SD-FP16-NEXT: fcmgt v1.8h, v3.8h, v1.8h 2094; CHECK-SD-FP16-NEXT: ldp q2, q20, [sp] 2095; CHECK-SD-FP16-NEXT: ldp q18, q19, [sp, #32] 2096; CHECK-SD-FP16-NEXT: sshll v3.4s, v0.4h, #0 2097; CHECK-SD-FP16-NEXT: sshll v16.4s, v1.4h, #0 2098; CHECK-SD-FP16-NEXT: sshll2 v17.4s, v1.8h, #0 2099; CHECK-SD-FP16-NEXT: sshll2 v1.4s, v0.8h, #0 2100; CHECK-SD-FP16-NEXT: mov v0.16b, v3.16b 2101; CHECK-SD-FP16-NEXT: mov v3.16b, v17.16b 2102; CHECK-SD-FP16-NEXT: bsl v1.16b, v5.16b, v20.16b 2103; CHECK-SD-FP16-NEXT: bsl v0.16b, v4.16b, v2.16b 2104; CHECK-SD-FP16-NEXT: mov v2.16b, v16.16b 2105; CHECK-SD-FP16-NEXT: bsl v3.16b, v7.16b, v19.16b 2106; CHECK-SD-FP16-NEXT: bsl v2.16b, v6.16b, v18.16b 2107; CHECK-SD-FP16-NEXT: ret 2108; 2109; CHECK-GI-NOFP16-LABEL: v16f16_i32: 2110; CHECK-GI-NOFP16: // %bb.0: // %entry 2111; CHECK-GI-NOFP16-NEXT: fcvtl v16.4s, v0.4h 2112; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h 2113; CHECK-GI-NOFP16-NEXT: fcvtl v17.4s, v1.4h 2114; CHECK-GI-NOFP16-NEXT: fcvtl v18.4s, v2.4h 2115; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h 2116; CHECK-GI-NOFP16-NEXT: fcvtl v19.4s, v3.4h 2117; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h 2118; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h 2119; CHECK-GI-NOFP16-NEXT: fcmgt v2.4s, v2.4s, v0.4s 2120; CHECK-GI-NOFP16-NEXT: fcmgt v17.4s, v19.4s, v17.4s 2121; CHECK-GI-NOFP16-NEXT: fcmgt v16.4s, v18.4s, v16.4s 2122; CHECK-GI-NOFP16-NEXT: fcmgt v3.4s, v3.4s, v1.4s 2123; CHECK-GI-NOFP16-NEXT: ldp q0, q1, [sp] 2124; CHECK-GI-NOFP16-NEXT: ldp q18, q19, [sp, #32] 2125; CHECK-GI-NOFP16-NEXT: bit v1.16b, v5.16b, v2.16b 2126; CHECK-GI-NOFP16-NEXT: mov v2.16b, v17.16b 2127; CHECK-GI-NOFP16-NEXT: bit v0.16b, v4.16b, v16.16b 2128; CHECK-GI-NOFP16-NEXT: bsl v3.16b, v7.16b, v19.16b 2129; CHECK-GI-NOFP16-NEXT: bsl v2.16b, v6.16b, v18.16b 2130; CHECK-GI-NOFP16-NEXT: ret 2131; 2132; CHECK-GI-FP16-LABEL: v16f16_i32: 2133; CHECK-GI-FP16: // %bb.0: // %entry 2134; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v2.8h, v0.8h 2135; CHECK-GI-FP16-NEXT: fcmgt v1.8h, v3.8h, v1.8h 2136; CHECK-GI-FP16-NEXT: ldp q18, q19, [sp, #32] 2137; CHECK-GI-FP16-NEXT: ushll v2.4s, v0.4h, #0 2138; CHECK-GI-FP16-NEXT: ushll2 v0.4s, v0.8h, #0 2139; CHECK-GI-FP16-NEXT: ushll v3.4s, v1.4h, #0 2140; CHECK-GI-FP16-NEXT: ushll2 v1.4s, v1.8h, #0 2141; CHECK-GI-FP16-NEXT: shl v2.4s, v2.4s, #31 2142; CHECK-GI-FP16-NEXT: shl v0.4s, v0.4s, #31 2143; CHECK-GI-FP16-NEXT: shl v3.4s, v3.4s, #31 2144; CHECK-GI-FP16-NEXT: shl v1.4s, v1.4s, #31 2145; CHECK-GI-FP16-NEXT: sshr v2.4s, v2.4s, #31 2146; CHECK-GI-FP16-NEXT: sshr v16.4s, v0.4s, #31 2147; CHECK-GI-FP16-NEXT: sshr v3.4s, v3.4s, #31 2148; CHECK-GI-FP16-NEXT: sshr v17.4s, v1.4s, #31 2149; CHECK-GI-FP16-NEXT: ldp q0, q1, [sp] 2150; CHECK-GI-FP16-NEXT: bit v0.16b, v4.16b, v2.16b 2151; CHECK-GI-FP16-NEXT: mov v2.16b, v3.16b 2152; CHECK-GI-FP16-NEXT: mov v3.16b, v17.16b 2153; CHECK-GI-FP16-NEXT: bit v1.16b, v5.16b, v16.16b 2154; CHECK-GI-FP16-NEXT: bsl v2.16b, v6.16b, v18.16b 2155; CHECK-GI-FP16-NEXT: bsl v3.16b, v7.16b, v19.16b 2156; CHECK-GI-FP16-NEXT: ret 2157entry: 2158 %c = fcmp olt <16 x half> %a, %b 2159 %s = select <16 x i1> %c, <16 x i32> %d, <16 x i32> %e 2160 ret <16 x i32> %s 2161} 2162