1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SDAGISEL 3; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-FASTISEL 4; RUN: llc -mtriple=aarch64-apple-darwin -global-isel -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GISEL 5 6; First test the different supported value types for select. 7define zeroext i1 @select_i1(i1 zeroext %c, i1 zeroext %a, i1 zeroext %b) { 8; CHECK-SDAGISEL-LABEL: select_i1: 9; CHECK-SDAGISEL: ; %bb.0: 10; CHECK-SDAGISEL-NEXT: cmp w0, #0 11; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne 12; CHECK-SDAGISEL-NEXT: ret 13; 14; CHECK-FASTISEL-LABEL: select_i1: 15; CHECK-FASTISEL: ; %bb.0: 16; CHECK-FASTISEL-NEXT: tst w0, #0x1 17; CHECK-FASTISEL-NEXT: csel w8, w1, w2, ne 18; CHECK-FASTISEL-NEXT: and w0, w8, #0x1 19; CHECK-FASTISEL-NEXT: ret 20; 21; CHECK-GISEL-LABEL: select_i1: 22; CHECK-GISEL: ; %bb.0: 23; CHECK-GISEL-NEXT: tst w0, #0x1 24; CHECK-GISEL-NEXT: csel w0, w1, w2, ne 25; CHECK-GISEL-NEXT: ret 26 %1 = select i1 %c, i1 %a, i1 %b 27 ret i1 %1 28} 29 30define zeroext i8 @select_i8(i1 zeroext %c, i8 zeroext %a, i8 zeroext %b) { 31; CHECK-SDAGISEL-LABEL: select_i8: 32; CHECK-SDAGISEL: ; %bb.0: 33; CHECK-SDAGISEL-NEXT: cmp w0, #0 34; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne 35; CHECK-SDAGISEL-NEXT: ret 36; 37; CHECK-FASTISEL-LABEL: select_i8: 38; CHECK-FASTISEL: ; %bb.0: 39; CHECK-FASTISEL-NEXT: tst w0, #0x1 40; CHECK-FASTISEL-NEXT: csel w8, w1, w2, ne 41; CHECK-FASTISEL-NEXT: uxtb w0, w8 42; CHECK-FASTISEL-NEXT: ret 43; 44; CHECK-GISEL-LABEL: select_i8: 45; CHECK-GISEL: ; %bb.0: 46; CHECK-GISEL-NEXT: tst w0, #0x1 47; CHECK-GISEL-NEXT: csel w0, w1, w2, ne 48; CHECK-GISEL-NEXT: ret 49 %1 = select i1 %c, i8 %a, i8 %b 50 ret i8 %1 51} 52 53define zeroext i16 @select_i16(i1 zeroext %c, i16 zeroext %a, i16 zeroext %b) { 54; CHECK-SDAGISEL-LABEL: select_i16: 55; CHECK-SDAGISEL: ; %bb.0: 56; CHECK-SDAGISEL-NEXT: cmp w0, #0 57; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne 58; CHECK-SDAGISEL-NEXT: ret 59; 60; CHECK-FASTISEL-LABEL: select_i16: 61; CHECK-FASTISEL: ; %bb.0: 62; CHECK-FASTISEL-NEXT: tst w0, #0x1 63; CHECK-FASTISEL-NEXT: csel w8, w1, w2, ne 64; CHECK-FASTISEL-NEXT: uxth w0, w8 65; CHECK-FASTISEL-NEXT: ret 66; 67; CHECK-GISEL-LABEL: select_i16: 68; CHECK-GISEL: ; %bb.0: 69; CHECK-GISEL-NEXT: tst w0, #0x1 70; CHECK-GISEL-NEXT: csel w0, w1, w2, ne 71; CHECK-GISEL-NEXT: ret 72 %1 = select i1 %c, i16 %a, i16 %b 73 ret i16 %1 74} 75 76define i32 @select_i32(i1 zeroext %c, i32 %a, i32 %b) { 77; CHECK-SDAGISEL-LABEL: select_i32: 78; CHECK-SDAGISEL: ; %bb.0: 79; CHECK-SDAGISEL-NEXT: cmp w0, #0 80; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne 81; CHECK-SDAGISEL-NEXT: ret 82; 83; CHECK-FASTISEL-LABEL: select_i32: 84; CHECK-FASTISEL: ; %bb.0: 85; CHECK-FASTISEL-NEXT: tst w0, #0x1 86; CHECK-FASTISEL-NEXT: csel w0, w1, w2, ne 87; CHECK-FASTISEL-NEXT: ret 88; 89; CHECK-GISEL-LABEL: select_i32: 90; CHECK-GISEL: ; %bb.0: 91; CHECK-GISEL-NEXT: tst w0, #0x1 92; CHECK-GISEL-NEXT: csel w0, w1, w2, ne 93; CHECK-GISEL-NEXT: ret 94 %1 = select i1 %c, i32 %a, i32 %b 95 ret i32 %1 96} 97 98define i64 @select_i64(i1 zeroext %c, i64 %a, i64 %b) { 99; CHECK-SDAGISEL-LABEL: select_i64: 100; CHECK-SDAGISEL: ; %bb.0: 101; CHECK-SDAGISEL-NEXT: cmp w0, #0 102; CHECK-SDAGISEL-NEXT: csel x0, x1, x2, ne 103; CHECK-SDAGISEL-NEXT: ret 104; 105; CHECK-FASTISEL-LABEL: select_i64: 106; CHECK-FASTISEL: ; %bb.0: 107; CHECK-FASTISEL-NEXT: tst w0, #0x1 108; CHECK-FASTISEL-NEXT: csel x0, x1, x2, ne 109; CHECK-FASTISEL-NEXT: ret 110; 111; CHECK-GISEL-LABEL: select_i64: 112; CHECK-GISEL: ; %bb.0: 113; CHECK-GISEL-NEXT: tst w0, #0x1 114; CHECK-GISEL-NEXT: csel x0, x1, x2, ne 115; CHECK-GISEL-NEXT: ret 116 %1 = select i1 %c, i64 %a, i64 %b 117 ret i64 %1 118} 119 120define float @select_f32(i1 zeroext %c, float %a, float %b) { 121; CHECK-SDAGISEL-LABEL: select_f32: 122; CHECK-SDAGISEL: ; %bb.0: 123; CHECK-SDAGISEL-NEXT: cmp w0, #0 124; CHECK-SDAGISEL-NEXT: fcsel s0, s0, s1, ne 125; CHECK-SDAGISEL-NEXT: ret 126; 127; CHECK-FASTISEL-LABEL: select_f32: 128; CHECK-FASTISEL: ; %bb.0: 129; CHECK-FASTISEL-NEXT: tst w0, #0x1 130; CHECK-FASTISEL-NEXT: fcsel s0, s0, s1, ne 131; CHECK-FASTISEL-NEXT: ret 132; 133; CHECK-GISEL-LABEL: select_f32: 134; CHECK-GISEL: ; %bb.0: 135; CHECK-GISEL-NEXT: tst w0, #0x1 136; CHECK-GISEL-NEXT: fcsel s0, s0, s1, ne 137; CHECK-GISEL-NEXT: ret 138 %1 = select i1 %c, float %a, float %b 139 ret float %1 140} 141 142define double @select_f64(i1 zeroext %c, double %a, double %b) { 143; CHECK-SDAGISEL-LABEL: select_f64: 144; CHECK-SDAGISEL: ; %bb.0: 145; CHECK-SDAGISEL-NEXT: cmp w0, #0 146; CHECK-SDAGISEL-NEXT: fcsel d0, d0, d1, ne 147; CHECK-SDAGISEL-NEXT: ret 148; 149; CHECK-FASTISEL-LABEL: select_f64: 150; CHECK-FASTISEL: ; %bb.0: 151; CHECK-FASTISEL-NEXT: tst w0, #0x1 152; CHECK-FASTISEL-NEXT: fcsel d0, d0, d1, ne 153; CHECK-FASTISEL-NEXT: ret 154; 155; CHECK-GISEL-LABEL: select_f64: 156; CHECK-GISEL: ; %bb.0: 157; CHECK-GISEL-NEXT: tst w0, #0x1 158; CHECK-GISEL-NEXT: fcsel d0, d0, d1, ne 159; CHECK-GISEL-NEXT: ret 160 %1 = select i1 %c, double %a, double %b 161 ret double %1 162} 163 164; Now test the folding of all compares. 165define float @select_fcmp_false(float %x, float %a, float %b) { 166; CHECK-SDAGISEL-LABEL: select_fcmp_false: 167; CHECK-SDAGISEL: ; %bb.0: 168; CHECK-SDAGISEL-NEXT: fmov s0, s2 169; CHECK-SDAGISEL-NEXT: ret 170; 171; CHECK-FASTISEL-LABEL: select_fcmp_false: 172; CHECK-FASTISEL: ; %bb.0: 173; CHECK-FASTISEL-NEXT: fmov s0, s2 174; CHECK-FASTISEL-NEXT: ret 175; 176; CHECK-GISEL-LABEL: select_fcmp_false: 177; CHECK-GISEL: ; %bb.0: 178; CHECK-GISEL-NEXT: fcmp s0, s0 179; CHECK-GISEL-NEXT: fcsel s0, s1, s2, gt 180; CHECK-GISEL-NEXT: ret 181 %1 = fcmp ogt float %x, %x 182 %2 = select i1 %1, float %a, float %b 183 ret float %2 184} 185 186define float @select_fcmp_ogt(float %x, float %y, float %a, float %b) { 187; CHECK-LABEL: select_fcmp_ogt: 188; CHECK: ; %bb.0: 189; CHECK-NEXT: fcmp s0, s1 190; CHECK-NEXT: fcsel s0, s2, s3, gt 191; CHECK-NEXT: ret 192 %1 = fcmp ogt float %x, %y 193 %2 = select i1 %1, float %a, float %b 194 ret float %2 195} 196 197define float @select_fcmp_oge(float %x, float %y, float %a, float %b) { 198; CHECK-LABEL: select_fcmp_oge: 199; CHECK: ; %bb.0: 200; CHECK-NEXT: fcmp s0, s1 201; CHECK-NEXT: fcsel s0, s2, s3, ge 202; CHECK-NEXT: ret 203 %1 = fcmp oge float %x, %y 204 %2 = select i1 %1, float %a, float %b 205 ret float %2 206} 207 208define float @select_fcmp_olt(float %x, float %y, float %a, float %b) { 209; CHECK-LABEL: select_fcmp_olt: 210; CHECK: ; %bb.0: 211; CHECK-NEXT: fcmp s0, s1 212; CHECK-NEXT: fcsel s0, s2, s3, mi 213; CHECK-NEXT: ret 214 %1 = fcmp olt float %x, %y 215 %2 = select i1 %1, float %a, float %b 216 ret float %2 217} 218 219define float @select_fcmp_ole(float %x, float %y, float %a, float %b) { 220; CHECK-LABEL: select_fcmp_ole: 221; CHECK: ; %bb.0: 222; CHECK-NEXT: fcmp s0, s1 223; CHECK-NEXT: fcsel s0, s2, s3, ls 224; CHECK-NEXT: ret 225 %1 = fcmp ole float %x, %y 226 %2 = select i1 %1, float %a, float %b 227 ret float %2 228} 229 230define float @select_fcmp_one(float %x, float %y, float %a, float %b) { 231; CHECK-SDAGISEL-LABEL: select_fcmp_one: 232; CHECK-SDAGISEL: ; %bb.0: 233; CHECK-SDAGISEL-NEXT: fcmp s0, s1 234; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s3, mi 235; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s0, gt 236; CHECK-SDAGISEL-NEXT: ret 237; 238; CHECK-FASTISEL-LABEL: select_fcmp_one: 239; CHECK-FASTISEL: ; %bb.0: 240; CHECK-FASTISEL-NEXT: fcmp s0, s1 241; CHECK-FASTISEL-NEXT: fcsel s0, s2, s3, mi 242; CHECK-FASTISEL-NEXT: fcsel s0, s2, s0, gt 243; CHECK-FASTISEL-NEXT: ret 244; 245; CHECK-GISEL-LABEL: select_fcmp_one: 246; CHECK-GISEL: ; %bb.0: 247; CHECK-GISEL-NEXT: fcmp s0, s1 248; CHECK-GISEL-NEXT: cset w8, mi 249; CHECK-GISEL-NEXT: cset w9, gt 250; CHECK-GISEL-NEXT: orr w8, w8, w9 251; CHECK-GISEL-NEXT: tst w8, #0x1 252; CHECK-GISEL-NEXT: fcsel s0, s2, s3, ne 253; CHECK-GISEL-NEXT: ret 254 %1 = fcmp one float %x, %y 255 %2 = select i1 %1, float %a, float %b 256 ret float %2 257} 258 259define float @select_fcmp_ord(float %x, float %y, float %a, float %b) { 260; CHECK-LABEL: select_fcmp_ord: 261; CHECK: ; %bb.0: 262; CHECK-NEXT: fcmp s0, s1 263; CHECK-NEXT: fcsel s0, s2, s3, vc 264; CHECK-NEXT: ret 265 %1 = fcmp ord float %x, %y 266 %2 = select i1 %1, float %a, float %b 267 ret float %2 268} 269 270define float @select_fcmp_uno(float %x, float %y, float %a, float %b) { 271; CHECK-LABEL: select_fcmp_uno: 272; CHECK: ; %bb.0: 273; CHECK-NEXT: fcmp s0, s1 274; CHECK-NEXT: fcsel s0, s2, s3, vs 275; CHECK-NEXT: ret 276 %1 = fcmp uno float %x, %y 277 %2 = select i1 %1, float %a, float %b 278 ret float %2 279} 280 281define float @select_fcmp_ueq(float %x, float %y, float %a, float %b) { 282; CHECK-SDAGISEL-LABEL: select_fcmp_ueq: 283; CHECK-SDAGISEL: ; %bb.0: 284; CHECK-SDAGISEL-NEXT: fcmp s0, s1 285; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s3, eq 286; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s0, vs 287; CHECK-SDAGISEL-NEXT: ret 288; 289; CHECK-FASTISEL-LABEL: select_fcmp_ueq: 290; CHECK-FASTISEL: ; %bb.0: 291; CHECK-FASTISEL-NEXT: fcmp s0, s1 292; CHECK-FASTISEL-NEXT: fcsel s0, s2, s3, eq 293; CHECK-FASTISEL-NEXT: fcsel s0, s2, s0, vs 294; CHECK-FASTISEL-NEXT: ret 295; 296; CHECK-GISEL-LABEL: select_fcmp_ueq: 297; CHECK-GISEL: ; %bb.0: 298; CHECK-GISEL-NEXT: fcmp s0, s1 299; CHECK-GISEL-NEXT: cset w8, eq 300; CHECK-GISEL-NEXT: cset w9, vs 301; CHECK-GISEL-NEXT: orr w8, w8, w9 302; CHECK-GISEL-NEXT: tst w8, #0x1 303; CHECK-GISEL-NEXT: fcsel s0, s2, s3, ne 304; CHECK-GISEL-NEXT: ret 305 %1 = fcmp ueq float %x, %y 306 %2 = select i1 %1, float %a, float %b 307 ret float %2 308} 309 310define float @select_fcmp_ugt(float %x, float %y, float %a, float %b) { 311; CHECK-LABEL: select_fcmp_ugt: 312; CHECK: ; %bb.0: 313; CHECK-NEXT: fcmp s0, s1 314; CHECK-NEXT: fcsel s0, s2, s3, hi 315; CHECK-NEXT: ret 316 %1 = fcmp ugt float %x, %y 317 %2 = select i1 %1, float %a, float %b 318 ret float %2 319} 320 321define float @select_fcmp_uge(float %x, float %y, float %a, float %b) { 322; CHECK-LABEL: select_fcmp_uge: 323; CHECK: ; %bb.0: 324; CHECK-NEXT: fcmp s0, s1 325; CHECK-NEXT: fcsel s0, s2, s3, pl 326; CHECK-NEXT: ret 327 %1 = fcmp uge float %x, %y 328 %2 = select i1 %1, float %a, float %b 329 ret float %2 330} 331 332define float @select_fcmp_ult(float %x, float %y, float %a, float %b) { 333; CHECK-LABEL: select_fcmp_ult: 334; CHECK: ; %bb.0: 335; CHECK-NEXT: fcmp s0, s1 336; CHECK-NEXT: fcsel s0, s2, s3, lt 337; CHECK-NEXT: ret 338 %1 = fcmp ult float %x, %y 339 %2 = select i1 %1, float %a, float %b 340 ret float %2 341} 342 343 344define float @select_fcmp_ule(float %x, float %y, float %a, float %b) { 345; CHECK-LABEL: select_fcmp_ule: 346; CHECK: ; %bb.0: 347; CHECK-NEXT: fcmp s0, s1 348; CHECK-NEXT: fcsel s0, s2, s3, le 349; CHECK-NEXT: ret 350 %1 = fcmp ule float %x, %y 351 %2 = select i1 %1, float %a, float %b 352 ret float %2 353} 354 355define float @select_fcmp_une(float %x, float %y, float %a, float %b) { 356; CHECK-LABEL: select_fcmp_une: 357; CHECK: ; %bb.0: 358; CHECK-NEXT: fcmp s0, s1 359; CHECK-NEXT: fcsel s0, s2, s3, ne 360; CHECK-NEXT: ret 361 %1 = fcmp une float %x, %y 362 %2 = select i1 %1, float %a, float %b 363 ret float %2 364} 365 366define float @select_fcmp_true(float %x, float %a, float %b) { 367; CHECK-SDAGISEL-LABEL: select_fcmp_true: 368; CHECK-SDAGISEL: ; %bb.0: 369; CHECK-SDAGISEL-NEXT: fmov s0, s1 370; CHECK-SDAGISEL-NEXT: ret 371; 372; CHECK-FASTISEL-LABEL: select_fcmp_true: 373; CHECK-FASTISEL: ; %bb.0: 374; CHECK-FASTISEL-NEXT: fmov s0, s1 375; CHECK-FASTISEL-NEXT: ret 376; 377; CHECK-GISEL-LABEL: select_fcmp_true: 378; CHECK-GISEL: ; %bb.0: 379; CHECK-GISEL-NEXT: fcmp s0, s0 380; CHECK-GISEL-NEXT: cset w8, eq 381; CHECK-GISEL-NEXT: cset w9, vs 382; CHECK-GISEL-NEXT: orr w8, w8, w9 383; CHECK-GISEL-NEXT: tst w8, #0x1 384; CHECK-GISEL-NEXT: fcsel s0, s1, s2, ne 385; CHECK-GISEL-NEXT: ret 386 %1 = fcmp ueq float %x, %x 387 %2 = select i1 %1, float %a, float %b 388 ret float %2 389} 390 391define float @select_icmp_eq(i32 %x, i32 %y, float %a, float %b) { 392; CHECK-LABEL: select_icmp_eq: 393; CHECK: ; %bb.0: 394; CHECK-NEXT: cmp w0, w1 395; CHECK-NEXT: fcsel s0, s0, s1, eq 396; CHECK-NEXT: ret 397 %1 = icmp eq i32 %x, %y 398 %2 = select i1 %1, float %a, float %b 399 ret float %2 400} 401 402define float @select_icmp_ne(i32 %x, i32 %y, float %a, float %b) { 403; CHECK-LABEL: select_icmp_ne: 404; CHECK: ; %bb.0: 405; CHECK-NEXT: cmp w0, w1 406; CHECK-NEXT: fcsel s0, s0, s1, ne 407; CHECK-NEXT: ret 408 %1 = icmp ne i32 %x, %y 409 %2 = select i1 %1, float %a, float %b 410 ret float %2 411} 412 413define float @select_icmp_ugt(i32 %x, i32 %y, float %a, float %b) { 414; CHECK-LABEL: select_icmp_ugt: 415; CHECK: ; %bb.0: 416; CHECK-NEXT: cmp w0, w1 417; CHECK-NEXT: fcsel s0, s0, s1, hi 418; CHECK-NEXT: ret 419 %1 = icmp ugt i32 %x, %y 420 %2 = select i1 %1, float %a, float %b 421 ret float %2 422} 423 424define float @select_icmp_uge(i32 %x, i32 %y, float %a, float %b) { 425; CHECK-LABEL: select_icmp_uge: 426; CHECK: ; %bb.0: 427; CHECK-NEXT: cmp w0, w1 428; CHECK-NEXT: fcsel s0, s0, s1, hs 429; CHECK-NEXT: ret 430 %1 = icmp uge i32 %x, %y 431 %2 = select i1 %1, float %a, float %b 432 ret float %2 433} 434 435define float @select_icmp_ult(i32 %x, i32 %y, float %a, float %b) { 436; CHECK-LABEL: select_icmp_ult: 437; CHECK: ; %bb.0: 438; CHECK-NEXT: cmp w0, w1 439; CHECK-NEXT: fcsel s0, s0, s1, lo 440; CHECK-NEXT: ret 441 %1 = icmp ult i32 %x, %y 442 %2 = select i1 %1, float %a, float %b 443 ret float %2 444} 445 446define float @select_icmp_ule(i32 %x, i32 %y, float %a, float %b) { 447; CHECK-LABEL: select_icmp_ule: 448; CHECK: ; %bb.0: 449; CHECK-NEXT: cmp w0, w1 450; CHECK-NEXT: fcsel s0, s0, s1, ls 451; CHECK-NEXT: ret 452 %1 = icmp ule i32 %x, %y 453 %2 = select i1 %1, float %a, float %b 454 ret float %2 455} 456 457define float @select_icmp_sgt(i32 %x, i32 %y, float %a, float %b) { 458; CHECK-LABEL: select_icmp_sgt: 459; CHECK: ; %bb.0: 460; CHECK-NEXT: cmp w0, w1 461; CHECK-NEXT: fcsel s0, s0, s1, gt 462; CHECK-NEXT: ret 463 %1 = icmp sgt i32 %x, %y 464 %2 = select i1 %1, float %a, float %b 465 ret float %2 466} 467 468define float @select_icmp_sge(i32 %x, i32 %y, float %a, float %b) { 469; CHECK-LABEL: select_icmp_sge: 470; CHECK: ; %bb.0: 471; CHECK-NEXT: cmp w0, w1 472; CHECK-NEXT: fcsel s0, s0, s1, ge 473; CHECK-NEXT: ret 474 %1 = icmp sge i32 %x, %y 475 %2 = select i1 %1, float %a, float %b 476 ret float %2 477} 478 479define float @select_icmp_slt(i32 %x, i32 %y, float %a, float %b) { 480; CHECK-LABEL: select_icmp_slt: 481; CHECK: ; %bb.0: 482; CHECK-NEXT: cmp w0, w1 483; CHECK-NEXT: fcsel s0, s0, s1, lt 484; CHECK-NEXT: ret 485 %1 = icmp slt i32 %x, %y 486 %2 = select i1 %1, float %a, float %b 487 ret float %2 488} 489 490define float @select_icmp_sle(i32 %x, i32 %y, float %a, float %b) { 491; CHECK-LABEL: select_icmp_sle: 492; CHECK: ; %bb.0: 493; CHECK-NEXT: cmp w0, w1 494; CHECK-NEXT: fcsel s0, s0, s1, le 495; CHECK-NEXT: ret 496 %1 = icmp sle i32 %x, %y 497 %2 = select i1 %1, float %a, float %b 498 ret float %2 499} 500 501; Test peephole optimizations for select. 502define zeroext i1 @select_opt1(i1 zeroext %c, i1 zeroext %a) { 503; CHECK-LABEL: select_opt1: 504; CHECK: ; %bb.0: 505; CHECK-NEXT: orr w8, w0, w1 506; CHECK-NEXT: and w0, w8, #0x1 507; CHECK-NEXT: ret 508 %1 = select i1 %c, i1 true, i1 %a 509 ret i1 %1 510} 511 512define zeroext i1 @select_opt2(i1 zeroext %c, i1 zeroext %a) { 513; CHECK-SDAGISEL-LABEL: select_opt2: 514; CHECK-SDAGISEL: ; %bb.0: 515; CHECK-SDAGISEL-NEXT: orn w8, w1, w0 516; CHECK-SDAGISEL-NEXT: and w0, w8, #0x1 517; CHECK-SDAGISEL-NEXT: ret 518; 519; CHECK-FASTISEL-LABEL: select_opt2: 520; CHECK-FASTISEL: ; %bb.0: 521; CHECK-FASTISEL-NEXT: eor w8, w0, #0x1 522; CHECK-FASTISEL-NEXT: orr w8, w8, w1 523; CHECK-FASTISEL-NEXT: and w0, w8, #0x1 524; CHECK-FASTISEL-NEXT: ret 525; 526; CHECK-GISEL-LABEL: select_opt2: 527; CHECK-GISEL: ; %bb.0: 528; CHECK-GISEL-NEXT: eor w8, w0, #0x1 529; CHECK-GISEL-NEXT: orr w8, w8, w1 530; CHECK-GISEL-NEXT: and w0, w8, #0x1 531; CHECK-GISEL-NEXT: ret 532 %1 = select i1 %c, i1 %a, i1 true 533 ret i1 %1 534} 535 536define zeroext i1 @select_opt3(i1 zeroext %c, i1 zeroext %a) { 537; CHECK-SDAGISEL-LABEL: select_opt3: 538; CHECK-SDAGISEL: ; %bb.0: 539; CHECK-SDAGISEL-NEXT: eor w8, w0, #0x1 540; CHECK-SDAGISEL-NEXT: and w0, w8, w1 541; CHECK-SDAGISEL-NEXT: ret 542; 543; CHECK-FASTISEL-LABEL: select_opt3: 544; CHECK-FASTISEL: ; %bb.0: 545; CHECK-FASTISEL-NEXT: bic w8, w1, w0 546; CHECK-FASTISEL-NEXT: and w0, w8, #0x1 547; CHECK-FASTISEL-NEXT: ret 548; 549; CHECK-GISEL-LABEL: select_opt3: 550; CHECK-GISEL: ; %bb.0: 551; CHECK-GISEL-NEXT: eor w8, w0, #0x1 552; CHECK-GISEL-NEXT: and w0, w8, w1 553; CHECK-GISEL-NEXT: ret 554 %1 = select i1 %c, i1 false, i1 %a 555 ret i1 %1 556} 557 558define zeroext i1 @select_opt4(i1 zeroext %c, i1 zeroext %a) { 559; CHECK-SDAGISEL-LABEL: select_opt4: 560; CHECK-SDAGISEL: ; %bb.0: 561; CHECK-SDAGISEL-NEXT: and w0, w0, w1 562; CHECK-SDAGISEL-NEXT: ret 563; 564; CHECK-FASTISEL-LABEL: select_opt4: 565; CHECK-FASTISEL: ; %bb.0: 566; CHECK-FASTISEL-NEXT: and w8, w0, w1 567; CHECK-FASTISEL-NEXT: and w0, w8, #0x1 568; CHECK-FASTISEL-NEXT: ret 569; 570; CHECK-GISEL-LABEL: select_opt4: 571; CHECK-GISEL: ; %bb.0: 572; CHECK-GISEL-NEXT: and w0, w0, w1 573; CHECK-GISEL-NEXT: ret 574 %1 = select i1 %c, i1 %a, i1 false 575 ret i1 %1 576} 577