1; RUN: llc -mtriple=aarch64-- -O0 -fast-isel -fast-isel-abort=4 -verify-machineinstrs < %s | FileCheck %s 2 3; CHECK-LABEL: cmpxchg_monotonic_32: 4; CHECK: mov [[ADDR:x[0-9]+]], x0 5; CHECK: [[RETRY:.LBB[0-9_]+]]: 6; CHECK-NEXT: ldaxr w0, [[[ADDR]]] 7; CHECK-NEXT: cmp w0, w1 8; CHECK-NEXT: b.ne [[DONE:.LBB[0-9_]+]] 9; CHECK-NEXT: // %bb.2: 10; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], w2, [[[ADDR]]] 11; CHECK-NEXT: cbnz [[STATUS]], [[RETRY]] 12; CHECK-NEXT: [[DONE]]: 13; CHECK-NEXT: cmp w0, w1 14; CHECK-NEXT: cset [[STATUS]], eq 15; CHECK-NEXT: and [[STATUS32:w[0-9]+]], [[STATUS]], #0x1 16; CHECK-NEXT: str [[STATUS32]], [x3] 17define i32 @cmpxchg_monotonic_32(ptr %p, i32 %cmp, i32 %new, ptr %ps) #0 { 18 %tmp0 = cmpxchg ptr %p, i32 %cmp, i32 %new monotonic monotonic 19 %tmp1 = extractvalue { i32, i1 } %tmp0, 0 20 %tmp2 = extractvalue { i32, i1 } %tmp0, 1 21 %tmp3 = zext i1 %tmp2 to i32 22 store i32 %tmp3, ptr %ps 23 ret i32 %tmp1 24} 25 26; CHECK-LABEL: cmpxchg_acq_rel_32_load: 27; CHECK: // %bb.0: 28; CHECK: mov [[ADDR:x[0-9]+]], x0 29; CHECK: ldr [[NEW:w[0-9]+]], [x2] 30; CHECK-NEXT: [[RETRY:.LBB[0-9_]+]]: 31; CHECK-NEXT: ldaxr w0, [[[ADDR]]] 32; CHECK-NEXT: cmp w0, w1 33; CHECK-NEXT: b.ne [[DONE:.LBB[0-9_]+]] 34; CHECK-NEXT: // %bb.2: 35; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [[[ADDR]]] 36; CHECK-NEXT: cbnz [[STATUS]], [[RETRY]] 37; CHECK-NEXT: [[DONE]]: 38; CHECK-NEXT: cmp w0, w1 39; CHECK-NEXT: cset [[STATUS]], eq 40; CHECK-NEXT: and [[STATUS32:w[0-9]+]], [[STATUS]], #0x1 41; CHECK-NEXT: str [[STATUS32]], [x3] 42define i32 @cmpxchg_acq_rel_32_load(ptr %p, i32 %cmp, ptr %pnew, ptr %ps) #0 { 43 %new = load i32, ptr %pnew 44 %tmp0 = cmpxchg ptr %p, i32 %cmp, i32 %new acq_rel acquire 45 %tmp1 = extractvalue { i32, i1 } %tmp0, 0 46 %tmp2 = extractvalue { i32, i1 } %tmp0, 1 47 %tmp3 = zext i1 %tmp2 to i32 48 store i32 %tmp3, ptr %ps 49 ret i32 %tmp1 50} 51 52; CHECK-LABEL: cmpxchg_seq_cst_64: 53; CHECK: mov [[ADDR:x[0-9]+]], x0 54; CHECK: [[RETRY:.LBB[0-9_]+]]: 55; CHECK-NEXT: ldaxr x0, [[[ADDR]]] 56; CHECK-NEXT: cmp x0, x1 57; CHECK-NEXT: b.ne [[DONE:.LBB[0-9_]+]] 58; CHECK-NEXT: // %bb.2: 59; CHECK-NEXT: stlxr [[STATUS]], x2, [[[ADDR]]] 60; CHECK-NEXT: cbnz [[STATUS]], [[RETRY]] 61; CHECK-NEXT: [[DONE]]: 62; CHECK-NEXT: cmp x0, x1 63; CHECK-NEXT: cset [[STATUS:w[0-9]+]], eq 64; CHECK-NEXT: and [[STATUS32:w[0-9]+]], [[STATUS]], #0x1 65; CHECK-NEXT: str [[STATUS32]], [x3] 66define i64 @cmpxchg_seq_cst_64(ptr %p, i64 %cmp, i64 %new, ptr %ps) #0 { 67 %tmp0 = cmpxchg ptr %p, i64 %cmp, i64 %new seq_cst seq_cst 68 %tmp1 = extractvalue { i64, i1 } %tmp0, 0 69 %tmp2 = extractvalue { i64, i1 } %tmp0, 1 70 %tmp3 = zext i1 %tmp2 to i32 71 store i32 %tmp3, ptr %ps 72 ret i64 %tmp1 73} 74 75attributes #0 = { nounwind } 76