1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -verify-machineinstrs \ 3; RUN: -aarch64-enable-atomic-cfg-tidy=0 -disable-cgp -disable-branch-fold \ 4; RUN: < %s | FileCheck %s 5 6; 7; Verify that we don't mess up vector comparisons in fast-isel. 8; 9 10define <2 x i32> @icmp_v2i32(<2 x i32> %a) { 11; CHECK-LABEL: icmp_v2i32: 12; CHECK: ; %bb.0: 13; CHECK-NEXT: cmeq.2s v0, v0, #0 14; CHECK-NEXT: ; %bb.1: ; %bb2 15; CHECK-NEXT: movi.2s v1, #1 16; CHECK-NEXT: and.8b v0, v0, v1 17; CHECK-NEXT: ret 18 %c = icmp eq <2 x i32> %a, zeroinitializer 19 br label %bb2 20bb2: 21 %z = zext <2 x i1> %c to <2 x i32> 22 ret <2 x i32> %z 23} 24 25define <2 x i32> @icmp_constfold_v2i32(<2 x i32> %a) { 26; CHECK-LABEL: icmp_constfold_v2i32: 27; CHECK: ; %bb.0: 28; CHECK-NEXT: movi.2s v0, #1 29; CHECK-NEXT: and.8b v0, v0, v0 30; CHECK-NEXT: ret 31 %1 = icmp eq <2 x i32> %a, %a 32 br label %bb2 33bb2: 34 %2 = zext <2 x i1> %1 to <2 x i32> 35 ret <2 x i32> %2 36} 37 38define <4 x i32> @icmp_v4i32(<4 x i32> %a) { 39; CHECK-LABEL: icmp_v4i32: 40; CHECK: ; %bb.0: 41; CHECK-NEXT: cmeq.4s v0, v0, #0 42; CHECK-NEXT: xtn.4h v0, v0 43; CHECK-NEXT: ; %bb.1: ; %bb2 44; CHECK-NEXT: movi.4h v1, #1 45; CHECK-NEXT: and.8b v0, v0, v1 46; CHECK-NEXT: ushll.4s v0, v0, #0 47; CHECK-NEXT: ret 48 %c = icmp eq <4 x i32> %a, zeroinitializer 49 br label %bb2 50bb2: 51 %z = zext <4 x i1> %c to <4 x i32> 52 ret <4 x i32> %z 53} 54 55define <4 x i32> @icmp_constfold_v4i32(<4 x i32> %a) { 56; CHECK-LABEL: icmp_constfold_v4i32: 57; CHECK: ; %bb.0: 58; CHECK-NEXT: movi.4h v0, #1 59; CHECK-NEXT: ; %bb.1: ; %bb2 60; CHECK-NEXT: and.8b v0, v0, v0 61; CHECK-NEXT: ushll.4s v0, v0, #0 62; CHECK-NEXT: ret 63 %1 = icmp eq <4 x i32> %a, %a 64 br label %bb2 65bb2: 66 %2 = zext <4 x i1> %1 to <4 x i32> 67 ret <4 x i32> %2 68} 69 70define <16 x i8> @icmp_v16i8(<16 x i8> %a) { 71; CHECK-LABEL: icmp_v16i8: 72; CHECK: ; %bb.0: 73; CHECK-NEXT: cmeq.16b v0, v0, #0 74; CHECK-NEXT: ; %bb.1: ; %bb2 75; CHECK-NEXT: movi.16b v1, #1 76; CHECK-NEXT: and.16b v0, v0, v1 77; CHECK-NEXT: ret 78 %c = icmp eq <16 x i8> %a, zeroinitializer 79 br label %bb2 80bb2: 81 %z = zext <16 x i1> %c to <16 x i8> 82 ret <16 x i8> %z 83} 84 85define <16 x i8> @icmp_constfold_v16i8(<16 x i8> %a) { 86; CHECK-LABEL: icmp_constfold_v16i8: 87; CHECK: ; %bb.0: 88; CHECK-NEXT: movi.16b v0, #1 89; CHECK-NEXT: ret 90 %1 = icmp eq <16 x i8> %a, %a 91 br label %bb2 92bb2: 93 %2 = zext <16 x i1> %1 to <16 x i8> 94 ret <16 x i8> %2 95} 96