xref: /llvm-project/llvm/test/CodeGen/AArch64/fabs.ll (revision 61510b51c33464a6bc15e4cf5b1ee07e2e0ec1c9) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
6
7define double @fabs_f64(double %a) {
8; CHECK-LABEL: fabs_f64:
9; CHECK:       // %bb.0: // %entry
10; CHECK-NEXT:    fabs d0, d0
11; CHECK-NEXT:    ret
12entry:
13  %c = call double @llvm.fabs.f64(double %a)
14  ret double %c
15}
16
17define float @fabs_f32(float %a) {
18; CHECK-LABEL: fabs_f32:
19; CHECK:       // %bb.0: // %entry
20; CHECK-NEXT:    fabs s0, s0
21; CHECK-NEXT:    ret
22entry:
23  %c = call float @llvm.fabs.f32(float %a)
24  ret float %c
25}
26
27define half @fabs_f16(half %a) {
28; CHECK-SD-NOFP16-LABEL: fabs_f16:
29; CHECK-SD-NOFP16:       // %bb.0: // %entry
30; CHECK-SD-NOFP16-NEXT:    // kill: def $h0 killed $h0 def $s0
31; CHECK-SD-NOFP16-NEXT:    fmov w8, s0
32; CHECK-SD-NOFP16-NEXT:    and w8, w8, #0x7fff
33; CHECK-SD-NOFP16-NEXT:    fmov s0, w8
34; CHECK-SD-NOFP16-NEXT:    // kill: def $h0 killed $h0 killed $s0
35; CHECK-SD-NOFP16-NEXT:    ret
36;
37; CHECK-SD-FP16-LABEL: fabs_f16:
38; CHECK-SD-FP16:       // %bb.0: // %entry
39; CHECK-SD-FP16-NEXT:    fabs h0, h0
40; CHECK-SD-FP16-NEXT:    ret
41;
42; CHECK-GI-NOFP16-LABEL: fabs_f16:
43; CHECK-GI-NOFP16:       // %bb.0: // %entry
44; CHECK-GI-NOFP16-NEXT:    // kill: def $h0 killed $h0 def $s0
45; CHECK-GI-NOFP16-NEXT:    fmov w8, s0
46; CHECK-GI-NOFP16-NEXT:    and w8, w8, #0x7fff
47; CHECK-GI-NOFP16-NEXT:    fmov s0, w8
48; CHECK-GI-NOFP16-NEXT:    // kill: def $h0 killed $h0 killed $s0
49; CHECK-GI-NOFP16-NEXT:    ret
50;
51; CHECK-GI-FP16-LABEL: fabs_f16:
52; CHECK-GI-FP16:       // %bb.0: // %entry
53; CHECK-GI-FP16-NEXT:    fabs h0, h0
54; CHECK-GI-FP16-NEXT:    ret
55entry:
56  %c = call half @llvm.fabs.f16(half %a)
57  ret half %c
58}
59
60define <2 x double> @fabs_v2f64(<2 x double> %a) {
61; CHECK-LABEL: fabs_v2f64:
62; CHECK:       // %bb.0: // %entry
63; CHECK-NEXT:    fabs v0.2d, v0.2d
64; CHECK-NEXT:    ret
65entry:
66  %c = call <2 x double> @llvm.fabs.v2f64(<2 x double> %a)
67  ret <2 x double> %c
68}
69
70define <3 x double> @fabs_v3f64(<3 x double> %a) {
71; CHECK-SD-LABEL: fabs_v3f64:
72; CHECK-SD:       // %bb.0: // %entry
73; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
74; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
75; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
76; CHECK-SD-NEXT:    mov v0.d[1], v1.d[0]
77; CHECK-SD-NEXT:    fabs v2.2d, v2.2d
78; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
79; CHECK-SD-NEXT:    fabs v0.2d, v0.2d
80; CHECK-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
81; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
82; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
83; CHECK-SD-NEXT:    ret
84;
85; CHECK-GI-LABEL: fabs_v3f64:
86; CHECK-GI:       // %bb.0: // %entry
87; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
88; CHECK-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
89; CHECK-GI-NEXT:    fabs d2, d2
90; CHECK-GI-NEXT:    mov v0.d[1], v1.d[0]
91; CHECK-GI-NEXT:    fabs v0.2d, v0.2d
92; CHECK-GI-NEXT:    mov d1, v0.d[1]
93; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
94; CHECK-GI-NEXT:    ret
95entry:
96  %c = call <3 x double> @llvm.fabs.v3f64(<3 x double> %a)
97  ret <3 x double> %c
98}
99
100define <4 x double> @fabs_v4f64(<4 x double> %a) {
101; CHECK-LABEL: fabs_v4f64:
102; CHECK:       // %bb.0: // %entry
103; CHECK-NEXT:    fabs v0.2d, v0.2d
104; CHECK-NEXT:    fabs v1.2d, v1.2d
105; CHECK-NEXT:    ret
106entry:
107  %c = call <4 x double> @llvm.fabs.v4f64(<4 x double> %a)
108  ret <4 x double> %c
109}
110
111define <2 x float> @fabs_v2f32(<2 x float> %a) {
112; CHECK-LABEL: fabs_v2f32:
113; CHECK:       // %bb.0: // %entry
114; CHECK-NEXT:    fabs v0.2s, v0.2s
115; CHECK-NEXT:    ret
116entry:
117  %c = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
118  ret <2 x float> %c
119}
120
121define <3 x float> @fabs_v3f32(<3 x float> %a) {
122; CHECK-LABEL: fabs_v3f32:
123; CHECK:       // %bb.0: // %entry
124; CHECK-NEXT:    fabs v0.4s, v0.4s
125; CHECK-NEXT:    ret
126entry:
127  %c = call <3 x float> @llvm.fabs.v3f32(<3 x float> %a)
128  ret <3 x float> %c
129}
130
131define <4 x float> @fabs_v4f32(<4 x float> %a) {
132; CHECK-LABEL: fabs_v4f32:
133; CHECK:       // %bb.0: // %entry
134; CHECK-NEXT:    fabs v0.4s, v0.4s
135; CHECK-NEXT:    ret
136entry:
137  %c = call <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
138  ret <4 x float> %c
139}
140
141define <8 x float> @fabs_v8f32(<8 x float> %a) {
142; CHECK-LABEL: fabs_v8f32:
143; CHECK:       // %bb.0: // %entry
144; CHECK-NEXT:    fabs v0.4s, v0.4s
145; CHECK-NEXT:    fabs v1.4s, v1.4s
146; CHECK-NEXT:    ret
147entry:
148  %c = call <8 x float> @llvm.fabs.v8f32(<8 x float> %a)
149  ret <8 x float> %c
150}
151
152define <7 x half> @fabs_v7f16(<7 x half> %a) {
153; CHECK-SD-NOFP16-LABEL: fabs_v7f16:
154; CHECK-SD-NOFP16:       // %bb.0: // %entry
155; CHECK-SD-NOFP16-NEXT:    bic v0.8h, #128, lsl #8
156; CHECK-SD-NOFP16-NEXT:    ret
157;
158; CHECK-SD-FP16-LABEL: fabs_v7f16:
159; CHECK-SD-FP16:       // %bb.0: // %entry
160; CHECK-SD-FP16-NEXT:    fabs v0.8h, v0.8h
161; CHECK-SD-FP16-NEXT:    ret
162;
163; CHECK-GI-NOFP16-LABEL: fabs_v7f16:
164; CHECK-GI-NOFP16:       // %bb.0: // %entry
165; CHECK-GI-NOFP16-NEXT:    mvni v1.8h, #128, lsl #8
166; CHECK-GI-NOFP16-NEXT:    and v0.16b, v0.16b, v1.16b
167; CHECK-GI-NOFP16-NEXT:    ret
168;
169; CHECK-GI-FP16-LABEL: fabs_v7f16:
170; CHECK-GI-FP16:       // %bb.0: // %entry
171; CHECK-GI-FP16-NEXT:    fabs v0.8h, v0.8h
172; CHECK-GI-FP16-NEXT:    ret
173entry:
174  %c = call <7 x half> @llvm.fabs.v7f16(<7 x half> %a)
175  ret <7 x half> %c
176}
177
178define <4 x half> @fabs_v4f16(<4 x half> %a) {
179; CHECK-SD-NOFP16-LABEL: fabs_v4f16:
180; CHECK-SD-NOFP16:       // %bb.0: // %entry
181; CHECK-SD-NOFP16-NEXT:    bic v0.4h, #128, lsl #8
182; CHECK-SD-NOFP16-NEXT:    ret
183;
184; CHECK-SD-FP16-LABEL: fabs_v4f16:
185; CHECK-SD-FP16:       // %bb.0: // %entry
186; CHECK-SD-FP16-NEXT:    fabs v0.4h, v0.4h
187; CHECK-SD-FP16-NEXT:    ret
188;
189; CHECK-GI-NOFP16-LABEL: fabs_v4f16:
190; CHECK-GI-NOFP16:       // %bb.0: // %entry
191; CHECK-GI-NOFP16-NEXT:    mvni v1.4h, #128, lsl #8
192; CHECK-GI-NOFP16-NEXT:    and v0.8b, v0.8b, v1.8b
193; CHECK-GI-NOFP16-NEXT:    ret
194;
195; CHECK-GI-FP16-LABEL: fabs_v4f16:
196; CHECK-GI-FP16:       // %bb.0: // %entry
197; CHECK-GI-FP16-NEXT:    fabs v0.4h, v0.4h
198; CHECK-GI-FP16-NEXT:    ret
199entry:
200  %c = call <4 x half> @llvm.fabs.v4f16(<4 x half> %a)
201  ret <4 x half> %c
202}
203
204define <8 x half> @fabs_v8f16(<8 x half> %a) {
205; CHECK-SD-NOFP16-LABEL: fabs_v8f16:
206; CHECK-SD-NOFP16:       // %bb.0: // %entry
207; CHECK-SD-NOFP16-NEXT:    bic v0.8h, #128, lsl #8
208; CHECK-SD-NOFP16-NEXT:    ret
209;
210; CHECK-SD-FP16-LABEL: fabs_v8f16:
211; CHECK-SD-FP16:       // %bb.0: // %entry
212; CHECK-SD-FP16-NEXT:    fabs v0.8h, v0.8h
213; CHECK-SD-FP16-NEXT:    ret
214;
215; CHECK-GI-NOFP16-LABEL: fabs_v8f16:
216; CHECK-GI-NOFP16:       // %bb.0: // %entry
217; CHECK-GI-NOFP16-NEXT:    mvni v1.8h, #128, lsl #8
218; CHECK-GI-NOFP16-NEXT:    and v0.16b, v0.16b, v1.16b
219; CHECK-GI-NOFP16-NEXT:    ret
220;
221; CHECK-GI-FP16-LABEL: fabs_v8f16:
222; CHECK-GI-FP16:       // %bb.0: // %entry
223; CHECK-GI-FP16-NEXT:    fabs v0.8h, v0.8h
224; CHECK-GI-FP16-NEXT:    ret
225entry:
226  %c = call <8 x half> @llvm.fabs.v8f16(<8 x half> %a)
227  ret <8 x half> %c
228}
229
230define <16 x half> @fabs_v16f16(<16 x half> %a) {
231; CHECK-SD-NOFP16-LABEL: fabs_v16f16:
232; CHECK-SD-NOFP16:       // %bb.0: // %entry
233; CHECK-SD-NOFP16-NEXT:    bic v0.8h, #128, lsl #8
234; CHECK-SD-NOFP16-NEXT:    bic v1.8h, #128, lsl #8
235; CHECK-SD-NOFP16-NEXT:    ret
236;
237; CHECK-SD-FP16-LABEL: fabs_v16f16:
238; CHECK-SD-FP16:       // %bb.0: // %entry
239; CHECK-SD-FP16-NEXT:    fabs v0.8h, v0.8h
240; CHECK-SD-FP16-NEXT:    fabs v1.8h, v1.8h
241; CHECK-SD-FP16-NEXT:    ret
242;
243; CHECK-GI-NOFP16-LABEL: fabs_v16f16:
244; CHECK-GI-NOFP16:       // %bb.0: // %entry
245; CHECK-GI-NOFP16-NEXT:    mvni v2.8h, #128, lsl #8
246; CHECK-GI-NOFP16-NEXT:    and v0.16b, v0.16b, v2.16b
247; CHECK-GI-NOFP16-NEXT:    and v1.16b, v1.16b, v2.16b
248; CHECK-GI-NOFP16-NEXT:    ret
249;
250; CHECK-GI-FP16-LABEL: fabs_v16f16:
251; CHECK-GI-FP16:       // %bb.0: // %entry
252; CHECK-GI-FP16-NEXT:    fabs v0.8h, v0.8h
253; CHECK-GI-FP16-NEXT:    fabs v1.8h, v1.8h
254; CHECK-GI-FP16-NEXT:    ret
255entry:
256  %c = call <16 x half> @llvm.fabs.v16f16(<16 x half> %a)
257  ret <16 x half> %c
258}
259
260declare <16 x half> @llvm.fabs.v16f16(<16 x half>)
261declare <2 x double> @llvm.fabs.v2f64(<2 x double>)
262declare <2 x float> @llvm.fabs.v2f32(<2 x float>)
263declare <3 x double> @llvm.fabs.v3f64(<3 x double>)
264declare <3 x float> @llvm.fabs.v3f32(<3 x float>)
265declare <4 x double> @llvm.fabs.v4f64(<4 x double>)
266declare <4 x float> @llvm.fabs.v4f32(<4 x float>)
267declare <4 x half> @llvm.fabs.v4f16(<4 x half>)
268declare <7 x half> @llvm.fabs.v7f16(<7 x half>)
269declare <8 x float> @llvm.fabs.v8f32(<8 x float>)
270declare <8 x half> @llvm.fabs.v8f16(<8 x half>)
271declare double @llvm.fabs.f64(double)
272declare float @llvm.fabs.f32(float)
273declare half @llvm.fabs.f16(half)
274